1 /* Driver for Realtek PCI-Express card reader
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 * Wei WANG (wei_wang@realsil.com.cn)
20 * Micky Ching (micky_ching@realsil.com.cn)
23 #include <linux/blkdev.h>
24 #include <linux/kthread.h>
25 #include <linux/sched.h>
26 #include <linux/vmalloc.h>
31 static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
33 struct ms_info *ms_card = &chip->ms_card;
35 ms_card->err_code = err_code;
38 static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
40 struct ms_info *ms_card = &chip->ms_card;
42 return (ms_card->err_code == err_code);
45 static int ms_parse_err_code(struct rtsx_chip *chip)
50 static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode,
51 u8 tpc, u8 cnt, u8 cfg)
53 struct ms_info *ms_card = &chip->ms_card;
57 dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc);
61 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
62 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
63 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
64 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
65 0x01, PINGPONG_BUFFER);
67 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER,
68 0xFF, MS_TRANSFER_START | trans_mode);
69 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
70 MS_TRANSFER_END, MS_TRANSFER_END);
72 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
74 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
76 rtsx_clear_ms_error(chip);
77 ms_set_err_code(chip, MS_TO_ERROR);
78 return ms_parse_err_code(chip);
81 ptr = rtsx_get_cmd_data(chip) + 1;
83 if (!(tpc & 0x08)) { /* Read Packet */
84 if (*ptr & MS_CRC16_ERR) {
85 ms_set_err_code(chip, MS_CRC16_ERROR);
86 return ms_parse_err_code(chip);
88 } else { /* Write Packet */
89 if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
90 if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
91 ms_set_err_code(chip, MS_CMD_NK);
92 return ms_parse_err_code(chip);
97 if (*ptr & MS_RDY_TIMEOUT) {
98 rtsx_clear_ms_error(chip);
99 ms_set_err_code(chip, MS_TO_ERROR);
100 return ms_parse_err_code(chip);
103 return STATUS_SUCCESS;
106 static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
107 u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k,
108 int use_sg, void *buf, int buf_len)
111 u8 val, err_code = 0;
112 enum dma_data_direction dir;
114 if (!buf || !buf_len) {
118 if (trans_mode == MS_TM_AUTO_READ) {
119 dir = DMA_FROM_DEVICE;
120 err_code = MS_FLASH_READ_ERROR;
121 } else if (trans_mode == MS_TM_AUTO_WRITE) {
123 err_code = MS_FLASH_WRITE_ERROR;
130 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
131 rtsx_add_cmd(chip, WRITE_REG_CMD,
132 MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
133 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
134 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
137 rtsx_add_cmd(chip, WRITE_REG_CMD,
138 MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
140 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
143 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
145 rtsx_add_cmd(chip, WRITE_REG_CMD,
146 MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
147 rtsx_add_cmd(chip, CHECK_REG_CMD,
148 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
150 rtsx_send_cmd_no_wait(chip);
152 retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
153 use_sg, dir, chip->mspro_timeout);
155 ms_set_err_code(chip, err_code);
156 if (retval == -ETIMEDOUT)
157 retval = STATUS_TIMEDOUT;
159 retval = STATUS_FAIL;
164 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
168 if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
172 return STATUS_SUCCESS;
175 static int ms_write_bytes(struct rtsx_chip *chip,
176 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
178 struct ms_info *ms_card = &chip->ms_card;
181 if (!data || (data_len < cnt)) {
187 for (i = 0; i < cnt; i++) {
188 rtsx_add_cmd(chip, WRITE_REG_CMD,
189 PPBUF_BASE2 + i, 0xFF, data[i]);
192 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
194 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
195 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
196 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
197 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
198 0x01, PINGPONG_BUFFER);
200 rtsx_add_cmd(chip, WRITE_REG_CMD,
201 MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
202 rtsx_add_cmd(chip, CHECK_REG_CMD,
203 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
205 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
209 rtsx_read_register(chip, MS_TRANS_CFG, &val);
210 dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val);
212 rtsx_clear_ms_error(chip);
215 if (val & MS_CRC16_ERR) {
216 ms_set_err_code(chip, MS_CRC16_ERROR);
217 return ms_parse_err_code(chip);
220 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
221 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
222 ms_set_err_code(chip, MS_CMD_NK);
223 return ms_parse_err_code(chip);
228 if (val & MS_RDY_TIMEOUT) {
229 ms_set_err_code(chip, MS_TO_ERROR);
230 return ms_parse_err_code(chip);
233 ms_set_err_code(chip, MS_TO_ERROR);
234 return ms_parse_err_code(chip);
237 return STATUS_SUCCESS;
240 static int ms_read_bytes(struct rtsx_chip *chip,
241 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
243 struct ms_info *ms_card = &chip->ms_card;
253 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
254 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
255 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
256 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
257 0x01, PINGPONG_BUFFER);
259 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
260 MS_TRANSFER_START | MS_TM_READ_BYTES);
261 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
262 MS_TRANSFER_END, MS_TRANSFER_END);
264 for (i = 0; i < data_len - 1; i++)
265 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
268 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
270 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1,
273 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
277 rtsx_read_register(chip, MS_TRANS_CFG, &val);
278 rtsx_clear_ms_error(chip);
281 if (val & MS_CRC16_ERR) {
282 ms_set_err_code(chip, MS_CRC16_ERROR);
283 return ms_parse_err_code(chip);
286 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
287 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
288 ms_set_err_code(chip, MS_CMD_NK);
289 return ms_parse_err_code(chip);
294 if (val & MS_RDY_TIMEOUT) {
295 ms_set_err_code(chip, MS_TO_ERROR);
296 return ms_parse_err_code(chip);
299 ms_set_err_code(chip, MS_TO_ERROR);
300 return ms_parse_err_code(chip);
303 ptr = rtsx_get_cmd_data(chip) + 1;
305 for (i = 0; i < data_len; i++)
308 if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
309 dev_dbg(rtsx_dev(chip), "Read format progress:\n");
310 print_hex_dump_bytes(KBUILD_MODNAME ": ", DUMP_PREFIX_NONE, ptr,
314 return STATUS_SUCCESS;
317 static int ms_set_rw_reg_addr(struct rtsx_chip *chip, u8 read_start,
318 u8 read_cnt, u8 write_start, u8 write_cnt)
323 data[0] = read_start;
325 data[2] = write_start;
328 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
329 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
330 NO_WAIT_INT, data, 4);
331 if (retval == STATUS_SUCCESS)
332 return STATUS_SUCCESS;
333 rtsx_clear_ms_error(chip);
339 static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
346 return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
349 static int ms_set_init_para(struct rtsx_chip *chip)
351 struct ms_info *ms_card = &chip->ms_card;
354 if (CHK_HG8BIT(ms_card)) {
356 ms_card->ms_clock = chip->asic_ms_hg_clk;
358 ms_card->ms_clock = chip->fpga_ms_hg_clk;
360 } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
362 ms_card->ms_clock = chip->asic_ms_4bit_clk;
364 ms_card->ms_clock = chip->fpga_ms_4bit_clk;
368 ms_card->ms_clock = chip->asic_ms_1bit_clk;
370 ms_card->ms_clock = chip->fpga_ms_1bit_clk;
373 retval = switch_clock(chip, ms_card->ms_clock);
374 if (retval != STATUS_SUCCESS) {
378 retval = select_card(chip, MS_CARD);
379 if (retval != STATUS_SUCCESS) {
383 return STATUS_SUCCESS;
386 static int ms_switch_clock(struct rtsx_chip *chip)
388 struct ms_info *ms_card = &chip->ms_card;
391 retval = select_card(chip, MS_CARD);
392 if (retval != STATUS_SUCCESS) {
396 retval = switch_clock(chip, ms_card->ms_clock);
397 if (retval != STATUS_SUCCESS) {
401 return STATUS_SUCCESS;
404 static int ms_pull_ctl_disable(struct rtsx_chip *chip)
408 if (CHECK_PID(chip, 0x5208)) {
409 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
410 MS_D1_PD | MS_D2_PD | MS_CLK_PD |
415 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
416 MS_D3_PD | MS_D0_PD | MS_BS_PD |
421 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
422 MS_D7_PD | XD_CE_PD | XD_CLE_PD |
427 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
428 XD_RDY_PD | SD_D3_PD | SD_D2_PD |
433 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
434 MS_INS_PU | SD_WP_PD | SD_CD_PU |
439 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
440 MS_D5_PD | MS_D4_PD);
444 } else if (CHECK_PID(chip, 0x5288)) {
445 if (CHECK_BARO_PKG(chip, QFN)) {
446 retval = rtsx_write_register(chip, CARD_PULL_CTL1,
451 retval = rtsx_write_register(chip, CARD_PULL_CTL2,
456 retval = rtsx_write_register(chip, CARD_PULL_CTL3,
461 retval = rtsx_write_register(chip, CARD_PULL_CTL4,
469 return STATUS_SUCCESS;
472 static int ms_pull_ctl_enable(struct rtsx_chip *chip)
478 if (CHECK_PID(chip, 0x5208)) {
479 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
480 MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
481 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
482 MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
483 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
484 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
485 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
486 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
487 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
488 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
489 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
490 MS_D5_PD | MS_D4_PD);
491 } else if (CHECK_PID(chip, 0x5288)) {
492 if (CHECK_BARO_PKG(chip, QFN)) {
493 rtsx_add_cmd(chip, WRITE_REG_CMD,
494 CARD_PULL_CTL1, 0xFF, 0x55);
495 rtsx_add_cmd(chip, WRITE_REG_CMD,
496 CARD_PULL_CTL2, 0xFF, 0x45);
497 rtsx_add_cmd(chip, WRITE_REG_CMD,
498 CARD_PULL_CTL3, 0xFF, 0x4B);
499 rtsx_add_cmd(chip, WRITE_REG_CMD,
500 CARD_PULL_CTL4, 0xFF, 0x29);
504 retval = rtsx_send_cmd(chip, MS_CARD, 100);
509 return STATUS_SUCCESS;
512 static int ms_prepare_reset(struct rtsx_chip *chip)
514 struct ms_info *ms_card = &chip->ms_card;
518 ms_card->ms_type = 0;
519 ms_card->check_ms_flow = 0;
520 ms_card->switch_8bit_fail = 0;
521 ms_card->delay_write.delay_write_flag = 0;
523 ms_card->pro_under_formatting = 0;
525 retval = ms_power_off_card3v3(chip);
526 if (retval != STATUS_SUCCESS) {
530 if (!chip->ft2_fast_mode)
533 retval = enable_card_clock(chip, MS_CARD);
534 if (retval != STATUS_SUCCESS) {
538 if (chip->asic_code) {
539 retval = ms_pull_ctl_enable(chip);
540 if (retval != STATUS_SUCCESS) {
544 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
545 FPGA_MS_PULL_CTL_BIT | 0x20, 0);
551 if (!chip->ft2_fast_mode) {
552 retval = card_power_on(chip, MS_CARD);
553 if (retval != STATUS_SUCCESS) {
560 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
561 oc_mask = MS_OC_NOW | MS_OC_EVER;
563 oc_mask = SD_OC_NOW | SD_OC_EVER;
565 if (chip->ocp_stat & oc_mask) {
566 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
573 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
579 if (chip->asic_code) {
580 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
589 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
590 SAMPLE_TIME_FALLING |
598 retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF,
599 NO_WAIT_INT | NO_AUTO_READ_INT_REG);
603 retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
604 MS_STOP | MS_CLR_ERR);
609 retval = ms_set_init_para(chip);
610 if (retval != STATUS_SUCCESS) {
614 return STATUS_SUCCESS;
617 static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
619 struct ms_info *ms_card = &chip->ms_card;
623 retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1);
624 if (retval != STATUS_SUCCESS) {
628 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
629 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG,
631 if (retval == STATUS_SUCCESS)
634 if (i == MS_MAX_RETRY_COUNT) {
638 retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val);
642 dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
645 ms_card->check_ms_flow = 1;
650 retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val);
654 dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
656 ms_card->check_ms_flow = 1;
660 retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val);
664 dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
666 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
671 chip->card_wp |= MS_CARD;
673 chip->card_wp &= ~MS_CARD;
675 } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
676 chip->card_wp |= MS_CARD;
678 ms_card->check_ms_flow = 1;
682 ms_card->ms_type |= TYPE_MSPRO;
684 retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val);
688 dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
690 ms_card->ms_type &= 0x0F;
691 } else if (val == 7) {
693 ms_card->ms_type |= MS_HG;
695 ms_card->ms_type &= 0x0F;
701 return STATUS_SUCCESS;
704 static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
709 /* Confirm CPU StartUp */
712 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
713 ms_set_err_code(chip, MS_NO_CARD);
717 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
718 retval = ms_read_bytes(chip, GET_INT, 1,
719 NO_WAIT_INT, &val, 1);
720 if (retval == STATUS_SUCCESS)
723 if (i == MS_MAX_RETRY_COUNT) {
733 } while (!(val & INT_REG_CED));
735 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
736 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
737 if (retval == STATUS_SUCCESS)
740 if (i == MS_MAX_RETRY_COUNT) {
744 if (val & INT_REG_ERR) {
745 if (val & INT_REG_CMDNK) {
746 chip->card_wp |= (MS_CARD);
751 /* -- end confirm CPU startup */
753 return STATUS_SUCCESS;
756 static int ms_switch_parallel_bus(struct rtsx_chip *chip)
761 data[0] = PARALLEL_4BIT_IF;
763 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
764 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT,
766 if (retval == STATUS_SUCCESS)
769 if (retval != STATUS_SUCCESS) {
773 return STATUS_SUCCESS;
776 static int ms_switch_8bit_bus(struct rtsx_chip *chip)
778 struct ms_info *ms_card = &chip->ms_card;
782 data[0] = PARALLEL_8BIT_IF;
784 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
785 retval = ms_write_bytes(chip, WRITE_REG, 1,
786 NO_WAIT_INT, data, 2);
787 if (retval == STATUS_SUCCESS)
790 if (retval != STATUS_SUCCESS) {
794 retval = rtsx_write_register(chip, MS_CFG, 0x98,
795 MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
799 ms_card->ms_type |= MS_8BIT;
800 retval = ms_set_init_para(chip);
801 if (retval != STATUS_SUCCESS) {
805 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
806 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT,
808 if (retval != STATUS_SUCCESS) {
813 return STATUS_SUCCESS;
816 static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
818 struct ms_info *ms_card = &chip->ms_card;
821 for (i = 0; i < 3; i++) {
822 retval = ms_prepare_reset(chip);
823 if (retval != STATUS_SUCCESS) {
827 retval = ms_identify_media_type(chip, switch_8bit_bus);
828 if (retval != STATUS_SUCCESS) {
832 retval = ms_confirm_cpu_startup(chip);
833 if (retval != STATUS_SUCCESS) {
837 retval = ms_switch_parallel_bus(chip);
838 if (retval != STATUS_SUCCESS) {
839 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
840 ms_set_err_code(chip, MS_NO_CARD);
849 if (retval != STATUS_SUCCESS) {
853 /* Switch MS-PRO into Parallel mode */
854 retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
858 retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD,
864 retval = ms_set_init_para(chip);
865 if (retval != STATUS_SUCCESS) {
869 /* If MSPro HG Card, We shall try to switch to 8-bit bus */
870 if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
871 retval = ms_switch_8bit_bus(chip);
872 if (retval != STATUS_SUCCESS) {
873 ms_card->switch_8bit_fail = 1;
878 return STATUS_SUCCESS;
882 static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
887 ms_cleanup_work(chip);
889 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
890 if (retval != STATUS_SUCCESS) {
901 retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6);
902 if (retval != STATUS_SUCCESS) {
906 retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
907 if (retval != STATUS_SUCCESS) {
911 retval = rtsx_read_register(chip, MS_TRANS_CFG, buf);
915 if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) {
919 return STATUS_SUCCESS;
923 static int ms_read_attribute_info(struct rtsx_chip *chip)
925 struct ms_info *ms_card = &chip->ms_card;
927 u8 val, *buf, class_code, device_type, sub_class, data[16];
928 u16 total_blk = 0, blk_size = 0;
930 u32 xc_total_blk = 0, xc_blk_size = 0;
932 u32 sys_info_addr = 0, sys_info_size;
933 #ifdef SUPPORT_PCGL_1P18
934 u32 model_name_addr = 0, model_name_size;
935 int found_sys_info = 0, found_model_name = 0;
938 retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7);
939 if (retval != STATUS_SUCCESS) {
943 if (CHK_MS8BIT(ms_card))
944 data[0] = PARALLEL_8BIT_IF;
946 data[0] = PARALLEL_4BIT_IF;
957 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
958 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT,
960 if (retval == STATUS_SUCCESS)
963 if (retval != STATUS_SUCCESS) {
967 buf = kmalloc(64 * 512, GFP_KERNEL);
972 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
973 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
974 if (retval != STATUS_SUCCESS)
977 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
978 if (retval != STATUS_SUCCESS) {
982 if (!(val & MS_INT_BREQ)) {
986 retval = ms_transfer_data(chip, MS_TM_AUTO_READ,
987 PRO_READ_LONG_DATA, 0x40, WAIT_INT,
988 0, 0, buf, 64 * 512);
989 if (retval == STATUS_SUCCESS)
992 rtsx_clear_ms_error(chip);
994 if (retval != STATUS_SUCCESS) {
1001 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
1002 if (retval != STATUS_SUCCESS) {
1007 if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
1010 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ,
1011 PRO_READ_LONG_DATA, 0, WAIT_INT);
1012 if (retval != STATUS_SUCCESS) {
1020 if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
1021 /* Signature code is wrong */
1026 if ((buf[4] < 1) || (buf[4] > 12)) {
1031 for (i = 0; i < buf[4]; i++) {
1032 int cur_addr_off = 16 + i * 12;
1035 if ((buf[cur_addr_off + 8] == 0x10) ||
1036 (buf[cur_addr_off + 8] == 0x13)) {
1038 if (buf[cur_addr_off + 8] == 0x10) {
1040 sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1041 ((u32)buf[cur_addr_off + 1] << 16) |
1042 ((u32)buf[cur_addr_off + 2] << 8) |
1043 buf[cur_addr_off + 3];
1044 sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
1045 ((u32)buf[cur_addr_off + 5] << 16) |
1046 ((u32)buf[cur_addr_off + 6] << 8) |
1047 buf[cur_addr_off + 7];
1048 dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
1049 sys_info_addr, sys_info_size);
1050 if (sys_info_size != 96) {
1054 if (sys_info_addr < 0x1A0) {
1058 if ((sys_info_size + sys_info_addr) > 0x8000) {
1064 if (buf[cur_addr_off + 8] == 0x13)
1065 ms_card->ms_type |= MS_XC;
1067 #ifdef SUPPORT_PCGL_1P18
1073 #ifdef SUPPORT_PCGL_1P18
1074 if (buf[cur_addr_off + 8] == 0x15) {
1075 model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1076 ((u32)buf[cur_addr_off + 1] << 16) |
1077 ((u32)buf[cur_addr_off + 2] << 8) |
1078 buf[cur_addr_off + 3];
1079 model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
1080 ((u32)buf[cur_addr_off + 5] << 16) |
1081 ((u32)buf[cur_addr_off + 6] << 8) |
1082 buf[cur_addr_off + 7];
1083 dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n",
1084 model_name_addr, model_name_size);
1085 if (model_name_size != 48) {
1089 if (model_name_addr < 0x1A0) {
1093 if ((model_name_size + model_name_addr) > 0x8000) {
1098 found_model_name = 1;
1101 if (found_sys_info && found_model_name)
1111 class_code = buf[sys_info_addr + 0];
1112 device_type = buf[sys_info_addr + 56];
1113 sub_class = buf[sys_info_addr + 46];
1115 if (CHK_MSXC(ms_card)) {
1116 xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
1117 ((u32)buf[sys_info_addr + 7] << 16) |
1118 ((u32)buf[sys_info_addr + 8] << 8) |
1119 buf[sys_info_addr + 9];
1120 xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
1121 ((u32)buf[sys_info_addr + 33] << 16) |
1122 ((u32)buf[sys_info_addr + 34] << 8) |
1123 buf[sys_info_addr + 35];
1124 dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
1125 xc_total_blk, xc_blk_size);
1127 total_blk = ((u16)buf[sys_info_addr + 6] << 8) |
1128 buf[sys_info_addr + 7];
1129 blk_size = ((u16)buf[sys_info_addr + 2] << 8) |
1130 buf[sys_info_addr + 3];
1131 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1132 total_blk, blk_size);
1135 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1136 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1137 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1138 total_blk, blk_size);
1141 dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
1142 class_code, device_type, sub_class);
1144 memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
1145 #ifdef SUPPORT_PCGL_1P18
1146 memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
1152 if (CHK_MSXC(ms_card)) {
1153 if (class_code != 0x03) {
1157 if (class_code != 0x02) {
1162 if (class_code != 0x02) {
1167 if (device_type != 0x00) {
1168 if ((device_type == 0x01) || (device_type == 0x02) ||
1169 (device_type == 0x03)) {
1170 chip->card_wp |= MS_CARD;
1176 if (sub_class & 0xC0) {
1180 dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1181 class_code, device_type, sub_class);
1184 if (CHK_MSXC(ms_card)) {
1185 chip->capacity[chip->card2lun[MS_CARD]] =
1186 ms_card->capacity = xc_total_blk * xc_blk_size;
1188 chip->capacity[chip->card2lun[MS_CARD]] =
1189 ms_card->capacity = total_blk * blk_size;
1192 ms_card->capacity = total_blk * blk_size;
1193 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
1196 return STATUS_SUCCESS;
1199 #ifdef SUPPORT_MAGIC_GATE
1200 static int mg_set_tpc_para_sub(struct rtsx_chip *chip,
1201 int type, u8 mg_entry_num);
1204 static int reset_ms_pro(struct rtsx_chip *chip)
1206 struct ms_info *ms_card = &chip->ms_card;
1208 #ifdef XC_POWERCLASS
1209 u8 change_power_class;
1211 if (chip->ms_power_class_en & 0x02)
1212 change_power_class = 2;
1213 else if (chip->ms_power_class_en & 0x01)
1214 change_power_class = 1;
1216 change_power_class = 0;
1219 #ifdef XC_POWERCLASS
1222 retval = ms_pro_reset_flow(chip, 1);
1223 if (retval != STATUS_SUCCESS) {
1224 if (ms_card->switch_8bit_fail) {
1225 retval = ms_pro_reset_flow(chip, 0);
1226 if (retval != STATUS_SUCCESS) {
1234 retval = ms_read_attribute_info(chip);
1235 if (retval != STATUS_SUCCESS) {
1239 #ifdef XC_POWERCLASS
1240 if (CHK_HG8BIT(ms_card))
1241 change_power_class = 0;
1243 if (change_power_class && CHK_MSXC(ms_card)) {
1244 u8 power_class_en = chip->ms_power_class_en;
1246 dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n",
1248 dev_dbg(rtsx_dev(chip), "change_power_class = %d\n",
1249 change_power_class);
1251 if (change_power_class)
1252 power_class_en &= (1 << (change_power_class - 1));
1256 if (power_class_en) {
1257 u8 power_class_mode =
1258 (ms_card->raw_sys_info[46] & 0x18) >> 3;
1259 dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x",
1261 if (change_power_class > power_class_mode)
1262 change_power_class = power_class_mode;
1263 if (change_power_class) {
1264 retval = msxc_change_power(chip,
1265 change_power_class);
1266 if (retval != STATUS_SUCCESS) {
1267 change_power_class--;
1275 #ifdef SUPPORT_MAGIC_GATE
1276 retval = mg_set_tpc_para_sub(chip, 0, 0);
1277 if (retval != STATUS_SUCCESS) {
1282 if (CHK_HG8BIT(ms_card))
1283 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1285 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1287 return STATUS_SUCCESS;
1290 static int ms_read_status_reg(struct rtsx_chip *chip)
1295 retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0);
1296 if (retval != STATUS_SUCCESS) {
1300 retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1301 if (retval != STATUS_SUCCESS) {
1305 if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1306 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1310 return STATUS_SUCCESS;
1313 static int ms_read_extra_data(struct rtsx_chip *chip,
1314 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1316 struct ms_info *ms_card = &chip->ms_card;
1320 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1322 if (retval != STATUS_SUCCESS) {
1326 if (CHK_MS4BIT(ms_card)) {
1327 /* Parallel interface */
1330 /* Serial interface */
1334 data[2] = (u8)(block_addr >> 8);
1335 data[3] = (u8)block_addr;
1339 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1340 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1342 if (retval == STATUS_SUCCESS)
1345 if (i == MS_MAX_RETRY_COUNT) {
1349 ms_set_err_code(chip, MS_NO_ERROR);
1351 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1352 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1353 if (retval == STATUS_SUCCESS)
1356 if (i == MS_MAX_RETRY_COUNT) {
1360 ms_set_err_code(chip, MS_NO_ERROR);
1361 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1362 if (retval != STATUS_SUCCESS) {
1366 if (val & INT_REG_CMDNK) {
1367 ms_set_err_code(chip, MS_CMD_NK);
1370 if (val & INT_REG_CED) {
1371 if (val & INT_REG_ERR) {
1372 retval = ms_read_status_reg(chip);
1373 if (retval != STATUS_SUCCESS) {
1377 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1378 MS_EXTRA_SIZE, SystemParm,
1380 if (retval != STATUS_SUCCESS) {
1386 retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT,
1387 data, MS_EXTRA_SIZE);
1388 if (retval != STATUS_SUCCESS) {
1392 if (buf && buf_len) {
1393 if (buf_len > MS_EXTRA_SIZE)
1394 buf_len = MS_EXTRA_SIZE;
1395 memcpy(buf, data, buf_len);
1398 return STATUS_SUCCESS;
1401 static int ms_write_extra_data(struct rtsx_chip *chip, u16 block_addr,
1402 u8 page_num, u8 *buf, int buf_len)
1404 struct ms_info *ms_card = &chip->ms_card;
1408 if (!buf || (buf_len < MS_EXTRA_SIZE)) {
1412 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1413 SystemParm, 6 + MS_EXTRA_SIZE);
1414 if (retval != STATUS_SUCCESS) {
1418 if (CHK_MS4BIT(ms_card))
1424 data[2] = (u8)(block_addr >> 8);
1425 data[3] = (u8)block_addr;
1429 for (i = 6; i < MS_EXTRA_SIZE + 6; i++)
1430 data[i] = buf[i - 6];
1432 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1433 NO_WAIT_INT, data, 16);
1434 if (retval != STATUS_SUCCESS) {
1438 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1439 if (retval != STATUS_SUCCESS) {
1443 ms_set_err_code(chip, MS_NO_ERROR);
1444 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1445 if (retval != STATUS_SUCCESS) {
1449 if (val & INT_REG_CMDNK) {
1450 ms_set_err_code(chip, MS_CMD_NK);
1453 if (val & INT_REG_CED) {
1454 if (val & INT_REG_ERR) {
1455 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1460 return STATUS_SUCCESS;
1463 static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1465 struct ms_info *ms_card = &chip->ms_card;
1469 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1471 if (retval != STATUS_SUCCESS) {
1475 if (CHK_MS4BIT(ms_card))
1481 data[2] = (u8)(block_addr >> 8);
1482 data[3] = (u8)block_addr;
1486 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1487 if (retval != STATUS_SUCCESS) {
1491 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1492 if (retval != STATUS_SUCCESS) {
1496 ms_set_err_code(chip, MS_NO_ERROR);
1497 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1498 if (retval != STATUS_SUCCESS) {
1502 if (val & INT_REG_CMDNK) {
1503 ms_set_err_code(chip, MS_CMD_NK);
1507 if (val & INT_REG_CED) {
1508 if (val & INT_REG_ERR) {
1509 if (!(val & INT_REG_BREQ)) {
1510 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1513 retval = ms_read_status_reg(chip);
1514 if (retval != STATUS_SUCCESS)
1515 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1518 if (!(val & INT_REG_BREQ)) {
1519 ms_set_err_code(chip, MS_BREQ_ERROR);
1525 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA,
1527 if (retval != STATUS_SUCCESS) {
1531 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1535 return STATUS_SUCCESS;
1538 static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1540 struct ms_info *ms_card = &chip->ms_card;
1542 u8 val, data[8], extra[MS_EXTRA_SIZE];
1544 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1545 if (retval != STATUS_SUCCESS) {
1549 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1551 if (retval != STATUS_SUCCESS) {
1555 ms_set_err_code(chip, MS_NO_ERROR);
1557 if (CHK_MS4BIT(ms_card))
1563 data[2] = (u8)(phy_blk >> 8);
1564 data[3] = (u8)phy_blk;
1567 data[6] = extra[0] & 0x7F;
1570 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7);
1571 if (retval != STATUS_SUCCESS) {
1575 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1576 if (retval != STATUS_SUCCESS) {
1580 ms_set_err_code(chip, MS_NO_ERROR);
1581 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1582 if (retval != STATUS_SUCCESS) {
1586 if (val & INT_REG_CMDNK) {
1587 ms_set_err_code(chip, MS_CMD_NK);
1591 if (val & INT_REG_CED) {
1592 if (val & INT_REG_ERR) {
1593 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1598 return STATUS_SUCCESS;
1601 static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1603 struct ms_info *ms_card = &chip->ms_card;
1607 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1609 if (retval != STATUS_SUCCESS) {
1613 ms_set_err_code(chip, MS_NO_ERROR);
1615 if (CHK_MS4BIT(ms_card))
1621 data[2] = (u8)(phy_blk >> 8);
1622 data[3] = (u8)phy_blk;
1626 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1627 if (retval != STATUS_SUCCESS) {
1632 retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1633 if (retval != STATUS_SUCCESS) {
1637 ms_set_err_code(chip, MS_NO_ERROR);
1638 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1639 if (retval != STATUS_SUCCESS) {
1643 if (val & INT_REG_CMDNK) {
1649 ms_set_err_code(chip, MS_CMD_NK);
1650 ms_set_bad_block(chip, phy_blk);
1654 if (val & INT_REG_CED) {
1655 if (val & INT_REG_ERR) {
1656 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1661 return STATUS_SUCCESS;
1664 static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1666 if (!extra || (extra_len < MS_EXTRA_SIZE))
1669 memset(extra, 0xFF, MS_EXTRA_SIZE);
1671 if (type == setPS_NG) {
1672 /* set page status as 1:NG,and block status keep 1:OK */
1675 /* set page status as 0:Data Error,and block status keep 1:OK */
1679 extra[2] = (u8)(log_blk >> 8);
1680 extra[3] = (u8)log_blk;
1683 static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
1684 u8 start_page, u8 end_page)
1687 u8 extra[MS_EXTRA_SIZE], i;
1689 memset(extra, 0xff, MS_EXTRA_SIZE);
1691 extra[0] = 0xf8; /* Block, page OK, data erased */
1693 extra[2] = (u8)(log_blk >> 8);
1694 extra[3] = (u8)log_blk;
1696 for (i = start_page; i < end_page; i++) {
1697 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1698 ms_set_err_code(chip, MS_NO_CARD);
1702 retval = ms_write_extra_data(chip, phy_blk, i,
1703 extra, MS_EXTRA_SIZE);
1704 if (retval != STATUS_SUCCESS) {
1709 return STATUS_SUCCESS;
1712 static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1713 u16 log_blk, u8 start_page, u8 end_page)
1715 struct ms_info *ms_card = &chip->ms_card;
1716 bool uncorrect_flag = false;
1717 int retval, rty_cnt;
1718 u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1720 dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1721 old_blk, new_blk, log_blk);
1722 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n",
1723 start_page, end_page);
1725 retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1726 if (retval != STATUS_SUCCESS) {
1730 retval = ms_read_status_reg(chip);
1731 if (retval != STATUS_SUCCESS) {
1735 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
1740 if (val & BUF_FULL) {
1741 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1742 if (retval != STATUS_SUCCESS) {
1746 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1747 if (retval != STATUS_SUCCESS) {
1751 if (!(val & INT_REG_CED)) {
1752 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1757 for (i = start_page; i < end_page; i++) {
1758 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1759 ms_set_err_code(chip, MS_NO_CARD);
1763 ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1765 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1766 MS_EXTRA_SIZE, SystemParm, 6);
1767 if (retval != STATUS_SUCCESS) {
1771 ms_set_err_code(chip, MS_NO_ERROR);
1773 if (CHK_MS4BIT(ms_card))
1779 data[2] = (u8)(old_blk >> 8);
1780 data[3] = (u8)old_blk;
1784 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1786 if (retval != STATUS_SUCCESS) {
1790 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1791 if (retval != STATUS_SUCCESS) {
1795 ms_set_err_code(chip, MS_NO_ERROR);
1796 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1797 if (retval != STATUS_SUCCESS) {
1801 if (val & INT_REG_CMDNK) {
1802 ms_set_err_code(chip, MS_CMD_NK);
1806 if (val & INT_REG_CED) {
1807 if (val & INT_REG_ERR) {
1808 retval = ms_read_status_reg(chip);
1809 if (retval != STATUS_SUCCESS) {
1810 uncorrect_flag = true;
1811 dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
1813 uncorrect_flag = false;
1816 retval = ms_transfer_tpc(chip,
1820 if (retval != STATUS_SUCCESS) {
1824 if (uncorrect_flag) {
1825 ms_set_page_status(log_blk, setPS_NG,
1831 ms_write_extra_data(chip, old_blk, i,
1834 dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n",
1836 MS_SET_BAD_BLOCK_FLG(ms_card);
1838 ms_set_page_status(log_blk, setPS_Error,
1841 ms_write_extra_data(chip, new_blk, i,
1847 for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT;
1849 retval = ms_transfer_tpc(
1854 if (retval == STATUS_SUCCESS)
1857 if (rty_cnt == MS_MAX_RETRY_COUNT) {
1862 if (!(val & INT_REG_BREQ)) {
1863 ms_set_err_code(chip, MS_BREQ_ERROR);
1868 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1869 SystemParm, (6 + MS_EXTRA_SIZE));
1871 ms_set_err_code(chip, MS_NO_ERROR);
1873 if (CHK_MS4BIT(ms_card))
1879 data[2] = (u8)(new_blk >> 8);
1880 data[3] = (u8)new_blk;
1884 if ((extra[0] & 0x60) != 0x60)
1890 data[6 + 2] = (u8)(log_blk >> 8);
1891 data[6 + 3] = (u8)log_blk;
1893 for (j = 4; j <= MS_EXTRA_SIZE; j++)
1896 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1897 NO_WAIT_INT, data, 16);
1898 if (retval != STATUS_SUCCESS) {
1902 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1903 if (retval != STATUS_SUCCESS) {
1907 ms_set_err_code(chip, MS_NO_ERROR);
1908 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1909 if (retval != STATUS_SUCCESS) {
1913 if (val & INT_REG_CMDNK) {
1914 ms_set_err_code(chip, MS_CMD_NK);
1918 if (val & INT_REG_CED) {
1919 if (val & INT_REG_ERR) {
1920 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1926 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1927 MS_EXTRA_SIZE, SystemParm,
1929 if (retval != STATUS_SUCCESS) {
1933 ms_set_err_code(chip, MS_NO_ERROR);
1935 if (CHK_MS4BIT(ms_card))
1941 data[2] = (u8)(old_blk >> 8);
1942 data[3] = (u8)old_blk;
1948 retval = ms_write_bytes(chip, WRITE_REG, 7,
1949 NO_WAIT_INT, data, 8);
1950 if (retval != STATUS_SUCCESS) {
1954 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1955 if (retval != STATUS_SUCCESS) {
1959 ms_set_err_code(chip, MS_NO_ERROR);
1960 retval = ms_read_bytes(chip, GET_INT, 1,
1961 NO_WAIT_INT, &val, 1);
1962 if (retval != STATUS_SUCCESS) {
1966 if (val & INT_REG_CMDNK) {
1967 ms_set_err_code(chip, MS_CMD_NK);
1971 if (val & INT_REG_CED) {
1972 if (val & INT_REG_ERR) {
1973 ms_set_err_code(chip,
1974 MS_FLASH_WRITE_ERROR);
1981 return STATUS_SUCCESS;
1984 static int reset_ms(struct rtsx_chip *chip)
1986 struct ms_info *ms_card = &chip->ms_card;
1988 u16 i, reg_addr, block_size;
1989 u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
1990 #ifndef SUPPORT_MAGIC_GATE
1994 retval = ms_prepare_reset(chip);
1995 if (retval != STATUS_SUCCESS) {
1999 ms_card->ms_type |= TYPE_MS;
2001 retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
2002 if (retval != STATUS_SUCCESS) {
2006 retval = ms_read_status_reg(chip);
2007 if (retval != STATUS_SUCCESS) {
2011 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
2015 if (val & WRT_PRTCT)
2016 chip->card_wp |= MS_CARD;
2018 chip->card_wp &= ~MS_CARD;
2023 /* Search Boot Block */
2024 while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
2025 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2026 ms_set_err_code(chip, MS_NO_CARD);
2030 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
2031 if (retval != STATUS_SUCCESS) {
2036 if (extra[0] & BLOCK_OK) {
2037 if (!(extra[1] & NOT_BOOT_BLOCK)) {
2038 ms_card->boot_block = i;
2045 if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
2046 dev_dbg(rtsx_dev(chip), "No boot block found!");
2050 for (j = 0; j < 3; j++) {
2051 retval = ms_read_page(chip, ms_card->boot_block, j);
2052 if (retval != STATUS_SUCCESS) {
2053 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
2054 i = ms_card->boot_block + 1;
2055 ms_set_err_code(chip, MS_NO_ERROR);
2061 retval = ms_read_page(chip, ms_card->boot_block, 0);
2062 if (retval != STATUS_SUCCESS) {
2066 /* Read MS system information as sys_info */
2067 rtsx_init_cmd(chip);
2069 for (i = 0; i < 96; i++)
2070 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
2072 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2077 ptr = rtsx_get_cmd_data(chip);
2078 memcpy(ms_card->raw_sys_info, ptr, 96);
2080 /* Read useful block contents */
2081 rtsx_init_cmd(chip);
2083 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
2084 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
2086 for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3;
2088 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2090 for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
2091 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2093 rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0);
2094 rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
2096 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2101 ptr = rtsx_get_cmd_data(chip);
2103 dev_dbg(rtsx_dev(chip), "Boot block data:\n");
2104 dev_dbg(rtsx_dev(chip), "%*ph\n", 16, ptr);
2107 * HEADER_ID0, HEADER_ID1
2109 if (ptr[0] != 0x00 || ptr[1] != 0x01) {
2110 i = ms_card->boot_block + 1;
2115 * PAGE_SIZE_0, PAGE_SIZE_1
2117 if (ptr[12] != 0x02 || ptr[13] != 0x00) {
2118 i = ms_card->boot_block + 1;
2122 if ((ptr[14] == 1) || (ptr[14] == 3))
2123 chip->card_wp |= MS_CARD;
2125 /* BLOCK_SIZE_0, BLOCK_SIZE_1 */
2126 block_size = ((u16)ptr[6] << 8) | ptr[7];
2127 if (block_size == 0x0010) {
2128 /* Block size 16KB */
2129 ms_card->block_shift = 5;
2130 ms_card->page_off = 0x1F;
2131 } else if (block_size == 0x0008) {
2132 /* Block size 8KB */
2133 ms_card->block_shift = 4;
2134 ms_card->page_off = 0x0F;
2137 /* BLOCK_COUNT_0, BLOCK_COUNT_1 */
2138 ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
2140 #ifdef SUPPORT_MAGIC_GATE
2143 if (ms_card->block_shift == 4) { /* 4MB or 8MB */
2144 if (j < 2) { /* Effective block for 4MB: 0x1F0 */
2145 ms_card->capacity = 0x1EE0;
2146 } else { /* Effective block for 8MB: 0x3E0 */
2147 ms_card->capacity = 0x3DE0;
2149 } else { /* 16MB, 32MB, 64MB or 128MB */
2150 if (j < 5) { /* Effective block for 16MB: 0x3E0 */
2151 ms_card->capacity = 0x7BC0;
2152 } else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */
2153 ms_card->capacity = 0xF7C0;
2154 } else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */
2155 ms_card->capacity = 0x1EF80;
2156 } else { /* Effective block for 128MB: 0x1F00 */
2157 ms_card->capacity = 0x3DF00;
2161 /* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */
2162 eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
2164 ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
2167 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
2169 /* Switch I/F Mode */
2171 retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1);
2172 if (retval != STATUS_SUCCESS) {
2176 retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88);
2180 retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0);
2185 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
2187 if (retval != STATUS_SUCCESS) {
2191 retval = rtsx_write_register(chip, MS_CFG,
2192 0x58 | MS_NO_CHECK_INT,
2200 ms_card->ms_type |= MS_4BIT;
2203 if (CHK_MS4BIT(ms_card))
2204 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
2206 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
2208 return STATUS_SUCCESS;
2211 static int ms_init_l2p_tbl(struct rtsx_chip *chip)
2213 struct ms_info *ms_card = &chip->ms_card;
2214 int size, i, seg_no, retval;
2215 u16 defect_block, reg_addr;
2218 ms_card->segment_cnt = ms_card->total_block >> 9;
2219 dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n",
2220 ms_card->segment_cnt);
2222 size = ms_card->segment_cnt * sizeof(struct zone_entry);
2223 ms_card->segment = vzalloc(size);
2224 if (!ms_card->segment) {
2228 retval = ms_read_page(chip, ms_card->boot_block, 1);
2229 if (retval != STATUS_SUCCESS) {
2233 reg_addr = PPBUF_BASE2;
2234 for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
2237 retval = rtsx_read_register(chip, reg_addr++, &val1);
2238 if (retval != STATUS_SUCCESS) {
2242 retval = rtsx_read_register(chip, reg_addr++, &val2);
2243 if (retval != STATUS_SUCCESS) {
2247 defect_block = ((u16)val1 << 8) | val2;
2248 if (defect_block == 0xFFFF)
2251 seg_no = defect_block / 512;
2253 block_no = ms_card->segment[seg_no].disable_count++;
2254 ms_card->segment[seg_no].defect_list[block_no] = defect_block;
2257 for (i = 0; i < ms_card->segment_cnt; i++) {
2258 ms_card->segment[i].build_flag = 0;
2259 ms_card->segment[i].l2p_table = NULL;
2260 ms_card->segment[i].free_table = NULL;
2261 ms_card->segment[i].get_index = 0;
2262 ms_card->segment[i].set_index = 0;
2263 ms_card->segment[i].unused_blk_cnt = 0;
2265 dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n",
2266 i, ms_card->segment[i].disable_count);
2269 return STATUS_SUCCESS;
2272 vfree(ms_card->segment);
2273 ms_card->segment = NULL;
2278 static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2280 struct ms_info *ms_card = &chip->ms_card;
2281 struct zone_entry *segment;
2283 if (!ms_card->segment)
2286 segment = &ms_card->segment[seg_no];
2288 if (segment->l2p_table)
2289 return segment->l2p_table[log_off];
2294 static void ms_set_l2p_tbl(struct rtsx_chip *chip,
2295 int seg_no, u16 log_off, u16 phy_blk)
2297 struct ms_info *ms_card = &chip->ms_card;
2298 struct zone_entry *segment;
2300 if (!ms_card->segment)
2303 segment = &ms_card->segment[seg_no];
2304 if (segment->l2p_table)
2305 segment->l2p_table[log_off] = phy_blk;
2308 static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2310 struct ms_info *ms_card = &chip->ms_card;
2311 struct zone_entry *segment;
2314 seg_no = (int)phy_blk >> 9;
2315 segment = &ms_card->segment[seg_no];
2317 segment->free_table[segment->set_index++] = phy_blk;
2318 if (segment->set_index >= MS_FREE_TABLE_CNT)
2319 segment->set_index = 0;
2321 segment->unused_blk_cnt++;
2324 static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2326 struct ms_info *ms_card = &chip->ms_card;
2327 struct zone_entry *segment;
2330 segment = &ms_card->segment[seg_no];
2332 if (segment->unused_blk_cnt <= 0)
2335 phy_blk = segment->free_table[segment->get_index];
2336 segment->free_table[segment->get_index++] = 0xFFFF;
2337 if (segment->get_index >= MS_FREE_TABLE_CNT)
2338 segment->get_index = 0;
2340 segment->unused_blk_cnt--;
2345 static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478,
2346 2974, 3470, 3966, 4462, 4958,
2347 5454, 5950, 6446, 6942, 7438,
2350 static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk,
2351 u16 log_off, u8 us1, u8 us2)
2353 struct ms_info *ms_card = &chip->ms_card;
2354 struct zone_entry *segment;
2358 seg_no = (int)phy_blk >> 9;
2359 segment = &ms_card->segment[seg_no];
2360 tmp_blk = segment->l2p_table[log_off];
2364 if (!(chip->card_wp & MS_CARD))
2365 ms_erase_block(chip, tmp_blk);
2367 ms_set_unused_block(chip, tmp_blk);
2368 segment->l2p_table[log_off] = phy_blk;
2370 if (!(chip->card_wp & MS_CARD))
2371 ms_erase_block(chip, phy_blk);
2373 ms_set_unused_block(chip, phy_blk);
2376 if (phy_blk < tmp_blk) {
2377 if (!(chip->card_wp & MS_CARD))
2378 ms_erase_block(chip, phy_blk);
2380 ms_set_unused_block(chip, phy_blk);
2382 if (!(chip->card_wp & MS_CARD))
2383 ms_erase_block(chip, tmp_blk);
2385 ms_set_unused_block(chip, tmp_blk);
2386 segment->l2p_table[log_off] = phy_blk;
2390 return STATUS_SUCCESS;
2393 static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2395 struct ms_info *ms_card = &chip->ms_card;
2396 struct zone_entry *segment;
2398 int retval, table_size, disable_cnt, i;
2399 u16 start, end, phy_blk, log_blk, tmp_blk, idx;
2400 u8 extra[MS_EXTRA_SIZE], us1, us2;
2402 dev_dbg(rtsx_dev(chip), "%s: %d\n", __func__, seg_no);
2404 if (!ms_card->segment) {
2405 retval = ms_init_l2p_tbl(chip);
2406 if (retval != STATUS_SUCCESS) {
2411 if (ms_card->segment[seg_no].build_flag) {
2412 dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n",
2414 return STATUS_SUCCESS;
2422 segment = &ms_card->segment[seg_no];
2424 if (!segment->l2p_table) {
2425 segment->l2p_table = vmalloc(array_size(table_size, 2));
2426 if (!segment->l2p_table) {
2430 memset((u8 *)(segment->l2p_table), 0xff, table_size * 2);
2432 if (!segment->free_table) {
2433 segment->free_table = vmalloc(MS_FREE_TABLE_CNT * 2);
2434 if (!segment->free_table) {
2438 memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2);
2440 start = (u16)seg_no << 9;
2441 end = (u16)(seg_no + 1) << 9;
2443 disable_cnt = segment->disable_count;
2445 segment->get_index = 0;
2446 segment->set_index = 0;
2447 segment->unused_blk_cnt = 0;
2449 for (phy_blk = start; phy_blk < end; phy_blk++) {
2451 defect_flag = false;
2452 for (i = 0; i < segment->disable_count; i++) {
2453 if (phy_blk == segment->defect_list[i]) {
2464 retval = ms_read_extra_data(chip, phy_blk, 0,
2465 extra, MS_EXTRA_SIZE);
2466 if (retval != STATUS_SUCCESS) {
2467 dev_dbg(rtsx_dev(chip), "read extra data fail\n");
2468 ms_set_bad_block(chip, phy_blk);
2472 if (seg_no == ms_card->segment_cnt - 1) {
2473 if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2474 if (!(chip->card_wp & MS_CARD)) {
2475 retval = ms_erase_block(chip, phy_blk);
2476 if (retval != STATUS_SUCCESS)
2484 if (!(extra[0] & BLOCK_OK))
2486 if (!(extra[1] & NOT_BOOT_BLOCK))
2488 if ((extra[0] & PAGE_OK) != PAGE_OK)
2491 log_blk = ((u16)extra[2] << 8) | extra[3];
2493 if (log_blk == 0xFFFF) {
2494 if (!(chip->card_wp & MS_CARD)) {
2495 retval = ms_erase_block(chip, phy_blk);
2496 if (retval != STATUS_SUCCESS)
2499 ms_set_unused_block(chip, phy_blk);
2503 if ((log_blk < ms_start_idx[seg_no]) ||
2504 (log_blk >= ms_start_idx[seg_no + 1])) {
2505 if (!(chip->card_wp & MS_CARD)) {
2506 retval = ms_erase_block(chip, phy_blk);
2507 if (retval != STATUS_SUCCESS)
2510 ms_set_unused_block(chip, phy_blk);
2514 idx = log_blk - ms_start_idx[seg_no];
2516 if (segment->l2p_table[idx] == 0xFFFF) {
2517 segment->l2p_table[idx] = phy_blk;
2521 us1 = extra[0] & 0x10;
2522 tmp_blk = segment->l2p_table[idx];
2523 retval = ms_read_extra_data(chip, tmp_blk, 0,
2524 extra, MS_EXTRA_SIZE);
2525 if (retval != STATUS_SUCCESS)
2527 us2 = extra[0] & 0x10;
2529 (void)ms_arbitrate_l2p(chip, phy_blk,
2530 log_blk - ms_start_idx[seg_no], us1, us2);
2534 segment->build_flag = 1;
2536 dev_dbg(rtsx_dev(chip), "unused block count: %d\n",
2537 segment->unused_blk_cnt);
2539 /* Logical Address Confirmation Process */
2540 if (seg_no == ms_card->segment_cnt - 1) {
2541 if (segment->unused_blk_cnt < 2)
2542 chip->card_wp |= MS_CARD;
2544 if (segment->unused_blk_cnt < 1)
2545 chip->card_wp |= MS_CARD;
2548 if (chip->card_wp & MS_CARD)
2549 return STATUS_SUCCESS;
2551 for (log_blk = ms_start_idx[seg_no];
2552 log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2553 idx = log_blk - ms_start_idx[seg_no];
2554 if (segment->l2p_table[idx] == 0xFFFF) {
2555 phy_blk = ms_get_unused_block(chip, seg_no);
2556 if (phy_blk == 0xFFFF) {
2557 chip->card_wp |= MS_CARD;
2558 return STATUS_SUCCESS;
2560 retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2561 if (retval != STATUS_SUCCESS) {
2565 segment->l2p_table[idx] = phy_blk;
2566 if (seg_no == ms_card->segment_cnt - 1) {
2567 if (segment->unused_blk_cnt < 2) {
2568 chip->card_wp |= MS_CARD;
2569 return STATUS_SUCCESS;
2572 if (segment->unused_blk_cnt < 1) {
2573 chip->card_wp |= MS_CARD;
2574 return STATUS_SUCCESS;
2580 /* Make boot block be the first normal block */
2582 for (log_blk = 0; log_blk < 494; log_blk++) {
2583 tmp_blk = segment->l2p_table[log_blk];
2584 if (tmp_blk < ms_card->boot_block) {
2585 dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n");
2587 if (chip->card_wp & MS_CARD)
2590 phy_blk = ms_get_unused_block(chip, 0);
2591 retval = ms_copy_page(chip, tmp_blk, phy_blk,
2593 ms_card->page_off + 1);
2594 if (retval != STATUS_SUCCESS) {
2598 segment->l2p_table[log_blk] = phy_blk;
2600 retval = ms_set_bad_block(chip, tmp_blk);
2601 if (retval != STATUS_SUCCESS) {
2608 return STATUS_SUCCESS;
2611 segment->build_flag = 0;
2612 vfree(segment->l2p_table);
2613 segment->l2p_table = NULL;
2614 vfree(segment->free_table);
2615 segment->free_table = NULL;
2620 int reset_ms_card(struct rtsx_chip *chip)
2622 struct ms_info *ms_card = &chip->ms_card;
2623 int seg_no = ms_card->total_block / 512 - 1;
2626 memset(ms_card, 0, sizeof(struct ms_info));
2628 retval = enable_card_clock(chip, MS_CARD);
2629 if (retval != STATUS_SUCCESS) {
2633 retval = select_card(chip, MS_CARD);
2634 if (retval != STATUS_SUCCESS) {
2638 ms_card->ms_type = 0;
2640 retval = reset_ms_pro(chip);
2641 if (retval != STATUS_SUCCESS) {
2642 if (ms_card->check_ms_flow) {
2643 retval = reset_ms(chip);
2644 if (retval != STATUS_SUCCESS) {
2652 retval = ms_set_init_para(chip);
2653 if (retval != STATUS_SUCCESS) {
2657 if (!CHK_MSPRO(ms_card)) {
2658 /* Build table for the last segment,
2659 * to check if L2P table block exists, erasing it
2661 retval = ms_build_l2p_tbl(chip, seg_no);
2662 if (retval != STATUS_SUCCESS) {
2667 dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2669 return STATUS_SUCCESS;
2672 static int mspro_set_rw_cmd(struct rtsx_chip *chip,
2673 u32 start_sec, u16 sec_cnt, u8 cmd)
2679 data[1] = (u8)(sec_cnt >> 8);
2680 data[2] = (u8)sec_cnt;
2681 data[3] = (u8)(start_sec >> 24);
2682 data[4] = (u8)(start_sec >> 16);
2683 data[5] = (u8)(start_sec >> 8);
2684 data[6] = (u8)start_sec;
2687 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2688 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7,
2690 if (retval == STATUS_SUCCESS)
2693 if (i == MS_MAX_RETRY_COUNT) {
2697 return STATUS_SUCCESS;
2700 void mspro_stop_seq_mode(struct rtsx_chip *chip)
2702 struct ms_info *ms_card = &chip->ms_card;
2705 if (ms_card->seq_mode) {
2706 retval = ms_switch_clock(chip);
2707 if (retval != STATUS_SUCCESS)
2710 ms_card->seq_mode = 0;
2711 ms_card->total_sec_cnt = 0;
2712 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2714 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2718 static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2720 struct ms_info *ms_card = &chip->ms_card;
2723 if (chip->asic_code) {
2724 if (ms_card->ms_clock > 30)
2725 ms_card->ms_clock -= 20;
2727 if (ms_card->ms_clock == CLK_80)
2728 ms_card->ms_clock = CLK_60;
2729 else if (ms_card->ms_clock == CLK_60)
2730 ms_card->ms_clock = CLK_40;
2733 retval = ms_switch_clock(chip);
2734 if (retval != STATUS_SUCCESS) {
2738 return STATUS_SUCCESS;
2741 static int mspro_rw_multi_sector(struct scsi_cmnd *srb,
2742 struct rtsx_chip *chip, u32 start_sector,
2745 struct ms_info *ms_card = &chip->ms_card;
2746 bool mode_2k = false;
2749 u8 val, trans_mode, rw_tpc, rw_cmd;
2751 ms_set_err_code(chip, MS_NO_ERROR);
2753 ms_card->cleanup_counter = 0;
2755 if (CHK_MSHG(ms_card)) {
2756 if ((start_sector % 4) || (sector_cnt % 4)) {
2757 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2758 rw_tpc = PRO_READ_LONG_DATA;
2759 rw_cmd = PRO_READ_DATA;
2761 rw_tpc = PRO_WRITE_LONG_DATA;
2762 rw_cmd = PRO_WRITE_DATA;
2765 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2766 rw_tpc = PRO_READ_QUAD_DATA;
2767 rw_cmd = PRO_READ_2K_DATA;
2769 rw_tpc = PRO_WRITE_QUAD_DATA;
2770 rw_cmd = PRO_WRITE_2K_DATA;
2775 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2776 rw_tpc = PRO_READ_LONG_DATA;
2777 rw_cmd = PRO_READ_DATA;
2779 rw_tpc = PRO_WRITE_LONG_DATA;
2780 rw_cmd = PRO_WRITE_DATA;
2784 retval = ms_switch_clock(chip);
2785 if (retval != STATUS_SUCCESS) {
2789 if (srb->sc_data_direction == DMA_FROM_DEVICE)
2790 trans_mode = MS_TM_AUTO_READ;
2792 trans_mode = MS_TM_AUTO_WRITE;
2794 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
2799 if (ms_card->seq_mode) {
2800 if ((ms_card->pre_dir != srb->sc_data_direction) ||
2801 ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) !=
2803 (mode_2k && (ms_card->seq_mode & MODE_512_SEQ)) ||
2804 (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ)) ||
2805 !(val & MS_INT_BREQ) ||
2806 ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
2807 ms_card->seq_mode = 0;
2808 ms_card->total_sec_cnt = 0;
2809 if (val & MS_INT_BREQ) {
2810 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2811 if (retval != STATUS_SUCCESS) {
2815 rtsx_write_register(chip, RBCTL, RB_FLUSH,
2821 if (!ms_card->seq_mode) {
2822 ms_card->total_sec_cnt = 0;
2823 if (sector_cnt >= SEQ_START_CRITERIA) {
2824 if ((ms_card->capacity - start_sector) > 0xFE00)
2827 count = (u16)(ms_card->capacity - start_sector);
2829 if (count > sector_cnt) {
2831 ms_card->seq_mode = MODE_2K_SEQ;
2833 ms_card->seq_mode = MODE_512_SEQ;
2838 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
2839 if (retval != STATUS_SUCCESS) {
2840 ms_card->seq_mode = 0;
2845 retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt,
2846 WAIT_INT, mode_2k, scsi_sg_count(srb),
2847 scsi_sglist(srb), scsi_bufflen(srb));
2848 if (retval != STATUS_SUCCESS) {
2849 ms_card->seq_mode = 0;
2850 rtsx_read_register(chip, MS_TRANS_CFG, &val);
2851 rtsx_clear_ms_error(chip);
2853 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2854 chip->rw_need_retry = 0;
2855 dev_dbg(rtsx_dev(chip), "No card exist, exit %s\n",
2860 if (val & MS_INT_BREQ)
2861 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2863 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
2864 dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n");
2865 chip->rw_need_retry = 1;
2866 ms_auto_tune_clock(chip);
2872 if (ms_card->seq_mode) {
2873 ms_card->pre_sec_addr = start_sector;
2874 ms_card->pre_sec_cnt = sector_cnt;
2875 ms_card->pre_dir = srb->sc_data_direction;
2876 ms_card->total_sec_cnt += sector_cnt;
2879 return STATUS_SUCCESS;
2882 static int mspro_read_format_progress(struct rtsx_chip *chip,
2883 const int short_data_len)
2885 struct ms_info *ms_card = &chip->ms_card;
2887 u32 total_progress, cur_progress;
2891 dev_dbg(rtsx_dev(chip), "%s, short_data_len = %d\n", __func__,
2894 retval = ms_switch_clock(chip);
2895 if (retval != STATUS_SUCCESS) {
2896 ms_card->format_status = FORMAT_FAIL;
2900 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2901 if (retval != STATUS_SUCCESS) {
2902 ms_card->format_status = FORMAT_FAIL;
2906 if (!(tmp & MS_INT_BREQ)) {
2907 if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK |
2908 MS_INT_ERR)) == MS_INT_CED) {
2909 ms_card->format_status = FORMAT_SUCCESS;
2910 return STATUS_SUCCESS;
2912 ms_card->format_status = FORMAT_FAIL;
2916 if (short_data_len >= 256)
2919 cnt = (u8)short_data_len;
2921 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT,
2923 if (retval != STATUS_SUCCESS) {
2924 ms_card->format_status = FORMAT_FAIL;
2928 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT,
2930 if (retval != STATUS_SUCCESS) {
2931 ms_card->format_status = FORMAT_FAIL;
2935 total_progress = (data[0] << 24) | (data[1] << 16) |
2936 (data[2] << 8) | data[3];
2937 cur_progress = (data[4] << 24) | (data[5] << 16) |
2938 (data[6] << 8) | data[7];
2940 dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n",
2941 total_progress, cur_progress);
2943 if (total_progress == 0) {
2944 ms_card->progress = 0;
2946 u64 ulltmp = (u64)cur_progress * (u64)65535;
2948 do_div(ulltmp, total_progress);
2949 ms_card->progress = (u16)ulltmp;
2951 dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress);
2953 for (i = 0; i < 5000; i++) {
2954 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2955 if (retval != STATUS_SUCCESS) {
2956 ms_card->format_status = FORMAT_FAIL;
2959 if (tmp & (MS_INT_CED | MS_INT_CMDNK |
2960 MS_INT_BREQ | MS_INT_ERR))
2966 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
2967 if (retval != STATUS_SUCCESS) {
2968 ms_card->format_status = FORMAT_FAIL;
2973 ms_card->format_status = FORMAT_FAIL;
2977 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
2978 ms_card->format_status = FORMAT_FAIL;
2982 if (tmp & MS_INT_CED) {
2983 ms_card->format_status = FORMAT_SUCCESS;
2984 ms_card->pro_under_formatting = 0;
2985 } else if (tmp & MS_INT_BREQ) {
2986 ms_card->format_status = FORMAT_IN_PROGRESS;
2988 ms_card->format_status = FORMAT_FAIL;
2989 ms_card->pro_under_formatting = 0;
2993 return STATUS_SUCCESS;
2996 void mspro_polling_format_status(struct rtsx_chip *chip)
2998 struct ms_info *ms_card = &chip->ms_card;
3001 if (ms_card->pro_under_formatting &&
3002 (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
3003 rtsx_set_stat(chip, RTSX_STAT_RUN);
3005 for (i = 0; i < 65535; i++) {
3006 mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
3007 if (ms_card->format_status != FORMAT_IN_PROGRESS)
3013 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3014 int short_data_len, bool quick_format)
3016 struct ms_info *ms_card = &chip->ms_card;
3021 retval = ms_switch_clock(chip);
3022 if (retval != STATUS_SUCCESS) {
3026 retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01);
3027 if (retval != STATUS_SUCCESS) {
3032 switch (short_data_len) {
3048 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3049 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1,
3050 NO_WAIT_INT, buf, 2);
3051 if (retval == STATUS_SUCCESS)
3054 if (i == MS_MAX_RETRY_COUNT) {
3063 retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
3064 if (retval != STATUS_SUCCESS) {
3068 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3073 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
3077 if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
3078 ms_card->pro_under_formatting = 1;
3079 ms_card->progress = 0;
3080 ms_card->format_status = FORMAT_IN_PROGRESS;
3081 return STATUS_SUCCESS;
3084 if (tmp & MS_INT_CED) {
3085 ms_card->pro_under_formatting = 0;
3086 ms_card->progress = 0;
3087 ms_card->format_status = FORMAT_SUCCESS;
3088 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
3089 return STATUS_SUCCESS;
3095 static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk,
3096 u16 log_blk, u8 start_page, u8 end_page,
3097 u8 *buf, unsigned int *index,
3098 unsigned int *offset)
3100 struct ms_info *ms_card = &chip->ms_card;
3102 u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
3105 retval = ms_read_extra_data(chip, phy_blk, start_page,
3106 extra, MS_EXTRA_SIZE);
3107 if (retval == STATUS_SUCCESS) {
3108 if ((extra[1] & 0x30) != 0x30) {
3109 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3114 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3116 if (retval != STATUS_SUCCESS) {
3120 if (CHK_MS4BIT(ms_card))
3126 data[2] = (u8)(phy_blk >> 8);
3127 data[3] = (u8)phy_blk;
3129 data[5] = start_page;
3131 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3132 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
3134 if (retval == STATUS_SUCCESS)
3137 if (i == MS_MAX_RETRY_COUNT) {
3141 ms_set_err_code(chip, MS_NO_ERROR);
3143 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
3144 if (retval != STATUS_SUCCESS) {
3150 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3151 ms_set_err_code(chip, MS_NO_ERROR);
3153 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3154 ms_set_err_code(chip, MS_NO_CARD);
3158 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3159 if (retval != STATUS_SUCCESS) {
3163 if (val & INT_REG_CMDNK) {
3164 ms_set_err_code(chip, MS_CMD_NK);
3167 if (val & INT_REG_ERR) {
3168 if (val & INT_REG_BREQ) {
3169 retval = ms_read_status_reg(chip);
3170 if (retval != STATUS_SUCCESS) {
3171 if (!(chip->card_wp & MS_CARD)) {
3182 ms_set_err_code(chip,
3183 MS_FLASH_READ_ERROR);
3187 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3191 if (!(val & INT_REG_BREQ)) {
3192 ms_set_err_code(chip, MS_BREQ_ERROR);
3197 if (page_addr == (end_page - 1)) {
3198 if (!(val & INT_REG_CED)) {
3199 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3200 if (retval != STATUS_SUCCESS) {
3205 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT,
3207 if (retval != STATUS_SUCCESS) {
3211 if (!(val & INT_REG_CED)) {
3212 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3216 trans_cfg = NO_WAIT_INT;
3218 trans_cfg = WAIT_INT;
3221 rtsx_init_cmd(chip);
3223 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3224 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3226 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3229 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
3231 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3232 MS_TRANSFER_START | MS_TM_NORMAL_READ);
3233 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3234 MS_TRANSFER_END, MS_TRANSFER_END);
3236 rtsx_send_cmd_no_wait(chip);
3238 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
3239 scsi_sg_count(chip->srb),
3244 if (retval == -ETIMEDOUT) {
3245 ms_set_err_code(chip, MS_TO_ERROR);
3246 rtsx_clear_ms_error(chip);
3247 return STATUS_TIMEDOUT;
3250 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3251 if (retval != STATUS_SUCCESS) {
3252 ms_set_err_code(chip, MS_TO_ERROR);
3253 rtsx_clear_ms_error(chip);
3254 return STATUS_TIMEDOUT;
3256 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3257 ms_set_err_code(chip, MS_CRC16_ERROR);
3258 rtsx_clear_ms_error(chip);
3263 if (scsi_sg_count(chip->srb) == 0)
3267 return STATUS_SUCCESS;
3270 static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk,
3271 u16 new_blk, u16 log_blk, u8 start_page,
3272 u8 end_page, u8 *buf, unsigned int *index,
3273 unsigned int *offset)
3275 struct ms_info *ms_card = &chip->ms_card;
3277 u8 page_addr, val, data[16];
3281 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3283 if (retval != STATUS_SUCCESS) {
3287 if (CHK_MS4BIT(ms_card))
3293 data[2] = (u8)(old_blk >> 8);
3294 data[3] = (u8)old_blk;
3300 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
3302 if (retval != STATUS_SUCCESS) {
3306 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3307 if (retval != STATUS_SUCCESS) {
3311 ms_set_err_code(chip, MS_NO_ERROR);
3312 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1,
3314 if (retval != STATUS_SUCCESS) {
3319 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3320 SystemParm, (6 + MS_EXTRA_SIZE));
3321 if (retval != STATUS_SUCCESS) {
3325 ms_set_err_code(chip, MS_NO_ERROR);
3327 if (CHK_MS4BIT(ms_card))
3333 data[2] = (u8)(new_blk >> 8);
3334 data[3] = (u8)new_blk;
3335 if ((end_page - start_page) == 1)
3340 data[5] = start_page;
3343 data[8] = (u8)(log_blk >> 8);
3344 data[9] = (u8)log_blk;
3346 for (i = 0x0A; i < 0x10; i++)
3349 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3350 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE,
3351 NO_WAIT_INT, data, 16);
3352 if (retval == STATUS_SUCCESS)
3355 if (i == MS_MAX_RETRY_COUNT) {
3359 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3360 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3361 if (retval == STATUS_SUCCESS)
3364 if (i == MS_MAX_RETRY_COUNT) {
3368 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3369 if (retval != STATUS_SUCCESS) {
3374 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3375 ms_set_err_code(chip, MS_NO_ERROR);
3377 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3378 ms_set_err_code(chip, MS_NO_CARD);
3382 if (val & INT_REG_CMDNK) {
3383 ms_set_err_code(chip, MS_CMD_NK);
3386 if (val & INT_REG_ERR) {
3387 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3390 if (!(val & INT_REG_BREQ)) {
3391 ms_set_err_code(chip, MS_BREQ_ERROR);
3397 rtsx_init_cmd(chip);
3399 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
3400 0xFF, WRITE_PAGE_DATA);
3401 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3403 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3406 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3408 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3409 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
3410 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3411 MS_TRANSFER_END, MS_TRANSFER_END);
3413 rtsx_send_cmd_no_wait(chip);
3415 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
3416 scsi_sg_count(chip->srb),
3421 ms_set_err_code(chip, MS_TO_ERROR);
3422 rtsx_clear_ms_error(chip);
3424 if (retval == -ETIMEDOUT) {
3425 return STATUS_TIMEDOUT;
3430 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3431 if (retval != STATUS_SUCCESS) {
3435 if ((end_page - start_page) == 1) {
3436 if (!(val & INT_REG_CED)) {
3437 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3441 if (page_addr == (end_page - 1)) {
3442 if (!(val & INT_REG_CED)) {
3443 retval = ms_send_cmd(chip, BLOCK_END,
3445 if (retval != STATUS_SUCCESS) {
3450 retval = ms_read_bytes(chip, GET_INT, 1,
3451 NO_WAIT_INT, &val, 1);
3452 if (retval != STATUS_SUCCESS) {
3457 if ((page_addr == (end_page - 1)) ||
3458 (page_addr == ms_card->page_off)) {
3459 if (!(val & INT_REG_CED)) {
3460 ms_set_err_code(chip,
3461 MS_FLASH_WRITE_ERROR);
3467 if (scsi_sg_count(chip->srb) == 0)
3471 return STATUS_SUCCESS;
3474 static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3475 u16 log_blk, u8 page_off)
3477 struct ms_info *ms_card = &chip->ms_card;
3480 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3481 page_off, ms_card->page_off + 1);
3482 if (retval != STATUS_SUCCESS) {
3486 seg_no = old_blk >> 9;
3488 if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3489 MS_CLR_BAD_BLOCK_FLG(ms_card);
3490 ms_set_bad_block(chip, old_blk);
3492 retval = ms_erase_block(chip, old_blk);
3493 if (retval == STATUS_SUCCESS)
3494 ms_set_unused_block(chip, old_blk);
3497 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3499 return STATUS_SUCCESS;
3502 static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3503 u16 log_blk, u8 start_page)
3508 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3510 if (retval != STATUS_SUCCESS) {
3515 return STATUS_SUCCESS;
3518 #ifdef MS_DELAY_WRITE
3519 int ms_delay_write(struct rtsx_chip *chip)
3521 struct ms_info *ms_card = &chip->ms_card;
3522 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3525 if (delay_write->delay_write_flag) {
3526 retval = ms_set_init_para(chip);
3527 if (retval != STATUS_SUCCESS) {
3531 delay_write->delay_write_flag = 0;
3532 retval = ms_finish_write(chip,
3533 delay_write->old_phyblock,
3534 delay_write->new_phyblock,
3535 delay_write->logblock,
3536 delay_write->pageoff);
3537 if (retval != STATUS_SUCCESS) {
3542 return STATUS_SUCCESS;
3546 static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3548 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3549 set_sense_type(chip, SCSI_LUN(srb),
3550 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3552 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3555 static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3556 u32 start_sector, u16 sector_cnt)
3558 struct ms_info *ms_card = &chip->ms_card;
3559 unsigned int lun = SCSI_LUN(srb);
3561 unsigned int index = 0, offset = 0;
3562 u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3563 u8 start_page, end_page = 0, page_cnt;
3565 #ifdef MS_DELAY_WRITE
3566 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3569 ms_set_err_code(chip, MS_NO_ERROR);
3571 ms_card->cleanup_counter = 0;
3573 ptr = (u8 *)scsi_sglist(srb);
3575 retval = ms_switch_clock(chip);
3576 if (retval != STATUS_SUCCESS) {
3577 ms_rw_fail(srb, chip);
3581 log_blk = (u16)(start_sector >> ms_card->block_shift);
3582 start_page = (u8)(start_sector & ms_card->page_off);
3584 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
3585 if (log_blk < ms_start_idx[seg_no + 1])
3589 if (ms_card->segment[seg_no].build_flag == 0) {
3590 retval = ms_build_l2p_tbl(chip, seg_no);
3591 if (retval != STATUS_SUCCESS) {
3592 chip->card_fail |= MS_CARD;
3593 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3598 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3599 #ifdef MS_DELAY_WRITE
3600 if (delay_write->delay_write_flag &&
3601 (delay_write->logblock == log_blk) &&
3602 (start_page > delay_write->pageoff)) {
3603 delay_write->delay_write_flag = 0;
3604 retval = ms_copy_page(chip,
3605 delay_write->old_phyblock,
3606 delay_write->new_phyblock,
3608 delay_write->pageoff, start_page);
3609 if (retval != STATUS_SUCCESS) {
3610 set_sense_type(chip, lun,
3611 SENSE_TYPE_MEDIA_WRITE_ERR);
3614 old_blk = delay_write->old_phyblock;
3615 new_blk = delay_write->new_phyblock;
3616 } else if (delay_write->delay_write_flag &&
3617 (delay_write->logblock == log_blk) &&
3618 (start_page == delay_write->pageoff)) {
3619 delay_write->delay_write_flag = 0;
3620 old_blk = delay_write->old_phyblock;
3621 new_blk = delay_write->new_phyblock;
3623 retval = ms_delay_write(chip);
3624 if (retval != STATUS_SUCCESS) {
3625 set_sense_type(chip, lun,
3626 SENSE_TYPE_MEDIA_WRITE_ERR);
3630 old_blk = ms_get_l2p_tbl
3632 log_blk - ms_start_idx[seg_no]);
3633 new_blk = ms_get_unused_block(chip, seg_no);
3634 if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
3635 set_sense_type(chip, lun,
3636 SENSE_TYPE_MEDIA_WRITE_ERR);
3640 retval = ms_prepare_write(chip, old_blk, new_blk,
3641 log_blk, start_page);
3642 if (retval != STATUS_SUCCESS) {
3643 if (detect_card_cd(chip, MS_CARD) !=
3647 SENSE_TYPE_MEDIA_NOT_PRESENT);
3650 set_sense_type(chip, lun,
3651 SENSE_TYPE_MEDIA_WRITE_ERR);
3654 #ifdef MS_DELAY_WRITE
3658 #ifdef MS_DELAY_WRITE
3659 retval = ms_delay_write(chip);
3660 if (retval != STATUS_SUCCESS) {
3661 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3662 set_sense_type(chip, lun,
3663 SENSE_TYPE_MEDIA_NOT_PRESENT);
3666 set_sense_type(chip, lun,
3667 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3671 old_blk = ms_get_l2p_tbl(chip, seg_no,
3672 log_blk - ms_start_idx[seg_no]);
3673 if (old_blk == 0xFFFF) {
3674 set_sense_type(chip, lun,
3675 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3680 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3681 seg_no, old_blk, new_blk);
3683 while (total_sec_cnt) {
3684 if ((start_page + total_sec_cnt) > (ms_card->page_off + 1))
3685 end_page = ms_card->page_off + 1;
3687 end_page = start_page + (u8)total_sec_cnt;
3689 page_cnt = end_page - start_page;
3691 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n",
3692 start_page, end_page, page_cnt);
3694 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3695 retval = ms_read_multiple_pages(chip,
3697 start_page, end_page,
3698 ptr, &index, &offset);
3700 retval = ms_write_multiple_pages(chip, old_blk, new_blk,
3701 log_blk, start_page,
3702 end_page, ptr, &index,
3706 if (retval != STATUS_SUCCESS) {
3707 toggle_gpio(chip, 1);
3708 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3709 set_sense_type(chip, lun,
3710 SENSE_TYPE_MEDIA_NOT_PRESENT);
3713 ms_rw_fail(srb, chip);
3717 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3718 if (end_page == (ms_card->page_off + 1)) {
3719 retval = ms_erase_block(chip, old_blk);
3720 if (retval == STATUS_SUCCESS)
3721 ms_set_unused_block(chip, old_blk);
3723 ms_set_l2p_tbl(chip, seg_no,
3724 log_blk - ms_start_idx[seg_no],
3729 total_sec_cnt -= page_cnt;
3730 if (scsi_sg_count(srb) == 0)
3731 ptr += page_cnt * 512;
3733 if (total_sec_cnt == 0)
3738 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1;
3740 if (log_blk < ms_start_idx[seg_no + 1])
3744 if (ms_card->segment[seg_no].build_flag == 0) {
3745 retval = ms_build_l2p_tbl(chip, seg_no);
3746 if (retval != STATUS_SUCCESS) {
3747 chip->card_fail |= MS_CARD;
3748 set_sense_type(chip, lun,
3749 SENSE_TYPE_MEDIA_NOT_PRESENT);
3754 old_blk = ms_get_l2p_tbl(chip, seg_no,
3755 log_blk - ms_start_idx[seg_no]);
3756 if (old_blk == 0xFFFF) {
3757 ms_rw_fail(srb, chip);
3761 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3762 new_blk = ms_get_unused_block(chip, seg_no);
3763 if (new_blk == 0xFFFF) {
3764 ms_rw_fail(srb, chip);
3769 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3770 seg_no, old_blk, new_blk);
3775 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3776 if (end_page < (ms_card->page_off + 1)) {
3777 #ifdef MS_DELAY_WRITE
3778 delay_write->delay_write_flag = 1;
3779 delay_write->old_phyblock = old_blk;
3780 delay_write->new_phyblock = new_blk;
3781 delay_write->logblock = log_blk;
3782 delay_write->pageoff = end_page;
3784 retval = ms_finish_write(chip, old_blk, new_blk,
3786 if (retval != STATUS_SUCCESS) {
3787 if (detect_card_cd(chip, MS_CARD) !=
3791 SENSE_TYPE_MEDIA_NOT_PRESENT);
3795 ms_rw_fail(srb, chip);
3802 scsi_set_resid(srb, 0);
3804 return STATUS_SUCCESS;
3807 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3808 u32 start_sector, u16 sector_cnt)
3810 struct ms_info *ms_card = &chip->ms_card;
3813 if (CHK_MSPRO(ms_card))
3814 retval = mspro_rw_multi_sector(srb, chip, start_sector,
3817 retval = ms_rw_multi_sector(srb, chip, start_sector,
3823 void ms_free_l2p_tbl(struct rtsx_chip *chip)
3825 struct ms_info *ms_card = &chip->ms_card;
3828 if (ms_card->segment) {
3829 for (i = 0; i < ms_card->segment_cnt; i++) {
3830 vfree(ms_card->segment[i].l2p_table);
3831 ms_card->segment[i].l2p_table = NULL;
3832 vfree(ms_card->segment[i].free_table);
3833 ms_card->segment[i].free_table = NULL;
3835 vfree(ms_card->segment);
3836 ms_card->segment = NULL;
3840 #ifdef SUPPORT_MAGIC_GATE
3842 #ifdef READ_BYTES_WAIT_INT
3843 static int ms_poll_int(struct rtsx_chip *chip)
3848 rtsx_init_cmd(chip);
3850 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
3852 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
3853 if (retval != STATUS_SUCCESS) {
3857 val = *rtsx_get_cmd_data(chip);
3858 if (val & MS_INT_ERR) {
3862 return STATUS_SUCCESS;
3866 #ifdef MS_SAMPLE_INT_ERR
3867 static int check_ms_err(struct rtsx_chip *chip)
3872 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3873 if (retval != STATUS_SUCCESS)
3875 if (val & MS_TRANSFER_ERR)
3878 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3879 if (retval != STATUS_SUCCESS)
3882 if (val & (MS_INT_ERR | MS_INT_CMDNK))
3888 static int check_ms_err(struct rtsx_chip *chip)
3893 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3894 if (retval != STATUS_SUCCESS)
3896 if (val & MS_TRANSFER_ERR)
3903 static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
3914 data[6] = entry_num;
3917 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3918 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT,
3920 if (retval == STATUS_SUCCESS)
3923 if (i == MS_MAX_RETRY_COUNT) {
3927 if (check_ms_err(chip)) {
3928 rtsx_clear_ms_error(chip);
3932 return STATUS_SUCCESS;
3935 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type,
3942 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1);
3944 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
3946 if (retval != STATUS_SUCCESS) {
3956 buf[5] = mg_entry_num;
3958 retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6,
3959 NO_WAIT_INT, buf, 6);
3960 if (retval != STATUS_SUCCESS) {
3964 return STATUS_SUCCESS;
3967 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3971 unsigned int lun = SCSI_LUN(srb);
3972 u8 buf1[32], buf2[12];
3974 if (scsi_bufflen(srb) < 12) {
3975 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3979 ms_cleanup_work(chip);
3981 retval = ms_switch_clock(chip);
3982 if (retval != STATUS_SUCCESS) {
3986 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
3987 if (retval != STATUS_SUCCESS) {
3988 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3992 memset(buf1, 0, 32);
3993 rtsx_stor_get_xfer_buf(buf2, min_t(int, 12, scsi_bufflen(srb)), srb);
3994 for (i = 0; i < 8; i++)
3995 buf1[8 + i] = buf2[4 + i];
3997 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
3999 if (retval != STATUS_SUCCESS) {
4000 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4003 if (check_ms_err(chip)) {
4004 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4005 rtsx_clear_ms_error(chip);
4009 return STATUS_SUCCESS;
4012 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4014 int retval = STATUS_FAIL;
4016 unsigned int lun = SCSI_LUN(srb);
4019 ms_cleanup_work(chip);
4021 retval = ms_switch_clock(chip);
4022 if (retval != STATUS_SUCCESS) {
4026 buf = kmalloc(1540, GFP_KERNEL);
4028 return STATUS_ERROR;
4036 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
4037 if (retval != STATUS_SUCCESS) {
4038 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4042 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4043 3, WAIT_INT, 0, 0, buf + 4, 1536);
4044 if (retval != STATUS_SUCCESS) {
4045 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4046 rtsx_clear_ms_error(chip);
4049 if (check_ms_err(chip)) {
4050 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4051 rtsx_clear_ms_error(chip);
4052 retval = STATUS_FAIL;
4056 bufflen = min_t(int, 1052, scsi_bufflen(srb));
4057 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4064 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4066 struct ms_info *ms_card = &chip->ms_card;
4070 unsigned int lun = SCSI_LUN(srb);
4073 ms_cleanup_work(chip);
4075 retval = ms_switch_clock(chip);
4076 if (retval != STATUS_SUCCESS) {
4080 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
4081 if (retval != STATUS_SUCCESS) {
4082 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4086 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4088 if (retval != STATUS_SUCCESS) {
4089 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4092 if (check_ms_err(chip)) {
4093 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4094 rtsx_clear_ms_error(chip);
4098 memcpy(ms_card->magic_gate_id, buf, 16);
4100 #ifdef READ_BYTES_WAIT_INT
4101 retval = ms_poll_int(chip);
4102 if (retval != STATUS_SUCCESS) {
4103 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4108 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
4109 if (retval != STATUS_SUCCESS) {
4110 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4114 bufflen = min_t(int, 12, scsi_bufflen(srb));
4115 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4117 for (i = 0; i < 8; i++)
4118 buf[i] = buf[4 + i];
4120 for (i = 0; i < 24; i++)
4123 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
4124 32, WAIT_INT, buf, 32);
4125 if (retval != STATUS_SUCCESS) {
4126 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4129 if (check_ms_err(chip)) {
4130 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4131 rtsx_clear_ms_error(chip);
4135 ms_card->mg_auth = 0;
4137 return STATUS_SUCCESS;
4140 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4142 struct ms_info *ms_card = &chip->ms_card;
4145 unsigned int lun = SCSI_LUN(srb);
4146 u8 buf1[32], buf2[36];
4148 ms_cleanup_work(chip);
4150 retval = ms_switch_clock(chip);
4151 if (retval != STATUS_SUCCESS) {
4155 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
4156 if (retval != STATUS_SUCCESS) {
4157 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4161 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4163 if (retval != STATUS_SUCCESS) {
4164 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4167 if (check_ms_err(chip)) {
4168 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4169 rtsx_clear_ms_error(chip);
4178 memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
4179 memcpy(buf2 + 20, buf1, 16);
4181 bufflen = min_t(int, 36, scsi_bufflen(srb));
4182 rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
4184 #ifdef READ_BYTES_WAIT_INT
4185 retval = ms_poll_int(chip);
4186 if (retval != STATUS_SUCCESS) {
4187 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4192 return STATUS_SUCCESS;
4195 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4197 struct ms_info *ms_card = &chip->ms_card;
4201 unsigned int lun = SCSI_LUN(srb);
4204 ms_cleanup_work(chip);
4206 retval = ms_switch_clock(chip);
4207 if (retval != STATUS_SUCCESS) {
4211 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
4212 if (retval != STATUS_SUCCESS) {
4213 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4217 bufflen = min_t(int, 12, scsi_bufflen(srb));
4218 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4220 for (i = 0; i < 8; i++)
4221 buf[i] = buf[4 + i];
4223 for (i = 0; i < 24; i++)
4226 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4228 if (retval != STATUS_SUCCESS) {
4229 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4232 if (check_ms_err(chip)) {
4233 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4234 rtsx_clear_ms_error(chip);
4238 ms_card->mg_auth = 1;
4240 return STATUS_SUCCESS;
4243 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4245 struct ms_info *ms_card = &chip->ms_card;
4248 unsigned int lun = SCSI_LUN(srb);
4251 ms_cleanup_work(chip);
4253 retval = ms_switch_clock(chip);
4254 if (retval != STATUS_SUCCESS) {
4258 buf = kmalloc(1028, GFP_KERNEL);
4260 return STATUS_ERROR;
4268 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
4269 if (retval != STATUS_SUCCESS) {
4270 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4274 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4275 2, WAIT_INT, 0, 0, buf + 4, 1024);
4276 if (retval != STATUS_SUCCESS) {
4277 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4278 rtsx_clear_ms_error(chip);
4281 if (check_ms_err(chip)) {
4282 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4283 rtsx_clear_ms_error(chip);
4284 retval = STATUS_FAIL;
4288 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4289 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4296 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4298 struct ms_info *ms_card = &chip->ms_card;
4301 #ifdef MG_SET_ICV_SLOW
4304 unsigned int lun = SCSI_LUN(srb);
4307 ms_cleanup_work(chip);
4309 retval = ms_switch_clock(chip);
4310 if (retval != STATUS_SUCCESS) {
4314 buf = kmalloc(1028, GFP_KERNEL);
4316 return STATUS_ERROR;
4319 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4320 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4322 retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
4323 if (retval != STATUS_SUCCESS) {
4324 if (ms_card->mg_auth == 0) {
4325 if ((buf[5] & 0xC0) != 0)
4328 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4330 set_sense_type(chip, lun,
4331 SENSE_TYPE_MG_WRITE_ERR);
4333 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4338 #ifdef MG_SET_ICV_SLOW
4339 for (i = 0; i < 2; i++) {
4342 rtsx_init_cmd(chip);
4344 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
4345 0xFF, PRO_WRITE_LONG_DATA);
4346 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4347 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4350 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
4352 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4353 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
4354 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
4355 MS_TRANSFER_END, MS_TRANSFER_END);
4357 rtsx_send_cmd_no_wait(chip);
4359 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i * 512,
4360 512, 0, DMA_TO_DEVICE, 3000);
4361 if ((retval < 0) || check_ms_err(chip)) {
4362 rtsx_clear_ms_error(chip);
4363 if (ms_card->mg_auth == 0) {
4364 if ((buf[5] & 0xC0) != 0)
4367 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4369 set_sense_type(chip, lun,
4370 SENSE_TYPE_MG_WRITE_ERR);
4372 set_sense_type(chip, lun,
4373 SENSE_TYPE_MG_WRITE_ERR);
4375 retval = STATUS_FAIL;
4380 retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
4381 2, WAIT_INT, 0, 0, buf + 4, 1024);
4382 if ((retval != STATUS_SUCCESS) || check_ms_err(chip)) {
4383 rtsx_clear_ms_error(chip);
4384 if (ms_card->mg_auth == 0) {
4385 if ((buf[5] & 0xC0) != 0)
4388 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4390 set_sense_type(chip, lun,
4391 SENSE_TYPE_MG_WRITE_ERR);
4393 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4404 #endif /* SUPPORT_MAGIC_GATE */
4406 void ms_cleanup_work(struct rtsx_chip *chip)
4408 struct ms_info *ms_card = &chip->ms_card;
4410 if (CHK_MSPRO(ms_card)) {
4411 if (ms_card->seq_mode) {
4412 dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n");
4413 mspro_stop_seq_mode(chip);
4414 ms_card->cleanup_counter = 0;
4416 if (CHK_MSHG(ms_card)) {
4417 rtsx_write_register(chip, MS_CFG,
4418 MS_2K_SECTOR_MODE, 0x00);
4421 #ifdef MS_DELAY_WRITE
4422 else if ((!CHK_MSPRO(ms_card)) &&
4423 ms_card->delay_write.delay_write_flag) {
4424 dev_dbg(rtsx_dev(chip), "MS: delay write\n");
4425 ms_delay_write(chip);
4426 ms_card->cleanup_counter = 0;
4431 int ms_power_off_card3v3(struct rtsx_chip *chip)
4435 retval = disable_card_clock(chip, MS_CARD);
4436 if (retval != STATUS_SUCCESS) {
4440 if (chip->asic_code) {
4441 retval = ms_pull_ctl_disable(chip);
4442 if (retval != STATUS_SUCCESS) {
4446 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
4447 FPGA_MS_PULL_CTL_BIT | 0x20,
4448 FPGA_MS_PULL_CTL_BIT);
4453 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
4457 if (!chip->ft2_fast_mode) {
4458 retval = card_power_off(chip, MS_CARD);
4459 if (retval != STATUS_SUCCESS) {
4464 return STATUS_SUCCESS;
4467 int release_ms_card(struct rtsx_chip *chip)
4469 struct ms_info *ms_card = &chip->ms_card;
4472 #ifdef MS_DELAY_WRITE
4473 ms_card->delay_write.delay_write_flag = 0;
4475 ms_card->pro_under_formatting = 0;
4477 chip->card_ready &= ~MS_CARD;
4478 chip->card_fail &= ~MS_CARD;
4479 chip->card_wp &= ~MS_CARD;
4481 ms_free_l2p_tbl(chip);
4483 memset(ms_card->raw_sys_info, 0, 96);
4484 #ifdef SUPPORT_PCGL_1P18
4485 memset(ms_card->raw_model_name, 0, 48);
4488 retval = ms_power_off_card3v3(chip);
4489 if (retval != STATUS_SUCCESS) {
4493 return STATUS_SUCCESS;