drivers/staging/rts5208/sd.c

   1 /* Driver for Realtek PCI-Express card reader
   2  *
   3  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2, or (at your option) any
   8  * later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * Author:
  19  *   Wei WANG (wei_wang@realsil.com.cn)
  20  *   Micky Ching (micky_ching@realsil.com.cn)
  21  */
  22
  23 #include <linux/blkdev.h>
  24 #include <linux/kthread.h>
  25 #include <linux/sched.h>
  26
  27 #include "rtsx.h"
  28 #include "sd.h"
  29
  30 #define SD_MAX_RETRY_COUNT      3
  31
  32 static u16 REG_SD_CFG1;
  33 static u16 REG_SD_CFG2;
  34 static u16 REG_SD_CFG3;
  35 static u16 REG_SD_STAT1;
  36 static u16 REG_SD_STAT2;
  37 static u16 REG_SD_BUS_STAT;
  38 static u16 REG_SD_PAD_CTL;
  39 static u16 REG_SD_SAMPLE_POINT_CTL;
  40 static u16 REG_SD_PUSH_POINT_CTL;
  41 static u16 REG_SD_CMD0;
  42 static u16 REG_SD_CMD1;
  43 static u16 REG_SD_CMD2;
  44 static u16 REG_SD_CMD3;
  45 static u16 REG_SD_CMD4;
  46 static u16 REG_SD_CMD5;
  47 static u16 REG_SD_BYTE_CNT_L;
  48 static u16 REG_SD_BYTE_CNT_H;
  49 static u16 REG_SD_BLOCK_CNT_L;
  50 static u16 REG_SD_BLOCK_CNT_H;
  51 static u16 REG_SD_TRANSFER;
  52 static u16 REG_SD_VPCLK0_CTL;
  53 static u16 REG_SD_VPCLK1_CTL;
  54 static u16 REG_SD_DCMPS0_CTL;
  55 static u16 REG_SD_DCMPS1_CTL;
  56
  57 static inline void sd_set_err_code(struct rtsx_chip *chip, u8 err_code)
  58 {
  59         struct sd_info *sd_card = &chip->sd_card;
  60
  61         sd_card->err_code |= err_code;
  62 }
  63
  64 static inline void sd_clr_err_code(struct rtsx_chip *chip)
  65 {
  66         struct sd_info *sd_card = &chip->sd_card;
  67
  68         sd_card->err_code = 0;
  69 }
  70
  71 static inline int sd_check_err_code(struct rtsx_chip *chip, u8 err_code)
  72 {
  73         struct sd_info *sd_card = &chip->sd_card;
  74
  75         return sd_card->err_code & err_code;
  76 }
  77
  78 static void sd_init_reg_addr(struct rtsx_chip *chip)
  79 {
  80         REG_SD_CFG1 = 0xFD31;
  81         REG_SD_CFG2 = 0xFD33;
  82         REG_SD_CFG3 = 0xFD3E;
  83         REG_SD_STAT1 = 0xFD30;
  84         REG_SD_STAT2 = 0;
  85         REG_SD_BUS_STAT = 0;
  86         REG_SD_PAD_CTL = 0;
  87         REG_SD_SAMPLE_POINT_CTL = 0;
  88         REG_SD_PUSH_POINT_CTL = 0;
  89         REG_SD_CMD0 = 0xFD34;
  90         REG_SD_CMD1 = 0xFD35;
  91         REG_SD_CMD2 = 0xFD36;
  92         REG_SD_CMD3 = 0xFD37;
  93         REG_SD_CMD4 = 0xFD38;
  94         REG_SD_CMD5 = 0xFD5A;
  95         REG_SD_BYTE_CNT_L = 0xFD39;
  96         REG_SD_BYTE_CNT_H = 0xFD3A;
  97         REG_SD_BLOCK_CNT_L = 0xFD3B;
  98         REG_SD_BLOCK_CNT_H = 0xFD3C;
  99         REG_SD_TRANSFER = 0xFD32;
 100         REG_SD_VPCLK0_CTL = 0;
 101         REG_SD_VPCLK1_CTL = 0;
 102         REG_SD_DCMPS0_CTL = 0;
 103         REG_SD_DCMPS1_CTL = 0;
 104 }
 105
 106 static int sd_check_data0_status(struct rtsx_chip *chip)
 107 {
 108         int retval;
 109         u8 stat;
 110
 111         retval = rtsx_read_register(chip, REG_SD_STAT1, &stat);
 112         if (retval) {
 113                 return retval;
 114         }
 115
 116         if (!(stat & SD_DAT0_STATUS)) {
 117                 sd_set_err_code(chip, SD_BUSY);
 118                 return STATUS_FAIL;
 119         }
 120
 121         return STATUS_SUCCESS;
 122 }
 123
 124 static int sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx,
 125                                u32 arg, u8 rsp_type, u8 *rsp, int rsp_len)
 126 {
 127         struct sd_info *sd_card = &chip->sd_card;
 128         int retval;
 129         int timeout = 100;
 130         u16 reg_addr;
 131         u8 *ptr;
 132         int stat_idx = 0;
 133         int rty_cnt = 0;
 134
 135         sd_clr_err_code(chip);
 136
 137         dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d, arg = 0x%08x\n", cmd_idx, arg);
 138
 139         if (rsp_type == SD_RSP_TYPE_R1b)
 140                 timeout = 3000;
 141
 142 RTY_SEND_CMD:
 143
 144         rtsx_init_cmd(chip);
 145
 146         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | cmd_idx);
 147         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, (u8)(arg >> 24));
 148         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, (u8)(arg >> 16));
 149         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, (u8)(arg >> 8));
 150         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, (u8)arg);
 151
 152         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type);
 153         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
 154                      0x01, PINGPONG_BUFFER);
 155         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER,
 156                      0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
 157         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
 158                      SD_TRANSFER_END | SD_STAT_IDLE, SD_TRANSFER_END |
 159                      SD_STAT_IDLE);
 160
 161         if (rsp_type == SD_RSP_TYPE_R2) {
 162                 for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16;
 163                      reg_addr++)
 164                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
 165
 166                 stat_idx = 16;
 167         } else if (rsp_type != SD_RSP_TYPE_R0) {
 168                 for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4;
 169                      reg_addr++)
 170                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
 171
 172                 stat_idx = 5;
 173         }
 174
 175         rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_STAT1, 0, 0);
 176
 177         retval = rtsx_send_cmd(chip, SD_CARD, timeout);
 178         if (retval < 0) {
 179                 u8 val;
 180
 181                 rtsx_read_register(chip, REG_SD_STAT1, &val);
 182                 dev_dbg(rtsx_dev(chip), "SD_STAT1: 0x%x\n", val);
 183
 184                 rtsx_read_register(chip, REG_SD_CFG3, &val);
 185                 dev_dbg(rtsx_dev(chip), "SD_CFG3: 0x%x\n", val);
 186
 187                 if (retval == -ETIMEDOUT) {
 188                         if (rsp_type & SD_WAIT_BUSY_END) {
 189                                 retval = sd_check_data0_status(chip);
 190                                 if (retval != STATUS_SUCCESS) {
 191                                         rtsx_clear_sd_error(chip);
 192                                         return retval;
 193                                 }
 194                         } else {
 195                                 sd_set_err_code(chip, SD_TO_ERR);
 196                         }
 197                         retval = STATUS_TIMEDOUT;
 198                 } else {
 199                         retval = STATUS_FAIL;
 200                 }
 201                 rtsx_clear_sd_error(chip);
 202
 203                 return retval;
 204         }
 205
 206         if (rsp_type == SD_RSP_TYPE_R0)
 207                 return STATUS_SUCCESS;
 208
 209         ptr = rtsx_get_cmd_data(chip) + 1;
 210
 211         if ((ptr[0] & 0xC0) != 0) {
 212                 sd_set_err_code(chip, SD_STS_ERR);
 213                 return STATUS_FAIL;
 214         }
 215
 216         if (!(rsp_type & SD_NO_CHECK_CRC7)) {
 217                 if (ptr[stat_idx] & SD_CRC7_ERR) {
 218                         if (cmd_idx == WRITE_MULTIPLE_BLOCK) {
 219                                 sd_set_err_code(chip, SD_CRC_ERR);
 220                                 return STATUS_FAIL;
 221                         }
 222                         if (rty_cnt < SD_MAX_RETRY_COUNT) {
 223                                 wait_timeout(20);
 224                                 rty_cnt++;
 225                                 goto RTY_SEND_CMD;
 226                         } else {
 227                                 sd_set_err_code(chip, SD_CRC_ERR);
 228                                 return STATUS_FAIL;
 229                         }
 230                 }
 231         }
 232
 233         if ((rsp_type == SD_RSP_TYPE_R1) || (rsp_type == SD_RSP_TYPE_R1b)) {
 234                 if ((cmd_idx != SEND_RELATIVE_ADDR) &&
 235                     (cmd_idx != SEND_IF_COND)) {
 236                         if (cmd_idx != STOP_TRANSMISSION) {
 237                                 if (ptr[1] & 0x80) {
 238                                         return STATUS_FAIL;
 239                                 }
 240                         }
 241 #ifdef SUPPORT_SD_LOCK
 242                         if (ptr[1] & 0x7D) {
 243 #else
 244                         if (ptr[1] & 0x7F) {
 245 #endif
 246                                 dev_dbg(rtsx_dev(chip), "ptr[1]: 0x%02x\n",
 247                                         ptr[1]);
 248                                 return STATUS_FAIL;
 249                         }
 250                         if (ptr[2] & 0xFF) {
 251                                 dev_dbg(rtsx_dev(chip), "ptr[2]: 0x%02x\n",
 252                                         ptr[2]);
 253                                 return STATUS_FAIL;
 254                         }
 255                         if (ptr[3] & 0x80) {
 256                                 dev_dbg(rtsx_dev(chip), "ptr[3]: 0x%02x\n",
 257                                         ptr[3]);
 258                                 return STATUS_FAIL;
 259                         }
 260                         if (ptr[3] & 0x01)
 261                                 sd_card->sd_data_buf_ready = 1;
 262                         else
 263                                 sd_card->sd_data_buf_ready = 0;
 264                 }
 265         }
 266
 267         if (rsp && rsp_len)
 268                 memcpy(rsp, ptr, rsp_len);
 269
 270         return STATUS_SUCCESS;
 271 }
 272
 273 static int sd_read_data(struct rtsx_chip *chip,
 274                         u8 trans_mode, u8 *cmd, int cmd_len, u16 byte_cnt,
 275                         u16 blk_cnt, u8 bus_width, u8 *buf, int buf_len,
 276                         int timeout)
 277 {
 278         struct sd_info *sd_card = &chip->sd_card;
 279         int retval;
 280         int i;
 281
 282         sd_clr_err_code(chip);
 283
 284         if (!buf)
 285                 buf_len = 0;
 286
 287         if (buf_len > 512) {
 288                 return STATUS_FAIL;
 289         }
 290
 291         rtsx_init_cmd(chip);
 292
 293         if (cmd_len) {
 294                 dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", cmd[0] - 0x40);
 295                 for (i = 0; i < (min(cmd_len, 6)); i++)
 296                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0 + i,
 297                                      0xFF, cmd[i]);
 298         }
 299         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
 300                      (u8)byte_cnt);
 301         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
 302                      (u8)(byte_cnt >> 8));
 303         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF,
 304                      (u8)blk_cnt);
 305         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF,
 306                      (u8)(blk_cnt >> 8));
 307
 308         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
 309
 310         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
 311                      SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
 312                      SD_CHECK_CRC7 | SD_RSP_LEN_6);
 313         if (trans_mode != SD_TM_AUTO_TUNING)
 314                 rtsx_add_cmd(chip, WRITE_REG_CMD,
 315                              CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
 316
 317         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
 318                      trans_mode | SD_TRANSFER_START);
 319         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
 320                      SD_TRANSFER_END);
 321
 322         retval = rtsx_send_cmd(chip, SD_CARD, timeout);
 323         if (retval < 0) {
 324                 if (retval == -ETIMEDOUT) {
 325                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
 326                                             SD_RSP_TYPE_R1, NULL, 0);
 327                 }
 328
 329                 return STATUS_FAIL;
 330         }
 331
 332         if (buf && buf_len) {
 333                 retval = rtsx_read_ppbuf(chip, buf, buf_len);
 334                 if (retval != STATUS_SUCCESS) {
 335                         return STATUS_FAIL;
 336                 }
 337         }
 338
 339         return STATUS_SUCCESS;
 340 }
 341
 342 static int sd_write_data(struct rtsx_chip *chip, u8 trans_mode,
 343                          u8 *cmd, int cmd_len, u16 byte_cnt, u16 blk_cnt,
 344                          u8 bus_width, u8 *buf, int buf_len, int timeout)
 345 {
 346         struct sd_info *sd_card = &chip->sd_card;
 347         int retval;
 348         int i;
 349
 350         sd_clr_err_code(chip);
 351
 352         if (!buf)
 353                 buf_len = 0;
 354
 355         if (buf_len > 512) {
 356                 /* This function can't write data more than one page */
 357                 return STATUS_FAIL;
 358         }
 359
 360         if (buf && buf_len) {
 361                 retval = rtsx_write_ppbuf(chip, buf, buf_len);
 362                 if (retval != STATUS_SUCCESS) {
 363                         return STATUS_FAIL;
 364                 }
 365         }
 366
 367         rtsx_init_cmd(chip);
 368
 369         if (cmd_len) {
 370                 dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", cmd[0] - 0x40);
 371                 for (i = 0; i < (min(cmd_len, 6)); i++) {
 372                         rtsx_add_cmd(chip, WRITE_REG_CMD,
 373                                      REG_SD_CMD0 + i, 0xFF, cmd[i]);
 374                 }
 375         }
 376         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
 377                      (u8)byte_cnt);
 378         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
 379                      (u8)(byte_cnt >> 8));
 380         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF,
 381                      (u8)blk_cnt);
 382         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF,
 383                      (u8)(blk_cnt >> 8));
 384
 385         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
 386
 387         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
 388                      SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
 389                      SD_CHECK_CRC7 | SD_RSP_LEN_6);
 390
 391         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
 392                      trans_mode | SD_TRANSFER_START);
 393         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
 394                      SD_TRANSFER_END);
 395
 396         retval = rtsx_send_cmd(chip, SD_CARD, timeout);
 397         if (retval < 0) {
 398                 if (retval == -ETIMEDOUT) {
 399                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
 400                                             SD_RSP_TYPE_R1, NULL, 0);
 401                 }
 402
 403                 return STATUS_FAIL;
 404         }
 405
 406         return STATUS_SUCCESS;
 407 }
 408
 409 static int sd_check_csd(struct rtsx_chip *chip, char check_wp)
 410 {
 411         struct sd_info *sd_card = &chip->sd_card;
 412         int retval;
 413         int i;
 414         u8 csd_ver, trans_speed;
 415         u8 rsp[16];
 416
 417         for (i = 0; i < 6; i++) {
 418                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
 419                         sd_set_err_code(chip, SD_NO_CARD);
 420                         return STATUS_FAIL;
 421                 }
 422
 423                 retval = sd_send_cmd_get_rsp(chip, SEND_CSD, sd_card->sd_addr,
 424                                              SD_RSP_TYPE_R2, rsp, 16);
 425                 if (retval == STATUS_SUCCESS)
 426                         break;
 427         }
 428
 429         if (i == 6) {
 430                 return STATUS_FAIL;
 431         }
 432
 433         memcpy(sd_card->raw_csd, rsp + 1, 15);
 434
 435         dev_dbg(rtsx_dev(chip), "CSD Response:\n");
 436         dev_dbg(rtsx_dev(chip), "%*ph\n", 16, sd_card->raw_csd);
 437
 438         csd_ver = (rsp[1] & 0xc0) >> 6;
 439         dev_dbg(rtsx_dev(chip), "csd_ver = %d\n", csd_ver);
 440
 441         trans_speed = rsp[4];
 442         if ((trans_speed & 0x07) == 0x02) {
 443                 if ((trans_speed & 0xf8) >= 0x30) {
 444                         if (chip->asic_code)
 445                                 sd_card->sd_clock = 47;
 446                         else
 447                                 sd_card->sd_clock = CLK_50;
 448
 449                 } else if ((trans_speed & 0xf8) == 0x28) {
 450                         if (chip->asic_code)
 451                                 sd_card->sd_clock = 39;
 452                         else
 453                                 sd_card->sd_clock = CLK_40;
 454
 455                 } else if ((trans_speed & 0xf8) == 0x20) {
 456                         if (chip->asic_code)
 457                                 sd_card->sd_clock = 29;
 458                         else
 459                                 sd_card->sd_clock = CLK_30;
 460
 461                 } else if ((trans_speed & 0xf8) >= 0x10) {
 462                         if (chip->asic_code)
 463                                 sd_card->sd_clock = 23;
 464                         else
 465                                 sd_card->sd_clock = CLK_20;
 466
 467                 } else if ((trans_speed & 0x08) >= 0x08) {
 468                         if (chip->asic_code)
 469                                 sd_card->sd_clock = 19;
 470                         else
 471                                 sd_card->sd_clock = CLK_20;
 472                 } else {
 473                         return STATUS_FAIL;
 474                 }
 475         } else {
 476                 return STATUS_FAIL;
 477         }
 478
 479         if (CHK_MMC_SECTOR_MODE(sd_card)) {
 480                 sd_card->capacity = 0;
 481         } else {
 482                 if ((!CHK_SD_HCXC(sd_card)) || (csd_ver == 0)) {
 483                         u8 blk_size, c_size_mult;
 484                         u16 c_size;
 485
 486                         blk_size = rsp[6] & 0x0F;
 487                         c_size =  ((u16)(rsp[7] & 0x03) << 10)
 488                                         + ((u16)rsp[8] << 2)
 489                                         + ((u16)(rsp[9] & 0xC0) >> 6);
 490                         c_size_mult = (u8)((rsp[10] & 0x03) << 1);
 491                         c_size_mult += (rsp[11] & 0x80) >> 7;
 492                         sd_card->capacity = (((u32)(c_size + 1)) *
 493                                         (1 << (c_size_mult + 2)))
 494                                 << (blk_size - 9);
 495                 } else {
 496                         u32 total_sector = 0;
 497
 498                         total_sector = (((u32)rsp[8] & 0x3f) << 16) |
 499                                 ((u32)rsp[9] << 8) | (u32)rsp[10];
 500                         sd_card->capacity = (total_sector + 1) << 10;
 501                 }
 502         }
 503
 504         if (check_wp) {
 505                 if (rsp[15] & 0x30)
 506                         chip->card_wp |= SD_CARD;
 507
 508                 dev_dbg(rtsx_dev(chip), "CSD WP Status: 0x%x\n", rsp[15]);
 509         }
 510
 511         return STATUS_SUCCESS;
 512 }
 513
 514 static int sd_set_sample_push_timing(struct rtsx_chip *chip)
 515 {
 516         int retval;
 517         struct sd_info *sd_card = &chip->sd_card;
 518         u8 val = 0;
 519
 520         if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_DELAY)
 521                 val |= 0x10;
 522
 523         if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_AUTO) {
 524                 if (chip->asic_code) {
 525                         if (CHK_SD_HS(sd_card) || CHK_MMC_52M(sd_card)) {
 526                                 if (val & 0x10)
 527                                         val |= 0x04;
 528                                 else
 529                                         val |= 0x08;
 530                         }
 531                 } else {
 532                         if (val & 0x10)
 533                                 val |= 0x04;
 534                         else
 535                                 val |= 0x08;
 536                 }
 537         } else if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) ==
 538                 SD_SAMPLE_POINT_DELAY) {
 539                 if (val & 0x10)
 540                         val |= 0x04;
 541                 else
 542                         val |= 0x08;
 543         }
 544
 545         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x1C, val);
 546         if (retval) {
 547                 return retval;
 548         }
 549
 550         return STATUS_SUCCESS;
 551 }
 552
 553 static void sd_choose_proper_clock(struct rtsx_chip *chip)
 554 {
 555         struct sd_info *sd_card = &chip->sd_card;
 556
 557         if (CHK_SD_SDR104(sd_card)) {
 558                 if (chip->asic_code)
 559                         sd_card->sd_clock = chip->asic_sd_sdr104_clk;
 560                 else
 561                         sd_card->sd_clock = chip->fpga_sd_sdr104_clk;
 562
 563         } else if (CHK_SD_DDR50(sd_card)) {
 564                 if (chip->asic_code)
 565                         sd_card->sd_clock = chip->asic_sd_ddr50_clk;
 566                 else
 567                         sd_card->sd_clock = chip->fpga_sd_ddr50_clk;
 568
 569         } else if (CHK_SD_SDR50(sd_card)) {
 570                 if (chip->asic_code)
 571                         sd_card->sd_clock = chip->asic_sd_sdr50_clk;
 572                 else
 573                         sd_card->sd_clock = chip->fpga_sd_sdr50_clk;
 574
 575         } else if (CHK_SD_HS(sd_card)) {
 576                 if (chip->asic_code)
 577                         sd_card->sd_clock = chip->asic_sd_hs_clk;
 578                 else
 579                         sd_card->sd_clock = chip->fpga_sd_hs_clk;
 580
 581         } else if (CHK_MMC_52M(sd_card) || CHK_MMC_DDR52(sd_card)) {
 582                 if (chip->asic_code)
 583                         sd_card->sd_clock = chip->asic_mmc_52m_clk;
 584                 else
 585                         sd_card->sd_clock = chip->fpga_mmc_52m_clk;
 586
 587         } else if (CHK_MMC_26M(sd_card)) {
 588                 if (chip->asic_code)
 589                         sd_card->sd_clock = 48;
 590                 else
 591                         sd_card->sd_clock = CLK_50;
 592         }
 593 }
 594
 595 static int sd_set_clock_divider(struct rtsx_chip *chip, u8 clk_div)
 596 {
 597         int retval;
 598         u8 mask = 0, val = 0;
 599
 600         mask = 0x60;
 601         if (clk_div == SD_CLK_DIVIDE_0)
 602                 val = 0x00;
 603         else if (clk_div == SD_CLK_DIVIDE_128)
 604                 val = 0x40;
 605         else if (clk_div == SD_CLK_DIVIDE_256)
 606                 val = 0x20;
 607
 608         retval = rtsx_write_register(chip, REG_SD_CFG1, mask, val);
 609         if (retval) {
 610                 return retval;
 611         }
 612
 613         return STATUS_SUCCESS;
 614 }
 615
 616 static int sd_set_init_para(struct rtsx_chip *chip)
 617 {
 618         struct sd_info *sd_card = &chip->sd_card;
 619         int retval;
 620
 621         retval = sd_set_sample_push_timing(chip);
 622         if (retval != STATUS_SUCCESS) {
 623                 return STATUS_FAIL;
 624         }
 625
 626         sd_choose_proper_clock(chip);
 627
 628         retval = switch_clock(chip, sd_card->sd_clock);
 629         if (retval != STATUS_SUCCESS) {
 630                 return STATUS_FAIL;
 631         }
 632
 633         return STATUS_SUCCESS;
 634 }
 635
 636 int sd_select_card(struct rtsx_chip *chip, int select)
 637 {
 638         struct sd_info *sd_card = &chip->sd_card;
 639         int retval;
 640         u8 cmd_idx, cmd_type;
 641         u32 addr;
 642
 643         if (select) {
 644                 cmd_idx = SELECT_CARD;
 645                 cmd_type = SD_RSP_TYPE_R1;
 646                 addr = sd_card->sd_addr;
 647         } else {
 648                 cmd_idx = DESELECT_CARD;
 649                 cmd_type = SD_RSP_TYPE_R0;
 650                 addr = 0;
 651         }
 652
 653         retval = sd_send_cmd_get_rsp(chip, cmd_idx, addr, cmd_type, NULL, 0);
 654         if (retval != STATUS_SUCCESS) {
 655                 return STATUS_FAIL;
 656         }
 657
 658         return STATUS_SUCCESS;
 659 }
 660
 661 #ifdef SUPPORT_SD_LOCK
 662 static int sd_update_lock_status(struct rtsx_chip *chip)
 663 {
 664         struct sd_info *sd_card = &chip->sd_card;
 665         int retval;
 666         u8 rsp[5];
 667
 668         retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
 669                                      SD_RSP_TYPE_R1, rsp, 5);
 670         if (retval != STATUS_SUCCESS) {
 671                 return STATUS_FAIL;
 672         }
 673
 674         if (rsp[1] & 0x02)
 675                 sd_card->sd_lock_status |= SD_LOCKED;
 676         else
 677                 sd_card->sd_lock_status &= ~SD_LOCKED;
 678
 679         dev_dbg(rtsx_dev(chip), "sd_card->sd_lock_status = 0x%x\n",
 680                 sd_card->sd_lock_status);
 681
 682         if (rsp[1] & 0x01) {
 683                 return STATUS_FAIL;
 684         }
 685
 686         return STATUS_SUCCESS;
 687 }
 688 #endif
 689
 690 static int sd_wait_state_data_ready(struct rtsx_chip *chip, u8 state,
 691                                     u8 data_ready, int polling_cnt)
 692 {
 693         struct sd_info *sd_card = &chip->sd_card;
 694         int retval, i;
 695         u8 rsp[5];
 696
 697         for (i = 0; i < polling_cnt; i++) {
 698                 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS,
 699                                              sd_card->sd_addr, SD_RSP_TYPE_R1,
 700                                              rsp, 5);
 701                 if (retval != STATUS_SUCCESS) {
 702                         return STATUS_FAIL;
 703                 }
 704
 705                 if (((rsp[3] & 0x1E) == state) &&
 706                     ((rsp[3] & 0x01) == data_ready))
 707                         return STATUS_SUCCESS;
 708         }
 709
 710         return STATUS_FAIL;
 711 }
 712
 713 static int sd_change_bank_voltage(struct rtsx_chip *chip, u8 voltage)
 714 {
 715         int retval;
 716
 717         if (voltage == SD_IO_3V3) {
 718                 if (chip->asic_code) {
 719                         retval = rtsx_write_phy_register(chip, 0x08,
 720                                                          0x4FC0 |
 721                                                          chip->phy_voltage);
 722                         if (retval != STATUS_SUCCESS) {
 723                                 return STATUS_FAIL;
 724                         }
 725                 } else {
 726                         retval = rtsx_write_register(chip, SD_PAD_CTL,
 727                                                      SD_IO_USING_1V8, 0);
 728                         if (retval) {
 729                                 return retval;
 730                         }
 731                 }
 732         } else if (voltage == SD_IO_1V8) {
 733                 if (chip->asic_code) {
 734                         retval = rtsx_write_phy_register(chip, 0x08,
 735                                                          0x4C40 |
 736                                                          chip->phy_voltage);
 737                         if (retval != STATUS_SUCCESS) {
 738                                 return STATUS_FAIL;
 739                         }
 740                 } else {
 741                         retval = rtsx_write_register(chip, SD_PAD_CTL,
 742                                                      SD_IO_USING_1V8,
 743                                                      SD_IO_USING_1V8);
 744                         if (retval) {
 745                                 return retval;
 746                         }
 747                 }
 748         } else {
 749                 return STATUS_FAIL;
 750         }
 751
 752         return STATUS_SUCCESS;
 753 }
 754
 755 static int sd_voltage_switch(struct rtsx_chip *chip)
 756 {
 757         int retval;
 758         u8 stat;
 759
 760         retval = rtsx_write_register(chip, SD_BUS_STAT,
 761                                      SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
 762                                      SD_CLK_TOGGLE_EN);
 763         if (retval) {
 764                 return retval;
 765         }
 766
 767         retval = sd_send_cmd_get_rsp(chip, VOLTAGE_SWITCH, 0, SD_RSP_TYPE_R1,
 768                                      NULL, 0);
 769         if (retval != STATUS_SUCCESS) {
 770                 return STATUS_FAIL;
 771         }
 772
 773         udelay(chip->sd_voltage_switch_delay);
 774
 775         retval = rtsx_read_register(chip, SD_BUS_STAT, &stat);
 776         if (retval) {
 777                 return retval;
 778         }
 779         if (stat & (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
 780                                 SD_DAT1_STATUS | SD_DAT0_STATUS)) {
 781                 return STATUS_FAIL;
 782         }
 783
 784         retval = rtsx_write_register(chip, SD_BUS_STAT, 0xFF,
 785                                      SD_CLK_FORCE_STOP);
 786         if (retval) {
 787                 return retval;
 788         }
 789         retval = sd_change_bank_voltage(chip, SD_IO_1V8);
 790         if (retval != STATUS_SUCCESS) {
 791                 return STATUS_FAIL;
 792         }
 793
 794         wait_timeout(50);
 795
 796         retval = rtsx_write_register(chip, SD_BUS_STAT, 0xFF,
 797                                      SD_CLK_TOGGLE_EN);
 798         if (retval) {
 799                 return retval;
 800         }
 801         wait_timeout(10);
 802
 803         retval = rtsx_read_register(chip, SD_BUS_STAT, &stat);
 804         if (retval) {
 805                 return retval;
 806         }
 807         if ((stat & (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
 808                                 SD_DAT1_STATUS | SD_DAT0_STATUS)) !=
 809                         (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
 810                                 SD_DAT1_STATUS | SD_DAT0_STATUS)) {
 811                 dev_dbg(rtsx_dev(chip), "SD_BUS_STAT: 0x%x\n", stat);
 812                 rtsx_write_register(chip, SD_BUS_STAT, SD_CLK_TOGGLE_EN |
 813                                     SD_CLK_FORCE_STOP, 0);
 814                 rtsx_write_register(chip, CARD_CLK_EN, 0xFF, 0);
 815                 return STATUS_FAIL;
 816         }
 817
 818         retval = rtsx_write_register(chip, SD_BUS_STAT,
 819                                      SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
 820         if (retval) {
 821                 return retval;
 822         }
 823
 824         return STATUS_SUCCESS;
 825 }
 826
 827 static int sd_reset_dcm(struct rtsx_chip *chip, u8 tune_dir)
 828 {
 829         int retval;
 830
 831         if (tune_dir == TUNE_RX) {
 832                 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF,
 833                                              DCM_RESET | DCM_RX);
 834                 if (retval) {
 835                         return retval;
 836                 }
 837                 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_RX);
 838                 if (retval) {
 839                         return retval;
 840                 }
 841         } else {
 842                 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF,
 843                                              DCM_RESET | DCM_TX);
 844                 if (retval) {
 845                         return retval;
 846                 }
 847                 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_TX);
 848                 if (retval) {
 849                         return retval;
 850                 }
 851         }
 852
 853         return STATUS_SUCCESS;
 854 }
 855
 856 static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
 857 {
 858         struct sd_info *sd_card = &chip->sd_card;
 859         u16 SD_VP_CTL, SD_DCMPS_CTL;
 860         u8 val;
 861         int retval;
 862         bool ddr_rx = false;
 863
 864         dev_dbg(rtsx_dev(chip), "%s (sample_point = %d, tune_dir = %d)\n",
 865                 __func__, sample_point, tune_dir);
 866
 867         if (tune_dir == TUNE_RX) {
 868                 SD_VP_CTL = SD_VPRX_CTL;
 869                 SD_DCMPS_CTL = SD_DCMPS_RX_CTL;
 870                 if (CHK_SD_DDR50(sd_card))
 871                         ddr_rx = true;
 872         } else {
 873                 SD_VP_CTL = SD_VPTX_CTL;
 874                 SD_DCMPS_CTL = SD_DCMPS_TX_CTL;
 875         }
 876
 877         if (chip->asic_code) {
 878                 retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK,
 879                                              CHANGE_CLK);
 880                 if (retval) {
 881                         return retval;
 882                 }
 883                 retval = rtsx_write_register(chip, SD_VP_CTL, 0x1F,
 884                                              sample_point);
 885                 if (retval) {
 886                         return retval;
 887                 }
 888                 retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
 889                                              PHASE_NOT_RESET, 0);
 890                 if (retval) {
 891                         return retval;
 892                 }
 893                 retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
 894                                              PHASE_NOT_RESET, PHASE_NOT_RESET);
 895                 if (retval) {
 896                         return retval;
 897                 }
 898                 retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK, 0);
 899                 if (retval) {
 900                         return retval;
 901                 }
 902         } else {
 903                 rtsx_read_register(chip, SD_VP_CTL, &val);
 904                 dev_dbg(rtsx_dev(chip), "SD_VP_CTL: 0x%x\n", val);
 905                 rtsx_read_register(chip, SD_DCMPS_CTL, &val);
 906                 dev_dbg(rtsx_dev(chip), "SD_DCMPS_CTL: 0x%x\n", val);
 907
 908                 if (ddr_rx) {
 909                         retval = rtsx_write_register(chip, SD_VP_CTL,
 910                                                      PHASE_CHANGE,
 911                                                      PHASE_CHANGE);
 912                         if (retval) {
 913                                 return retval;
 914                         }
 915                         udelay(50);
 916                         retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
 917                                                      PHASE_CHANGE |
 918                                                      PHASE_NOT_RESET |
 919                                                      sample_point);
 920                         if (retval) {
 921                                 return retval;
 922                         }
 923                 } else {
 924                         retval = rtsx_write_register(chip, CLK_CTL,
 925                                                      CHANGE_CLK, CHANGE_CLK);
 926                         if (retval) {
 927                                 return retval;
 928                         }
 929                         udelay(50);
 930                         retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
 931                                                      PHASE_NOT_RESET |
 932                                                      sample_point);
 933                         if (retval) {
 934                                 return retval;
 935                         }
 936                 }
 937                 udelay(100);
 938
 939                 rtsx_init_cmd(chip);
 940                 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE,
 941                              DCMPS_CHANGE);
 942                 rtsx_add_cmd(chip, CHECK_REG_CMD, SD_DCMPS_CTL,
 943                              DCMPS_CHANGE_DONE, DCMPS_CHANGE_DONE);
 944                 retval = rtsx_send_cmd(chip, SD_CARD, 100);
 945                 if (retval != STATUS_SUCCESS) {
 946                         goto fail;
 947                 }
 948
 949                 val = *rtsx_get_cmd_data(chip);
 950                 if (val & DCMPS_ERROR) {
 951                         goto fail;
 952                 }
 953
 954                 if ((val & DCMPS_CURRENT_PHASE) != sample_point) {
 955                         goto fail;
 956                 }
 957
 958                 retval = rtsx_write_register(chip, SD_DCMPS_CTL,
 959                                              DCMPS_CHANGE, 0);
 960                 if (retval) {
 961                         return retval;
 962                 }
 963                 if (ddr_rx) {
 964                         retval = rtsx_write_register(chip, SD_VP_CTL,
 965                                                      PHASE_CHANGE, 0);
 966                         if (retval) {
 967                                 return retval;
 968                         }
 969                 } else {
 970                         retval = rtsx_write_register(chip, CLK_CTL,
 971                                                      CHANGE_CLK, 0);
 972                         if (retval) {
 973                                 return retval;
 974                         }
 975                 }
 976
 977                 udelay(50);
 978         }
 979
 980         retval = rtsx_write_register(chip, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
 981         if (retval) {
 982                 return retval;
 983         }
 984
 985         return STATUS_SUCCESS;
 986
 987 fail:
 988         rtsx_read_register(chip, SD_VP_CTL, &val);
 989         dev_dbg(rtsx_dev(chip), "SD_VP_CTL: 0x%x\n", val);
 990         rtsx_read_register(chip, SD_DCMPS_CTL, &val);
 991         dev_dbg(rtsx_dev(chip), "SD_DCMPS_CTL: 0x%x\n", val);
 992
 993         rtsx_write_register(chip, SD_DCMPS_CTL, DCMPS_CHANGE, 0);
 994         rtsx_write_register(chip, SD_VP_CTL, PHASE_CHANGE, 0);
 995         mdelay(10);
 996         sd_reset_dcm(chip, tune_dir);
 997         return STATUS_FAIL;
 998 }
 999
1000 static int sd_check_spec(struct rtsx_chip *chip, u8 bus_width)
1001 {
1002         struct sd_info *sd_card = &chip->sd_card;
1003         int retval;
1004         u8 cmd[5], buf[8];
1005
1006         retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
1007                                      SD_RSP_TYPE_R1, NULL, 0);
1008         if (retval != STATUS_SUCCESS) {
1009                 return STATUS_FAIL;
1010         }
1011
1012         cmd[0] = 0x40 | SEND_SCR;
1013         cmd[1] = 0;
1014         cmd[2] = 0;
1015         cmd[3] = 0;
1016         cmd[4] = 0;
1017
1018         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 8, 1, bus_width,
1019                               buf, 8, 250);
1020         if (retval != STATUS_SUCCESS) {
1021                 rtsx_clear_sd_error(chip);
1022                 return STATUS_FAIL;
1023         }
1024
1025         memcpy(sd_card->raw_scr, buf, 8);
1026
1027         if ((buf[0] & 0x0F) == 0) {
1028                 return STATUS_FAIL;
1029         }
1030
1031         return STATUS_SUCCESS;
1032 }
1033
1034 static int sd_query_switch_result(struct rtsx_chip *chip, u8 func_group,
1035                                   u8 func_to_switch, u8 *buf, int buf_len)
1036 {
1037         u8 support_mask = 0, query_switch = 0, switch_busy = 0;
1038         int support_offset = 0, query_switch_offset = 0, check_busy_offset = 0;
1039
1040         if (func_group == SD_FUNC_GROUP_1) {
1041                 support_offset = FUNCTION_GROUP1_SUPPORT_OFFSET;
1042                 query_switch_offset = FUNCTION_GROUP1_QUERY_SWITCH_OFFSET;
1043                 check_busy_offset = FUNCTION_GROUP1_CHECK_BUSY_OFFSET;
1044
1045                 switch (func_to_switch) {
1046                 case HS_SUPPORT:
1047                         support_mask = HS_SUPPORT_MASK;
1048                         query_switch = HS_QUERY_SWITCH_OK;
1049                         switch_busy = HS_SWITCH_BUSY;
1050                         break;
1051
1052                 case SDR50_SUPPORT:
1053                         support_mask = SDR50_SUPPORT_MASK;
1054                         query_switch = SDR50_QUERY_SWITCH_OK;
1055                         switch_busy = SDR50_SWITCH_BUSY;
1056                         break;
1057
1058                 case SDR104_SUPPORT:
1059                         support_mask = SDR104_SUPPORT_MASK;
1060                         query_switch = SDR104_QUERY_SWITCH_OK;
1061                         switch_busy = SDR104_SWITCH_BUSY;
1062                         break;
1063
1064                 case DDR50_SUPPORT:
1065                         support_mask = DDR50_SUPPORT_MASK;
1066                         query_switch = DDR50_QUERY_SWITCH_OK;
1067                         switch_busy = DDR50_SWITCH_BUSY;
1068                         break;
1069
1070                 default:
1071                         return STATUS_FAIL;
1072                 }
1073         } else if (func_group == SD_FUNC_GROUP_3) {
1074                 support_offset = FUNCTION_GROUP3_SUPPORT_OFFSET;
1075                 query_switch_offset = FUNCTION_GROUP3_QUERY_SWITCH_OFFSET;
1076                 check_busy_offset = FUNCTION_GROUP3_CHECK_BUSY_OFFSET;
1077
1078                 switch (func_to_switch) {
1079                 case DRIVING_TYPE_A:
1080                         support_mask = DRIVING_TYPE_A_MASK;
1081                         query_switch = TYPE_A_QUERY_SWITCH_OK;
1082                         switch_busy = TYPE_A_SWITCH_BUSY;
1083                         break;
1084
1085                 case DRIVING_TYPE_C:
1086                         support_mask = DRIVING_TYPE_C_MASK;
1087                         query_switch = TYPE_C_QUERY_SWITCH_OK;
1088                         switch_busy = TYPE_C_SWITCH_BUSY;
1089                         break;
1090
1091                 case DRIVING_TYPE_D:
1092                         support_mask = DRIVING_TYPE_D_MASK;
1093                         query_switch = TYPE_D_QUERY_SWITCH_OK;
1094                         switch_busy = TYPE_D_SWITCH_BUSY;
1095                         break;
1096
1097                 default:
1098                         return STATUS_FAIL;
1099                 }
1100         } else if (func_group == SD_FUNC_GROUP_4) {
1101                 support_offset = FUNCTION_GROUP4_SUPPORT_OFFSET;
1102                 query_switch_offset = FUNCTION_GROUP4_QUERY_SWITCH_OFFSET;
1103                 check_busy_offset = FUNCTION_GROUP4_CHECK_BUSY_OFFSET;
1104
1105                 switch (func_to_switch) {
1106                 case CURRENT_LIMIT_400:
1107                         support_mask = CURRENT_LIMIT_400_MASK;
1108                         query_switch = CURRENT_LIMIT_400_QUERY_SWITCH_OK;
1109                         switch_busy = CURRENT_LIMIT_400_SWITCH_BUSY;
1110                         break;
1111
1112                 case CURRENT_LIMIT_600:
1113                         support_mask = CURRENT_LIMIT_600_MASK;
1114                         query_switch = CURRENT_LIMIT_600_QUERY_SWITCH_OK;
1115                         switch_busy = CURRENT_LIMIT_600_SWITCH_BUSY;
1116                         break;
1117
1118                 case CURRENT_LIMIT_800:
1119                         support_mask = CURRENT_LIMIT_800_MASK;
1120                         query_switch = CURRENT_LIMIT_800_QUERY_SWITCH_OK;
1121                         switch_busy = CURRENT_LIMIT_800_SWITCH_BUSY;
1122                         break;
1123
1124                 default:
1125                         return STATUS_FAIL;
1126                 }
1127         } else {
1128                 return STATUS_FAIL;
1129         }
1130
1131         if (func_group == SD_FUNC_GROUP_1) {
1132                 if (!(buf[support_offset] & support_mask) ||
1133                     ((buf[query_switch_offset] & 0x0F) != query_switch)) {
1134                         return STATUS_FAIL;
1135                 }
1136         }
1137
1138         /* Check 'Busy Status' */
1139         if ((buf[DATA_STRUCTURE_VER_OFFSET] == 0x01) &&
1140             ((buf[check_busy_offset] & switch_busy) == switch_busy)) {
1141                 return STATUS_FAIL;
1142         }
1143
1144         return STATUS_SUCCESS;
1145 }
1146
1147 static int sd_check_switch_mode(struct rtsx_chip *chip, u8 mode, u8 func_group,
1148                                 u8 func_to_switch, u8 bus_width)
1149 {
1150         struct sd_info *sd_card = &chip->sd_card;
1151         int retval;
1152         u8 cmd[5], buf[64];
1153
1154         dev_dbg(rtsx_dev(chip), "%s (mode = %d, func_group = %d, func_to_switch = %d)\n",
1155                 __func__, mode, func_group, func_to_switch);
1156
1157         cmd[0] = 0x40 | SWITCH;
1158         cmd[1] = mode;
1159
1160         if (func_group == SD_FUNC_GROUP_1) {
1161                 cmd[2] = 0xFF;
1162                 cmd[3] = 0xFF;
1163                 cmd[4] = 0xF0 + func_to_switch;
1164         } else if (func_group == SD_FUNC_GROUP_3) {
1165                 cmd[2] = 0xFF;
1166                 cmd[3] = 0xF0 + func_to_switch;
1167                 cmd[4] = 0xFF;
1168         } else if (func_group == SD_FUNC_GROUP_4) {
1169                 cmd[2] = 0xFF;
1170                 cmd[3] = 0x0F + (func_to_switch << 4);
1171                 cmd[4] = 0xFF;
1172         } else {
1173                 cmd[1] = SD_CHECK_MODE;
1174                 cmd[2] = 0xFF;
1175                 cmd[3] = 0xFF;
1176                 cmd[4] = 0xFF;
1177         }
1178
1179         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 64, 1, bus_width,
1180                               buf, 64, 250);
1181         if (retval != STATUS_SUCCESS) {
1182                 rtsx_clear_sd_error(chip);
1183                 return STATUS_FAIL;
1184         }
1185
1186         dev_dbg(rtsx_dev(chip), "%*ph\n", 64, buf);
1187
1188         if (func_group == NO_ARGUMENT) {
1189                 sd_card->func_group1_mask = buf[0x0D];
1190                 sd_card->func_group2_mask = buf[0x0B];
1191                 sd_card->func_group3_mask = buf[0x09];
1192                 sd_card->func_group4_mask = buf[0x07];
1193
1194                 dev_dbg(rtsx_dev(chip), "func_group1_mask = 0x%02x\n",
1195                         buf[0x0D]);
1196                 dev_dbg(rtsx_dev(chip), "func_group2_mask = 0x%02x\n",
1197                         buf[0x0B]);
1198                 dev_dbg(rtsx_dev(chip), "func_group3_mask = 0x%02x\n",
1199                         buf[0x09]);
1200                 dev_dbg(rtsx_dev(chip), "func_group4_mask = 0x%02x\n",
1201                         buf[0x07]);
1202         } else {
1203                 /* Maximum current consumption, check whether current is
1204                  * acceptable; bit[511:496] = 0x0000 means some error happened.
1205                  */
1206                 u16 cc = ((u16)buf[0] << 8) | buf[1];
1207
1208                 dev_dbg(rtsx_dev(chip), "Maximum current consumption: %dmA\n",
1209                         cc);
1210                 if ((cc == 0) || (cc > 800)) {
1211                         return STATUS_FAIL;
1212                 }
1213
1214                 retval = sd_query_switch_result(chip, func_group,
1215                                                 func_to_switch, buf, 64);
1216                 if (retval != STATUS_SUCCESS) {
1217                         return STATUS_FAIL;
1218                 }
1219
1220                 if ((cc > 400) || (func_to_switch > CURRENT_LIMIT_400)) {
1221                         retval = rtsx_write_register(chip, OCPPARA2,
1222                                                      SD_OCP_THD_MASK,
1223                                                      chip->sd_800mA_ocp_thd);
1224                         if (retval) {
1225                                 return retval;
1226                         }
1227                         retval = rtsx_write_register(chip, CARD_PWR_CTL,
1228                                                      PMOS_STRG_MASK,
1229                                                      PMOS_STRG_800mA);
1230                         if (retval) {
1231                                 return retval;
1232                         }
1233                 }
1234         }
1235
1236         return STATUS_SUCCESS;
1237 }
1238
1239 static u8 downgrade_switch_mode(u8 func_group, u8 func_to_switch)
1240 {
1241         if (func_group == SD_FUNC_GROUP_1) {
1242                 if (func_to_switch > HS_SUPPORT)
1243                         func_to_switch--;
1244
1245         } else if (func_group == SD_FUNC_GROUP_4) {
1246                 if (func_to_switch > CURRENT_LIMIT_200)
1247                         func_to_switch--;
1248         }
1249
1250         return func_to_switch;
1251 }
1252
1253 static int sd_check_switch(struct rtsx_chip *chip,
1254                            u8 func_group, u8 func_to_switch, u8 bus_width)
1255 {
1256         int retval;
1257         int i;
1258         bool switch_good = false;
1259
1260         for (i = 0; i < 3; i++) {
1261                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1262                         sd_set_err_code(chip, SD_NO_CARD);
1263                         return STATUS_FAIL;
1264                 }
1265
1266                 retval = sd_check_switch_mode(chip, SD_CHECK_MODE, func_group,
1267                                               func_to_switch, bus_width);
1268                 if (retval == STATUS_SUCCESS) {
1269                         u8 stat;
1270
1271                         retval = sd_check_switch_mode(chip, SD_SWITCH_MODE,
1272                                                       func_group,
1273                                                       func_to_switch,
1274                                                       bus_width);
1275                         if (retval == STATUS_SUCCESS) {
1276                                 switch_good = true;
1277                                 break;
1278                         }
1279
1280                         retval = rtsx_read_register(chip, SD_STAT1, &stat);
1281                         if (retval) {
1282                                 return retval;
1283                         }
1284                         if (stat & SD_CRC16_ERR) {
1285                                 dev_dbg(rtsx_dev(chip), "SD CRC16 error when switching mode\n");
1286                                 return STATUS_FAIL;
1287                         }
1288                 }
1289
1290                 func_to_switch = downgrade_switch_mode(func_group,
1291                                                        func_to_switch);
1292
1293                 wait_timeout(20);
1294         }
1295
1296         if (!switch_good) {
1297                 return STATUS_FAIL;
1298         }
1299
1300         return STATUS_SUCCESS;
1301 }
1302
1303 static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width)
1304 {
1305         struct sd_info *sd_card = &chip->sd_card;
1306         int retval;
1307         int i;
1308         u8 func_to_switch = 0;
1309
1310         /* Get supported functions */
1311         retval = sd_check_switch_mode(chip, SD_CHECK_MODE, NO_ARGUMENT,
1312                                       NO_ARGUMENT, bus_width);
1313         if (retval != STATUS_SUCCESS) {
1314                 return STATUS_FAIL;
1315         }
1316
1317         sd_card->func_group1_mask &= ~(sd_card->sd_switch_fail);
1318
1319         /* Function Group 1: Access Mode */
1320         for (i = 0; i < 4; i++) {
1321                 switch ((u8)(chip->sd_speed_prior >> (i * 8))) {
1322                 case SDR104_SUPPORT:
1323                         if ((sd_card->func_group1_mask & SDR104_SUPPORT_MASK) &&
1324                             chip->sdr104_en) {
1325                                 func_to_switch = SDR104_SUPPORT;
1326                         }
1327                         break;
1328
1329                 case DDR50_SUPPORT:
1330                         if ((sd_card->func_group1_mask & DDR50_SUPPORT_MASK) &&
1331                             chip->ddr50_en) {
1332                                 func_to_switch = DDR50_SUPPORT;
1333                         }
1334                         break;
1335
1336                 case SDR50_SUPPORT:
1337                         if ((sd_card->func_group1_mask & SDR50_SUPPORT_MASK) &&
1338                             chip->sdr50_en) {
1339                                 func_to_switch = SDR50_SUPPORT;
1340                         }
1341                         break;
1342
1343                 case HS_SUPPORT:
1344                         if (sd_card->func_group1_mask & HS_SUPPORT_MASK)
1345                                 func_to_switch = HS_SUPPORT;
1346
1347                         break;
1348
1349                 default:
1350                         continue;
1351                 }
1352
1353                 if (func_to_switch)
1354                         break;
1355         }
1356         dev_dbg(rtsx_dev(chip), "SD_FUNC_GROUP_1: func_to_switch = 0x%02x",
1357                 func_to_switch);
1358
1359 #ifdef SUPPORT_SD_LOCK
1360         if ((sd_card->sd_lock_status & SD_SDR_RST) &&
1361             (func_to_switch == DDR50_SUPPORT) &&
1362             (sd_card->func_group1_mask & SDR50_SUPPORT_MASK)) {
1363                 func_to_switch = SDR50_SUPPORT;
1364                 dev_dbg(rtsx_dev(chip), "Using SDR50 instead of DDR50 for SD Lock\n");
1365         }
1366 #endif
1367
1368         if (func_to_switch) {
1369                 retval = sd_check_switch(chip, SD_FUNC_GROUP_1, func_to_switch,
1370                                          bus_width);
1371                 if (retval != STATUS_SUCCESS) {
1372                         if (func_to_switch == SDR104_SUPPORT) {
1373                                 sd_card->sd_switch_fail = SDR104_SUPPORT_MASK;
1374                         } else if (func_to_switch == DDR50_SUPPORT) {
1375                                 sd_card->sd_switch_fail = SDR104_SUPPORT_MASK |
1376                                         DDR50_SUPPORT_MASK;
1377                         } else if (func_to_switch == SDR50_SUPPORT) {
1378                                 sd_card->sd_switch_fail = SDR104_SUPPORT_MASK |
1379                                         DDR50_SUPPORT_MASK | SDR50_SUPPORT_MASK;
1380                         }
1381                         return STATUS_FAIL;
1382                 }
1383
1384                 if (func_to_switch == SDR104_SUPPORT)
1385                         SET_SD_SDR104(sd_card);
1386                 else if (func_to_switch == DDR50_SUPPORT)
1387                         SET_SD_DDR50(sd_card);
1388                 else if (func_to_switch == SDR50_SUPPORT)
1389                         SET_SD_SDR50(sd_card);
1390                 else
1391                         SET_SD_HS(sd_card);
1392         }
1393
1394         if (CHK_SD_DDR50(sd_card)) {
1395                 retval = rtsx_write_register(chip, SD_PUSH_POINT_CTL, 0x06,
1396                                              0x04);
1397                 if (retval) {
1398                         return retval;
1399                 }
1400                 retval = sd_set_sample_push_timing(chip);
1401                 if (retval != STATUS_SUCCESS) {
1402                         return STATUS_FAIL;
1403                 }
1404         }
1405
1406         if (!func_to_switch || (func_to_switch == HS_SUPPORT)) {
1407                 /* Do not try to switch current limit if the card doesn't
1408                  * support UHS mode or we don't want it to support UHS mode
1409                  */
1410                 return STATUS_SUCCESS;
1411         }
1412
1413         /* Function Group 4: Current Limit */
1414         func_to_switch = 0xFF;
1415
1416         for (i = 0; i < 4; i++) {
1417                 switch ((u8)(chip->sd_current_prior >> (i * 8))) {
1418                 case CURRENT_LIMIT_800:
1419                         if (sd_card->func_group4_mask & CURRENT_LIMIT_800_MASK)
1420                                 func_to_switch = CURRENT_LIMIT_800;
1421
1422                         break;
1423
1424                 case CURRENT_LIMIT_600:
1425                         if (sd_card->func_group4_mask & CURRENT_LIMIT_600_MASK)
1426                                 func_to_switch = CURRENT_LIMIT_600;
1427
1428                         break;
1429
1430                 case CURRENT_LIMIT_400:
1431                         if (sd_card->func_group4_mask & CURRENT_LIMIT_400_MASK)
1432                                 func_to_switch = CURRENT_LIMIT_400;
1433
1434                         break;
1435
1436                 case CURRENT_LIMIT_200:
1437                         if (sd_card->func_group4_mask & CURRENT_LIMIT_200_MASK)
1438                                 func_to_switch = CURRENT_LIMIT_200;
1439
1440                         break;
1441
1442                 default:
1443                         continue;
1444                 }
1445
1446                 if (func_to_switch != 0xFF)
1447                         break;
1448         }
1449
1450         dev_dbg(rtsx_dev(chip), "SD_FUNC_GROUP_4: func_to_switch = 0x%02x",
1451                 func_to_switch);
1452
1453         if (func_to_switch <= CURRENT_LIMIT_800) {
1454                 retval = sd_check_switch(chip, SD_FUNC_GROUP_4, func_to_switch,
1455                                          bus_width);
1456                 if (retval != STATUS_SUCCESS) {
1457                         if (sd_check_err_code(chip, SD_NO_CARD)) {
1458                                 return STATUS_FAIL;
1459                         }
1460                 }
1461                 dev_dbg(rtsx_dev(chip), "Switch current limit finished! (%d)\n",
1462                         retval);
1463         }
1464
1465         if (CHK_SD_DDR50(sd_card)) {
1466                 retval = rtsx_write_register(chip, SD_PUSH_POINT_CTL, 0x06, 0);
1467                 if (retval) {
1468                         return retval;
1469                 }
1470         }
1471
1472         return STATUS_SUCCESS;
1473 }
1474
1475 static int sd_wait_data_idle(struct rtsx_chip *chip)
1476 {
1477         int retval = STATUS_TIMEDOUT;
1478         int i;
1479         u8 val = 0;
1480
1481         for (i = 0; i < 100; i++) {
1482                 retval = rtsx_read_register(chip, SD_DATA_STATE, &val);
1483                 if (retval) {
1484                         return retval;
1485                 }
1486                 if (val & SD_DATA_IDLE) {
1487                         retval = STATUS_SUCCESS;
1488                         break;
1489                 }
1490                 udelay(100);
1491         }
1492         dev_dbg(rtsx_dev(chip), "SD_DATA_STATE: 0x%02x\n", val);
1493
1494         return retval;
1495 }
1496
1497 static int sd_sdr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point)
1498 {
1499         int retval;
1500         u8 cmd[5];
1501
1502         retval = sd_change_phase(chip, sample_point, TUNE_RX);
1503         if (retval != STATUS_SUCCESS) {
1504                 return STATUS_FAIL;
1505         }
1506
1507         cmd[0] = 0x40 | SEND_TUNING_PATTERN;
1508         cmd[1] = 0;
1509         cmd[2] = 0;
1510         cmd[3] = 0;
1511         cmd[4] = 0;
1512
1513         retval = sd_read_data(chip, SD_TM_AUTO_TUNING, cmd, 5, 0x40, 1,
1514                               SD_BUS_WIDTH_4, NULL, 0, 100);
1515         if (retval != STATUS_SUCCESS) {
1516                 (void)sd_wait_data_idle(chip);
1517
1518                 rtsx_clear_sd_error(chip);
1519                 return STATUS_FAIL;
1520         }
1521
1522         return STATUS_SUCCESS;
1523 }
1524
1525 static int sd_ddr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point)
1526 {
1527         struct sd_info *sd_card = &chip->sd_card;
1528         int retval;
1529         u8 cmd[5];
1530
1531         retval = sd_change_phase(chip, sample_point, TUNE_RX);
1532         if (retval != STATUS_SUCCESS) {
1533                 return STATUS_FAIL;
1534         }
1535
1536         dev_dbg(rtsx_dev(chip), "sd ddr tuning rx\n");
1537
1538         retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
1539                                      SD_RSP_TYPE_R1, NULL, 0);
1540         if (retval != STATUS_SUCCESS) {
1541                 return STATUS_FAIL;
1542         }
1543
1544         cmd[0] = 0x40 | SD_STATUS;
1545         cmd[1] = 0;
1546         cmd[2] = 0;
1547         cmd[3] = 0;
1548         cmd[4] = 0;
1549
1550         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 64, 1,
1551                               SD_BUS_WIDTH_4, NULL, 0, 100);
1552         if (retval != STATUS_SUCCESS) {
1553                 (void)sd_wait_data_idle(chip);
1554
1555                 rtsx_clear_sd_error(chip);
1556                 return STATUS_FAIL;
1557         }
1558
1559         return STATUS_SUCCESS;
1560 }
1561
1562 static int mmc_ddr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point)
1563 {
1564         struct sd_info *sd_card = &chip->sd_card;
1565         int retval;
1566         u8 cmd[5], bus_width;
1567
1568         if (CHK_MMC_8BIT(sd_card))
1569                 bus_width = SD_BUS_WIDTH_8;
1570         else if (CHK_MMC_4BIT(sd_card))
1571                 bus_width = SD_BUS_WIDTH_4;
1572         else
1573                 bus_width = SD_BUS_WIDTH_1;
1574
1575         retval = sd_change_phase(chip, sample_point, TUNE_RX);
1576         if (retval != STATUS_SUCCESS) {
1577                 return STATUS_FAIL;
1578         }
1579
1580         dev_dbg(rtsx_dev(chip), "mmc ddr tuning rx\n");
1581
1582         cmd[0] = 0x40 | SEND_EXT_CSD;
1583         cmd[1] = 0;
1584         cmd[2] = 0;
1585         cmd[3] = 0;
1586         cmd[4] = 0;
1587
1588         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 0x200, 1,
1589                               bus_width, NULL, 0, 100);
1590         if (retval != STATUS_SUCCESS) {
1591                 (void)sd_wait_data_idle(chip);
1592
1593                 rtsx_clear_sd_error(chip);
1594                 return STATUS_FAIL;
1595         }
1596
1597         return STATUS_SUCCESS;
1598 }
1599
1600 static int sd_sdr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point)
1601 {
1602         struct sd_info *sd_card = &chip->sd_card;
1603         int retval;
1604
1605         retval = sd_change_phase(chip, sample_point, TUNE_TX);
1606         if (retval != STATUS_SUCCESS) {
1607                 return STATUS_FAIL;
1608         }
1609
1610         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1611                                      SD_RSP_80CLK_TIMEOUT_EN);
1612         if (retval) {
1613                 return retval;
1614         }
1615
1616         retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
1617                                      SD_RSP_TYPE_R1, NULL, 0);
1618         if (retval != STATUS_SUCCESS) {
1619                 if (sd_check_err_code(chip, SD_RSP_TIMEOUT)) {
1620                         rtsx_write_register(chip, SD_CFG3,
1621                                             SD_RSP_80CLK_TIMEOUT_EN, 0);
1622                         return STATUS_FAIL;
1623                 }
1624         }
1625
1626         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1627                                      0);
1628         if (retval) {
1629                 return retval;
1630         }
1631
1632         return STATUS_SUCCESS;
1633 }
1634
1635 static int sd_ddr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point)
1636 {
1637         struct sd_info *sd_card = &chip->sd_card;
1638         int retval;
1639         u8 cmd[5], bus_width;
1640
1641         retval = sd_change_phase(chip, sample_point, TUNE_TX);
1642         if (retval != STATUS_SUCCESS) {
1643                 return STATUS_FAIL;
1644         }
1645
1646         if (CHK_SD(sd_card)) {
1647                 bus_width = SD_BUS_WIDTH_4;
1648         } else {
1649                 if (CHK_MMC_8BIT(sd_card))
1650                         bus_width = SD_BUS_WIDTH_8;
1651                 else if (CHK_MMC_4BIT(sd_card))
1652                         bus_width = SD_BUS_WIDTH_4;
1653                 else
1654                         bus_width = SD_BUS_WIDTH_1;
1655         }
1656
1657         retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
1658         if (retval != STATUS_SUCCESS) {
1659                 return STATUS_FAIL;
1660         }
1661
1662         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1663                                      SD_RSP_80CLK_TIMEOUT_EN);
1664         if (retval) {
1665                 return retval;
1666         }
1667
1668         cmd[0] = 0x40 | PROGRAM_CSD;
1669         cmd[1] = 0;
1670         cmd[2] = 0;
1671         cmd[3] = 0;
1672         cmd[4] = 0;
1673
1674         retval = sd_write_data(chip, SD_TM_AUTO_WRITE_2, cmd, 5, 16, 1,
1675                                bus_width, sd_card->raw_csd, 16, 100);
1676         if (retval != STATUS_SUCCESS) {
1677                 rtsx_clear_sd_error(chip);
1678                 rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);
1679                 return STATUS_FAIL;
1680         }
1681
1682         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1683                                      0);
1684         if (retval) {
1685                 return retval;
1686         }
1687
1688         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1,
1689                             NULL, 0);
1690
1691         return STATUS_SUCCESS;
1692 }
1693
1694 static u8 sd_search_final_phase(struct rtsx_chip *chip, u32 phase_map,
1695                                 u8 tune_dir)
1696 {
1697         struct sd_info *sd_card = &chip->sd_card;
1698         struct timing_phase_path path[MAX_PHASE + 1];
1699         int i, j, cont_path_cnt;
1700         bool new_block;
1701         int max_len, final_path_idx;
1702         u8 final_phase = 0xFF;
1703
1704         if (phase_map == 0xFFFFFFFF) {
1705                 if (tune_dir == TUNE_RX)
1706                         final_phase = (u8)chip->sd_default_rx_phase;
1707                 else
1708                         final_phase = (u8)chip->sd_default_tx_phase;
1709
1710                 goto search_finish;
1711         }
1712
1713         cont_path_cnt = 0;
1714         new_block = true;
1715         j = 0;
1716         for (i = 0; i < MAX_PHASE + 1; i++) {
1717                 if (phase_map & (1 << i)) {
1718                         if (new_block) {
1719                                 new_block = false;
1720                                 j = cont_path_cnt++;
1721                                 path[j].start = i;
1722                                 path[j].end = i;
1723                         } else {
1724                                 path[j].end = i;
1725                         }
1726                 } else {
1727                         new_block = true;
1728                         if (cont_path_cnt) {
1729                                 int idx = cont_path_cnt - 1;
1730
1731                                 path[idx].len = path[idx].end -
1732                                         path[idx].start + 1;
1733                                 path[idx].mid = path[idx].start +
1734                                         path[idx].len / 2;
1735                         }
1736                 }
1737         }
1738
1739         if (cont_path_cnt == 0) {
1740                 dev_dbg(rtsx_dev(chip), "No continuous phase path\n");
1741                 goto search_finish;
1742         } else {
1743                 int idx = cont_path_cnt - 1;
1744
1745                 path[idx].len = path[idx].end - path[idx].start + 1;
1746                 path[idx].mid = path[idx].start + path[idx].len / 2;
1747         }
1748
1749         if ((path[0].start == 0) &&
1750             (path[cont_path_cnt - 1].end == MAX_PHASE)) {
1751                 path[0].start = path[cont_path_cnt - 1].start - MAX_PHASE - 1;
1752                 path[0].len += path[cont_path_cnt - 1].len;
1753                 path[0].mid = path[0].start + path[0].len / 2;
1754                 if (path[0].mid < 0)
1755                         path[0].mid += MAX_PHASE + 1;
1756
1757                 cont_path_cnt--;
1758         }
1759
1760         max_len = 0;
1761         final_phase = 0;
1762         final_path_idx = 0;
1763         for (i = 0; i < cont_path_cnt; i++) {
1764                 if (path[i].len > max_len) {
1765                         max_len = path[i].len;
1766                         final_phase = (u8)path[i].mid;
1767                         final_path_idx = i;
1768                 }
1769
1770                 dev_dbg(rtsx_dev(chip), "path[%d].start = %d\n",
1771                         i, path[i].start);
1772                 dev_dbg(rtsx_dev(chip), "path[%d].end = %d\n", i, path[i].end);
1773                 dev_dbg(rtsx_dev(chip), "path[%d].len = %d\n", i, path[i].len);
1774                 dev_dbg(rtsx_dev(chip), "path[%d].mid = %d\n", i, path[i].mid);
1775                 dev_dbg(rtsx_dev(chip), "\n");
1776         }
1777
1778         if (tune_dir == TUNE_TX) {
1779                 if (CHK_SD_SDR104(sd_card)) {
1780                         if (max_len > 15) {
1781                                 int temp_mid = (max_len - 16) / 2;
1782                                 int temp_final_phase =
1783                                         path[final_path_idx].end -
1784                                         (max_len - (6 + temp_mid));
1785
1786                                 if (temp_final_phase < 0)
1787                                         final_phase = (u8)(temp_final_phase +
1788                                                         MAX_PHASE + 1);
1789                                 else
1790                                         final_phase = (u8)temp_final_phase;
1791                         }
1792                 } else if (CHK_SD_SDR50(sd_card)) {
1793                         if (max_len > 12) {
1794                                 int temp_mid = (max_len - 13) / 2;
1795                                 int temp_final_phase =
1796                                         path[final_path_idx].end -
1797                                         (max_len - (3 + temp_mid));
1798
1799                                 if (temp_final_phase < 0)
1800                                         final_phase = (u8)(temp_final_phase +
1801                                                         MAX_PHASE + 1);
1802                                 else
1803                                         final_phase = (u8)temp_final_phase;
1804                         }
1805                 }
1806         }
1807
1808 search_finish:
1809         dev_dbg(rtsx_dev(chip), "Final chosen phase: %d\n", final_phase);
1810         return final_phase;
1811 }
1812
1813 static int sd_tuning_rx(struct rtsx_chip *chip)
1814 {
1815         struct sd_info *sd_card = &chip->sd_card;
1816         int retval;
1817         int i, j;
1818         u32 raw_phase_map[3], phase_map;
1819         u8 final_phase;
1820         int (*tuning_cmd)(struct rtsx_chip *chip, u8 sample_point);
1821
1822         if (CHK_SD(sd_card)) {
1823                 if (CHK_SD_DDR50(sd_card))
1824                         tuning_cmd = sd_ddr_tuning_rx_cmd;
1825                 else
1826                         tuning_cmd = sd_sdr_tuning_rx_cmd;
1827
1828         } else {
1829                 if (CHK_MMC_DDR52(sd_card)) {
1830                         tuning_cmd = mmc_ddr_tuning_rx_cmd;
1831                 } else {
1832                         return STATUS_FAIL;
1833                 }
1834         }
1835
1836         for (i = 0; i < 3; i++) {
1837                 raw_phase_map[i] = 0;
1838                 for (j = MAX_PHASE; j >= 0; j--) {
1839                         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1840                                 sd_set_err_code(chip, SD_NO_CARD);
1841                                 return STATUS_FAIL;
1842                         }
1843
1844                         retval = tuning_cmd(chip, (u8)j);
1845                         if (retval == STATUS_SUCCESS)
1846                                 raw_phase_map[i] |= 1 << j;
1847                 }
1848         }
1849
1850         phase_map = raw_phase_map[0] & raw_phase_map[1] & raw_phase_map[2];
1851         for (i = 0; i < 3; i++)
1852                 dev_dbg(rtsx_dev(chip), "RX raw_phase_map[%d] = 0x%08x\n",
1853                         i, raw_phase_map[i]);
1854
1855         dev_dbg(rtsx_dev(chip), "RX phase_map = 0x%08x\n", phase_map);
1856
1857         final_phase = sd_search_final_phase(chip, phase_map, TUNE_RX);
1858         if (final_phase == 0xFF) {
1859                 return STATUS_FAIL;
1860         }
1861
1862         retval = sd_change_phase(chip, final_phase, TUNE_RX);
1863         if (retval != STATUS_SUCCESS) {
1864                 return STATUS_FAIL;
1865         }
1866
1867         return STATUS_SUCCESS;
1868 }
1869
1870 static int sd_ddr_pre_tuning_tx(struct rtsx_chip *chip)
1871 {
1872         struct sd_info *sd_card = &chip->sd_card;
1873         int retval;
1874         int i;
1875         u32 phase_map;
1876         u8 final_phase;
1877
1878         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1879                                      SD_RSP_80CLK_TIMEOUT_EN);
1880         if (retval) {
1881                 return retval;
1882         }
1883
1884         phase_map = 0;
1885         for (i = MAX_PHASE; i >= 0; i--) {
1886                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1887                         sd_set_err_code(chip, SD_NO_CARD);
1888                         rtsx_write_register(chip, SD_CFG3,
1889                                             SD_RSP_80CLK_TIMEOUT_EN, 0);
1890                         return STATUS_FAIL;
1891                 }
1892
1893                 retval = sd_change_phase(chip, (u8)i, TUNE_TX);
1894                 if (retval != STATUS_SUCCESS)
1895                         continue;
1896
1897                 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS,
1898                                              sd_card->sd_addr, SD_RSP_TYPE_R1,
1899                                              NULL, 0);
1900                 if ((retval == STATUS_SUCCESS) ||
1901                     !sd_check_err_code(chip, SD_RSP_TIMEOUT))
1902                         phase_map |= 1 << i;
1903         }
1904
1905         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1906                                      0);
1907         if (retval) {
1908                 return retval;
1909         }
1910
1911         dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase_map = 0x%08x\n",
1912                 phase_map);
1913
1914         final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX);
1915         if (final_phase == 0xFF) {
1916                 return STATUS_FAIL;
1917         }
1918
1919         retval = sd_change_phase(chip, final_phase, TUNE_TX);
1920         if (retval != STATUS_SUCCESS) {
1921                 return STATUS_FAIL;
1922         }
1923
1924         dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase: %d\n",
1925                 (int)final_phase);
1926
1927         return STATUS_SUCCESS;
1928 }
1929
1930 static int sd_tuning_tx(struct rtsx_chip *chip)
1931 {
1932         struct sd_info *sd_card = &chip->sd_card;
1933         int retval;
1934         int i, j;
1935         u32 raw_phase_map[3], phase_map;
1936         u8 final_phase;
1937         int (*tuning_cmd)(struct rtsx_chip *chip, u8 sample_point);
1938
1939         if (CHK_SD(sd_card)) {
1940                 if (CHK_SD_DDR50(sd_card))
1941                         tuning_cmd = sd_ddr_tuning_tx_cmd;
1942                 else
1943                         tuning_cmd = sd_sdr_tuning_tx_cmd;
1944
1945         } else {
1946                 if (CHK_MMC_DDR52(sd_card)) {
1947                         tuning_cmd = sd_ddr_tuning_tx_cmd;
1948                 } else {
1949                         return STATUS_FAIL;
1950                 }
1951         }
1952
1953         for (i = 0; i < 3; i++) {
1954                 raw_phase_map[i] = 0;
1955                 for (j = MAX_PHASE; j >= 0; j--) {
1956                         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1957                                 sd_set_err_code(chip, SD_NO_CARD);
1958                                 rtsx_write_register(chip, SD_CFG3,
1959                                                     SD_RSP_80CLK_TIMEOUT_EN, 0);
1960                                 return STATUS_FAIL;
1961                         }
1962
1963                         retval = tuning_cmd(chip, (u8)j);
1964                         if (retval == STATUS_SUCCESS)
1965                                 raw_phase_map[i] |= 1 << j;
1966                 }
1967         }
1968
1969         phase_map = raw_phase_map[0] & raw_phase_map[1] & raw_phase_map[2];
1970         for (i = 0; i < 3; i++)
1971                 dev_dbg(rtsx_dev(chip), "TX raw_phase_map[%d] = 0x%08x\n",
1972                         i, raw_phase_map[i]);
1973
1974         dev_dbg(rtsx_dev(chip), "TX phase_map = 0x%08x\n", phase_map);
1975
1976         final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX);
1977         if (final_phase == 0xFF) {
1978                 return STATUS_FAIL;
1979         }
1980
1981         retval = sd_change_phase(chip, final_phase, TUNE_TX);
1982         if (retval != STATUS_SUCCESS) {
1983                 return STATUS_FAIL;
1984         }
1985
1986         return STATUS_SUCCESS;
1987 }
1988
1989 static int sd_sdr_tuning(struct rtsx_chip *chip)
1990 {
1991         int retval;
1992
1993         retval = sd_tuning_tx(chip);
1994         if (retval != STATUS_SUCCESS) {
1995                 return STATUS_FAIL;
1996         }
1997
1998         retval = sd_tuning_rx(chip);
1999         if (retval != STATUS_SUCCESS) {
2000                 return STATUS_FAIL;
2001         }
2002
2003         return STATUS_SUCCESS;
2004 }
2005
2006 static int sd_ddr_tuning(struct rtsx_chip *chip)
2007 {
2008         int retval;
2009
2010         if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) {
2011                 retval = sd_ddr_pre_tuning_tx(chip);
2012                 if (retval != STATUS_SUCCESS) {
2013                         return STATUS_FAIL;
2014                 }
2015         } else {
2016                 retval = sd_change_phase(chip, (u8)chip->sd_ddr_tx_phase,
2017                                          TUNE_TX);
2018                 if (retval != STATUS_SUCCESS) {
2019                         return STATUS_FAIL;
2020                 }
2021         }
2022
2023         retval = sd_tuning_rx(chip);
2024         if (retval != STATUS_SUCCESS) {
2025                 return STATUS_FAIL;
2026         }
2027
2028         if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) {
2029                 retval = sd_tuning_tx(chip);
2030                 if (retval != STATUS_SUCCESS) {
2031                         return STATUS_FAIL;
2032                 }
2033         }
2034
2035         return STATUS_SUCCESS;
2036 }
2037
2038 static int mmc_ddr_tuning(struct rtsx_chip *chip)
2039 {
2040         int retval;
2041
2042         if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) {
2043                 retval = sd_ddr_pre_tuning_tx(chip);
2044                 if (retval != STATUS_SUCCESS) {
2045                         return STATUS_FAIL;
2046                 }
2047         } else {
2048                 retval = sd_change_phase(chip, (u8)chip->mmc_ddr_tx_phase,
2049                                          TUNE_TX);
2050                 if (retval != STATUS_SUCCESS) {
2051                         return STATUS_FAIL;
2052                 }
2053         }
2054
2055         retval = sd_tuning_rx(chip);
2056         if (retval != STATUS_SUCCESS) {
2057                 return STATUS_FAIL;
2058         }
2059
2060         if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) {
2061                 retval = sd_tuning_tx(chip);
2062                 if (retval != STATUS_SUCCESS) {
2063                         return STATUS_FAIL;
2064                 }
2065         }
2066
2067         return STATUS_SUCCESS;
2068 }
2069
2070 int sd_switch_clock(struct rtsx_chip *chip)
2071 {
2072         struct sd_info *sd_card = &chip->sd_card;
2073         int retval;
2074         int re_tuning = 0;
2075
2076         retval = select_card(chip, SD_CARD);
2077         if (retval != STATUS_SUCCESS) {
2078                 return STATUS_FAIL;
2079         }
2080
2081         retval = switch_clock(chip, sd_card->sd_clock);
2082         if (retval != STATUS_SUCCESS) {
2083                 return STATUS_FAIL;
2084         }
2085
2086         if (re_tuning) {
2087                 if (CHK_SD(sd_card)) {
2088                         if (CHK_SD_DDR50(sd_card))
2089                                 retval = sd_ddr_tuning(chip);
2090                         else
2091                                 retval = sd_sdr_tuning(chip);
2092                 } else {
2093                         if (CHK_MMC_DDR52(sd_card))
2094                                 retval = mmc_ddr_tuning(chip);
2095                 }
2096
2097                 if (retval != STATUS_SUCCESS) {
2098                         return STATUS_FAIL;
2099                 }
2100         }
2101
2102         return STATUS_SUCCESS;
2103 }
2104
2105 static int sd_prepare_reset(struct rtsx_chip *chip)
2106 {
2107         struct sd_info *sd_card = &chip->sd_card;
2108         int retval;
2109
2110         if (chip->asic_code)
2111                 sd_card->sd_clock = 29;
2112         else
2113                 sd_card->sd_clock = CLK_30;
2114
2115         sd_card->sd_type = 0;
2116         sd_card->seq_mode = 0;
2117         sd_card->sd_data_buf_ready = 0;
2118         sd_card->capacity = 0;
2119
2120 #ifdef SUPPORT_SD_LOCK
2121         sd_card->sd_lock_status = 0;
2122         sd_card->sd_erase_status = 0;
2123 #endif
2124
2125         chip->capacity[chip->card2lun[SD_CARD]] = 0;
2126         chip->sd_io = 0;
2127
2128         retval = sd_set_init_para(chip);
2129         if (retval != STATUS_SUCCESS) {
2130                 return retval;
2131         }
2132
2133         retval = rtsx_write_register(chip, REG_SD_CFG1, 0xFF, 0x40);
2134         if (retval) {
2135                 return retval;
2136         }
2137
2138         retval = rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR,
2139                                      SD_STOP | SD_CLR_ERR);
2140         if (retval) {
2141                 return retval;
2142         }
2143
2144         retval = select_card(chip, SD_CARD);
2145         if (retval != STATUS_SUCCESS) {
2146                 return STATUS_FAIL;
2147         }
2148
2149         return STATUS_SUCCESS;
2150 }
2151
2152 static int sd_pull_ctl_disable(struct rtsx_chip *chip)
2153 {
2154         int retval;
2155
2156         if (CHECK_PID(chip, 0x5208)) {
2157                 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
2158                                              XD_D3_PD | SD_D7_PD | SD_CLK_PD |
2159                                              SD_D5_PD);
2160                 if (retval) {
2161                         return retval;
2162                 }
2163                 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
2164                                              SD_D6_PD | SD_D0_PD | SD_D1_PD |
2165                                              XD_D5_PD);
2166                 if (retval) {
2167                         return retval;
2168                 }
2169                 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
2170                                              SD_D4_PD | XD_CE_PD | XD_CLE_PD |
2171                                              XD_CD_PU);
2172                 if (retval) {
2173                         return retval;
2174                 }
2175                 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
2176                                              XD_RDY_PD | SD_D3_PD | SD_D2_PD |
2177                                              XD_ALE_PD);
2178                 if (retval) {
2179                         return retval;
2180                 }
2181                 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
2182                                              MS_INS_PU | SD_WP_PD | SD_CD_PU |
2183                                              SD_CMD_PD);
2184                 if (retval) {
2185                         return retval;
2186                 }
2187                 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
2188                                              MS_D5_PD | MS_D4_PD);
2189                 if (retval) {
2190                         return retval;
2191                 }
2192         } else if (CHECK_PID(chip, 0x5288)) {
2193                 if (CHECK_BARO_PKG(chip, QFN)) {
2194                         retval = rtsx_write_register(chip, CARD_PULL_CTL1,
2195                                                      0xFF, 0x55);
2196                         if (retval) {
2197                                 return retval;
2198                         }
2199                         retval = rtsx_write_register(chip, CARD_PULL_CTL2,
2200                                                      0xFF, 0x55);
2201                         if (retval) {
2202                                 return retval;
2203                         }
2204                         retval = rtsx_write_register(chip, CARD_PULL_CTL3,
2205                                                      0xFF, 0x4B);
2206                         if (retval) {
2207                                 return retval;
2208                         }
2209                         retval = rtsx_write_register(chip, CARD_PULL_CTL4,
2210                                                      0xFF, 0x69);
2211                         if (retval) {
2212                                 return retval;
2213                         }
2214                 }
2215         }
2216
2217         return STATUS_SUCCESS;
2218 }
2219
2220 int sd_pull_ctl_enable(struct rtsx_chip *chip)
2221 {
2222         int retval;
2223
2224         rtsx_init_cmd(chip);
2225
2226         if (CHECK_PID(chip, 0x5208)) {
2227                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
2228                              XD_D3_PD | SD_DAT7_PU | SD_CLK_NP | SD_D5_PU);
2229                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
2230                              SD_D6_PU | SD_D0_PU | SD_D1_PU | XD_D5_PD);
2231                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
2232                              SD_D4_PU | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
2233                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
2234                              XD_RDY_PD | SD_D3_PU | SD_D2_PU | XD_ALE_PD);
2235                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
2236                              MS_INS_PU | SD_WP_PU | SD_CD_PU | SD_CMD_PU);
2237                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
2238                              MS_D5_PD | MS_D4_PD);
2239         } else if (CHECK_PID(chip, 0x5288)) {
2240                 if (CHECK_BARO_PKG(chip, QFN)) {
2241                         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
2242                                      0xA8);
2243                         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
2244                                      0x5A);
2245                         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
2246                                      0x95);
2247                         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
2248                                      0xAA);
2249                 }
2250         }
2251
2252         retval = rtsx_send_cmd(chip, SD_CARD, 100);
2253         if (retval < 0) {
2254                 return STATUS_FAIL;
2255         }
2256
2257         return STATUS_SUCCESS;
2258 }
2259
2260 static int sd_init_power(struct rtsx_chip *chip)
2261 {
2262         int retval;
2263
2264         retval = sd_power_off_card3v3(chip);
2265         if (retval != STATUS_SUCCESS) {
2266                 return STATUS_FAIL;
2267         }
2268
2269         if (!chip->ft2_fast_mode)
2270                 wait_timeout(250);
2271
2272         retval = enable_card_clock(chip, SD_CARD);
2273         if (retval != STATUS_SUCCESS) {
2274                 return STATUS_FAIL;
2275         }
2276
2277         if (chip->asic_code) {
2278                 retval = sd_pull_ctl_enable(chip);
2279                 if (retval != STATUS_SUCCESS) {
2280                         return STATUS_FAIL;
2281                 }
2282         } else {
2283                 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
2284                                              FPGA_SD_PULL_CTL_BIT | 0x20, 0);
2285                 if (retval) {
2286                         return retval;
2287                 }
2288         }
2289
2290         if (!chip->ft2_fast_mode) {
2291                 retval = card_power_on(chip, SD_CARD);
2292                 if (retval != STATUS_SUCCESS) {
2293                         return STATUS_FAIL;
2294                 }
2295
2296                 wait_timeout(260);
2297
2298 #ifdef SUPPORT_OCP
2299                 if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
2300                         dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
2301                                 chip->ocp_stat);
2302                         return STATUS_FAIL;
2303                 }
2304 #endif
2305         }
2306
2307         retval = rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN,
2308                                      SD_OUTPUT_EN);
2309         if (retval) {
2310                 return retval;
2311         }
2312
2313         return STATUS_SUCCESS;
2314 }
2315
2316 static int sd_dummy_clock(struct rtsx_chip *chip)
2317 {
2318         int retval;
2319
2320         retval = rtsx_write_register(chip, REG_SD_CFG3, 0x01, 0x01);
2321         if (retval) {
2322                 return retval;
2323         }
2324         wait_timeout(5);
2325         retval = rtsx_write_register(chip, REG_SD_CFG3, 0x01, 0);
2326         if (retval) {
2327                 return retval;
2328         }
2329
2330         return STATUS_SUCCESS;
2331 }
2332
2333 static int sd_read_lba0(struct rtsx_chip *chip)
2334 {
2335         struct sd_info *sd_card = &chip->sd_card;
2336         int retval;
2337         u8 cmd[5], bus_width;
2338
2339         cmd[0] = 0x40 | READ_SINGLE_BLOCK;
2340         cmd[1] = 0;
2341         cmd[2] = 0;
2342         cmd[3] = 0;
2343         cmd[4] = 0;
2344
2345         if (CHK_SD(sd_card)) {
2346                 bus_width = SD_BUS_WIDTH_4;
2347         } else {
2348                 if (CHK_MMC_8BIT(sd_card))
2349                         bus_width = SD_BUS_WIDTH_8;
2350                 else if (CHK_MMC_4BIT(sd_card))
2351                         bus_width = SD_BUS_WIDTH_4;
2352                 else
2353                         bus_width = SD_BUS_WIDTH_1;
2354         }
2355
2356         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 512, 1,
2357                               bus_width, NULL, 0, 100);
2358         if (retval != STATUS_SUCCESS) {
2359                 rtsx_clear_sd_error(chip);
2360                 return STATUS_FAIL;
2361         }
2362
2363         return STATUS_SUCCESS;
2364 }
2365
2366 static int sd_check_wp_state(struct rtsx_chip *chip)
2367 {
2368         struct sd_info *sd_card = &chip->sd_card;
2369         int retval;
2370         u32 val;
2371         u16 sd_card_type;
2372         u8 cmd[5], buf[64];
2373
2374         retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
2375                                      SD_RSP_TYPE_R1, NULL, 0);
2376         if (retval != STATUS_SUCCESS) {
2377                 return STATUS_FAIL;
2378         }
2379
2380         cmd[0] = 0x40 | SD_STATUS;
2381         cmd[1] = 0;
2382         cmd[2] = 0;
2383         cmd[3] = 0;
2384         cmd[4] = 0;
2385
2386         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 64, 1,
2387                               SD_BUS_WIDTH_4, buf, 64, 250);
2388         if (retval != STATUS_SUCCESS) {
2389                 rtsx_clear_sd_error(chip);
2390
2391                 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
2392                                     SD_RSP_TYPE_R1, NULL, 0);
2393                 return STATUS_FAIL;
2394         }
2395
2396         dev_dbg(rtsx_dev(chip), "ACMD13:\n");
2397         dev_dbg(rtsx_dev(chip), "%*ph\n", 64, buf);
2398
2399         sd_card_type = ((u16)buf[2] << 8) | buf[3];
2400         dev_dbg(rtsx_dev(chip), "sd_card_type = 0x%04x\n", sd_card_type);
2401         if ((sd_card_type == 0x0001) || (sd_card_type == 0x0002)) {
2402                 /* ROM card or OTP */
2403                 chip->card_wp |= SD_CARD;
2404         }
2405
2406         /* Check SD Machanical Write-Protect Switch */
2407         val = rtsx_readl(chip, RTSX_BIPR);
2408         if (val & SD_WRITE_PROTECT)
2409                 chip->card_wp |= SD_CARD;
2410
2411         return STATUS_SUCCESS;
2412 }
2413
2414 static int reset_sd(struct rtsx_chip *chip)
2415 {
2416         struct sd_info *sd_card = &chip->sd_card;
2417         bool hi_cap_flow = false;
2418         int retval, i = 0, j = 0, k = 0;
2419         bool sd_dont_switch = false;
2420         bool support_1v8 = false;
2421         bool try_sdio = true;
2422         u8 rsp[16];
2423         u8 switch_bus_width;
2424         u32 voltage = 0;
2425         bool sd20_mode = false;
2426
2427         SET_SD(sd_card);
2428
2429 switch_fail:
2430
2431         i = 0;
2432         j = 0;
2433         k = 0;
2434         hi_cap_flow = false;
2435
2436 #ifdef SUPPORT_SD_LOCK
2437         if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON)
2438                 goto SD_UNLOCK_ENTRY;
2439 #endif
2440
2441         retval = sd_prepare_reset(chip);
2442         if (retval != STATUS_SUCCESS)
2443                 goto status_fail;
2444
2445         retval = sd_dummy_clock(chip);
2446         if (retval != STATUS_SUCCESS)
2447                 goto status_fail;
2448
2449         if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip) && try_sdio) {
2450                 int rty_cnt = 0;
2451
2452                 for (; rty_cnt < chip->sdio_retry_cnt; rty_cnt++) {
2453                         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
2454                                 sd_set_err_code(chip, SD_NO_CARD);
2455                                 goto status_fail;
2456                         }
2457
2458                         retval = sd_send_cmd_get_rsp(chip, IO_SEND_OP_COND, 0,
2459                                                      SD_RSP_TYPE_R4, rsp, 5);
2460                         if (retval == STATUS_SUCCESS) {
2461                                 int func_num = (rsp[1] >> 4) & 0x07;
2462
2463                                 if (func_num) {
2464                                         dev_dbg(rtsx_dev(chip), "SD_IO card (Function number: %d)!\n",
2465                                                 func_num);
2466                                         chip->sd_io = 1;
2467                                         goto status_fail;
2468                                 }
2469
2470                                 break;
2471                         }
2472
2473                         sd_init_power(chip);
2474
2475                         sd_dummy_clock(chip);
2476                 }
2477
2478                 dev_dbg(rtsx_dev(chip), "Normal card!\n");
2479         }
2480
2481         /* Start Initialization Process of SD Card */
2482 RTY_SD_RST:
2483         retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0,
2484                                      NULL, 0);
2485         if (retval != STATUS_SUCCESS)
2486                 goto status_fail;
2487
2488         wait_timeout(20);
2489
2490         retval = sd_send_cmd_get_rsp(chip, SEND_IF_COND, 0x000001AA,
2491                                      SD_RSP_TYPE_R7, rsp, 5);
2492         if (retval == STATUS_SUCCESS) {
2493                 if ((rsp[4] == 0xAA) && ((rsp[3] & 0x0f) == 0x01)) {
2494                         hi_cap_flow = true;
2495                         voltage = SUPPORT_VOLTAGE | 0x40000000;
2496                 }
2497         }
2498
2499         if (!hi_cap_flow) {
2500                 voltage = SUPPORT_VOLTAGE;
2501
2502                 retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0,
2503                                              SD_RSP_TYPE_R0, NULL, 0);
2504                 if (retval != STATUS_SUCCESS)
2505                         goto status_fail;
2506
2507                 wait_timeout(20);
2508         }
2509
2510         do {
2511                 retval = sd_send_cmd_get_rsp(chip, APP_CMD, 0, SD_RSP_TYPE_R1,
2512                                              NULL, 0);
2513                 if (retval != STATUS_SUCCESS) {
2514                         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
2515                                 sd_set_err_code(chip, SD_NO_CARD);
2516                                 goto status_fail;
2517                         }
2518
2519                         j++;
2520                         if (j < 3)
2521                                 goto RTY_SD_RST;
2522                         else
2523                                 goto status_fail;
2524                 }
2525
2526                 retval = sd_send_cmd_get_rsp(chip, SD_APP_OP_COND, voltage,
2527                                              SD_RSP_TYPE_R3, rsp, 5);
2528                 if (retval != STATUS_SUCCESS) {
2529                         k++;
2530                         if (k < 3)
2531                                 goto RTY_SD_RST;
2532                         else
2533                                 goto status_fail;
2534                 }
2535
2536                 i++;
2537                 wait_timeout(20);
2538         } while (!(rsp[1] & 0x80) && (i < 255));
2539
2540         if (i == 255)
2541                 goto status_fail;
2542
2543         if (hi_cap_flow) {
2544                 if (rsp[1] & 0x40)
2545                         SET_SD_HCXC(sd_card);
2546                 else
2547                         CLR_SD_HCXC(sd_card);
2548
2549                 support_1v8 = false;
2550         } else {
2551                 CLR_SD_HCXC(sd_card);
2552                 support_1v8 = false;
2553         }
2554         dev_dbg(rtsx_dev(chip), "support_1v8 = %d\n", support_1v8);
2555
2556         if (support_1v8) {
2557                 retval = sd_voltage_switch(chip);
2558                 if (retval != STATUS_SUCCESS)
2559                         goto status_fail;
2560         }
2561
2562         retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2,
2563                                      NULL, 0);
2564         if (retval != STATUS_SUCCESS)
2565                 goto status_fail;
2566
2567         for (i = 0; i < 3; i++) {
2568                 retval = sd_send_cmd_get_rsp(chip, SEND_RELATIVE_ADDR, 0,
2569                                              SD_RSP_TYPE_R6, rsp, 5);
2570                 if (retval != STATUS_SUCCESS)
2571                         goto status_fail;
2572
2573                 sd_card->sd_addr = (u32)rsp[1] << 24;
2574                 sd_card->sd_addr += (u32)rsp[2] << 16;
2575
2576                 if (sd_card->sd_addr)
2577                         break;
2578         }
2579
2580         retval = sd_check_csd(chip, 1);
2581         if (retval != STATUS_SUCCESS)
2582                 goto status_fail;
2583
2584         retval = sd_select_card(chip, 1);
2585         if (retval != STATUS_SUCCESS)
2586                 goto status_fail;
2587
2588 #ifdef SUPPORT_SD_LOCK
2589 SD_UNLOCK_ENTRY:
2590         retval = sd_update_lock_status(chip);
2591         if (retval != STATUS_SUCCESS)
2592                 goto status_fail;
2593
2594         if (sd_card->sd_lock_status & SD_LOCKED) {
2595                 sd_card->sd_lock_status |= (SD_LOCK_1BIT_MODE | SD_PWD_EXIST);
2596                 return STATUS_SUCCESS;
2597         } else if (!(sd_card->sd_lock_status & SD_UNLOCK_POW_ON)) {
2598                 sd_card->sd_lock_status &= ~SD_PWD_EXIST;
2599         }
2600 #endif
2601
2602         retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
2603                                      SD_RSP_TYPE_R1, NULL, 0);
2604         if (retval != STATUS_SUCCESS)
2605                 goto status_fail;
2606
2607         retval = sd_send_cmd_get_rsp(chip, SET_CLR_CARD_DETECT, 0,
2608                                      SD_RSP_TYPE_R1, NULL, 0);
2609         if (retval != STATUS_SUCCESS)
2610                 goto status_fail;
2611
2612         if (support_1v8) {
2613                 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
2614                                              SD_RSP_TYPE_R1, NULL, 0);
2615                 if (retval != STATUS_SUCCESS)
2616                         goto status_fail;
2617
2618                 retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2,
2619                                              SD_RSP_TYPE_R1, NULL, 0);
2620                 if (retval != STATUS_SUCCESS)
2621                         goto status_fail;
2622
2623                 switch_bus_width = SD_BUS_WIDTH_4;
2624         } else {
2625                 switch_bus_width = SD_BUS_WIDTH_1;
2626         }
2627
2628         retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1,
2629                                      NULL, 0);
2630         if (retval != STATUS_SUCCESS)
2631                 goto status_fail;
2632
2633         retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
2634         if (retval != STATUS_SUCCESS)
2635                 goto status_fail;
2636
2637         if (!(sd_card->raw_csd[4] & 0x40))
2638                 sd_dont_switch = true;
2639
2640         if (!sd_dont_switch) {
2641                 if (sd20_mode) {
2642                         /* Set sd_switch_fail here, because we needn't
2643                          * switch to UHS mode
2644                          */
2645                         sd_card->sd_switch_fail = SDR104_SUPPORT_MASK |
2646                                 DDR50_SUPPORT_MASK | SDR50_SUPPORT_MASK;
2647                 }
2648
2649                 /* Check the card whether follow SD1.1 spec or higher */
2650                 retval = sd_check_spec(chip, switch_bus_width);
2651                 if (retval == STATUS_SUCCESS) {
2652                         retval = sd_switch_function(chip, switch_bus_width);
2653                         if (retval != STATUS_SUCCESS) {
2654                                 sd_init_power(chip);
2655                                 sd_dont_switch = true;
2656                                 try_sdio = false;
2657
2658                                 goto switch_fail;
2659                         }
2660                 } else {
2661                         if (support_1v8) {
2662                                 sd_init_power(chip);
2663                                 sd_dont_switch = true;
2664                                 try_sdio = false;
2665
2666                                 goto switch_fail;
2667                         }
2668                 }
2669         }
2670
2671         if (!support_1v8) {
2672                 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
2673                                              SD_RSP_TYPE_R1, NULL, 0);
2674                 if (retval != STATUS_SUCCESS)
2675                         goto status_fail;
2676
2677                 retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2,
2678                                              SD_RSP_TYPE_R1, NULL, 0);
2679                 if (retval != STATUS_SUCCESS)
2680                         goto status_fail;
2681         }
2682
2683 #ifdef SUPPORT_SD_LOCK
2684         sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
2685 #endif
2686
2687         if (!sd20_mode && CHK_SD30_SPEED(sd_card)) {
2688                 int read_lba0 = 1;
2689
2690                 retval = rtsx_write_register(chip, SD30_DRIVE_SEL, 0x07,
2691                                              chip->sd30_drive_sel_1v8);
2692                 if (retval) {
2693                         return retval;
2694                 }
2695
2696                 retval = sd_set_init_para(chip);
2697                 if (retval != STATUS_SUCCESS)
2698                         goto status_fail;
2699
2700                 if (CHK_SD_DDR50(sd_card))
2701                         retval = sd_ddr_tuning(chip);
2702                 else
2703                         retval = sd_sdr_tuning(chip);
2704
2705                 if (retval != STATUS_SUCCESS) {
2706                         if (sd20_mode) {
2707                                 goto status_fail;
2708                         } else {
2709                                 retval = sd_init_power(chip);
2710                                 if (retval != STATUS_SUCCESS)
2711                                         goto status_fail;
2712
2713                                 try_sdio = false;
2714                                 sd20_mode = true;
2715                                 goto switch_fail;
2716                         }
2717                 }
2718
2719                 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
2720                                     SD_RSP_TYPE_R1, NULL, 0);
2721
2722                 if (CHK_SD_DDR50(sd_card)) {
2723                         retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
2724                         if (retval != STATUS_SUCCESS)
2725                                 read_lba0 = 0;
2726                 }
2727
2728                 if (read_lba0) {
2729                         retval = sd_read_lba0(chip);
2730                         if (retval != STATUS_SUCCESS) {
2731                                 if (sd20_mode) {
2732                                         goto status_fail;
2733                                 } else {
2734                                         retval = sd_init_power(chip);
2735                                         if (retval != STATUS_SUCCESS)
2736                                                 goto status_fail;
2737
2738                                         try_sdio = false;
2739                                         sd20_mode = true;
2740                                         goto switch_fail;
2741                                 }
2742                         }
2743                 }
2744         }
2745
2746         retval = sd_check_wp_state(chip);
2747         if (retval != STATUS_SUCCESS)
2748                 goto status_fail;
2749
2750         chip->card_bus_width[chip->card2lun[SD_CARD]] = 4;
2751
2752 #ifdef SUPPORT_SD_LOCK
2753         if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON) {
2754                 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_H, 0xFF,
2755                                              0x02);
2756                 if (retval) {
2757                         return retval;
2758                 }
2759                 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_L, 0xFF,
2760                                              0x00);
2761                 if (retval) {
2762                         return retval;
2763                 }
2764         }
2765 #endif
2766
2767         return STATUS_SUCCESS;
2768
2769 status_fail:
2770         return STATUS_FAIL;
2771 }
2772
2773 static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width)
2774 {
2775         struct sd_info *sd_card = &chip->sd_card;
2776         int retval;
2777         u8 buf[8] = {0}, bus_width, *ptr;
2778         u16 byte_cnt;
2779         int len;
2780
2781         retval = sd_send_cmd_get_rsp(chip, BUSTEST_W, 0, SD_RSP_TYPE_R1, NULL,
2782                                      0);
2783         if (retval != STATUS_SUCCESS) {
2784                 return SWITCH_FAIL;
2785         }
2786
2787         if (width == MMC_8BIT_BUS) {
2788                 buf[0] = 0x55;
2789                 buf[1] = 0xAA;
2790                 len = 8;
2791                 byte_cnt = 8;
2792                 bus_width = SD_BUS_WIDTH_8;
2793         } else {
2794                 buf[0] = 0x5A;
2795                 len = 4;
2796                 byte_cnt = 4;
2797                 bus_width = SD_BUS_WIDTH_4;
2798         }
2799
2800         retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0x02);
2801         if (retval != STATUS_SUCCESS) {
2802                 return SWITCH_ERR;
2803         }
2804
2805         retval = sd_write_data(chip, SD_TM_AUTO_WRITE_3, NULL, 0, byte_cnt, 1,
2806                                bus_width, buf, len, 100);
2807         if (retval != STATUS_SUCCESS) {
2808                 rtsx_clear_sd_error(chip);
2809                 rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0);
2810                 return SWITCH_ERR;
2811         }
2812
2813         retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0);
2814         if (retval != STATUS_SUCCESS) {
2815                 return SWITCH_ERR;
2816         }
2817
2818         dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", BUSTEST_R);
2819
2820         rtsx_init_cmd(chip);
2821
2822         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | BUSTEST_R);
2823
2824         if (width == MMC_8BIT_BUS)
2825                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L,
2826                              0xFF, 0x08);
2827         else
2828                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L,
2829                              0xFF, 0x04);
2830
2831         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, 1);
2832         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, 0);
2833
2834         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, SD_CALCULATE_CRC7 |
2835                      SD_NO_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
2836                      SD_CHECK_CRC7 | SD_RSP_LEN_6);
2837         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01,
2838                      PINGPONG_BUFFER);
2839         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
2840                      SD_TM_NORMAL_READ | SD_TRANSFER_START);
2841         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
2842                      SD_TRANSFER_END);
2843
2844         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2, 0, 0);
2845         if (width == MMC_8BIT_BUS)
2846                 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 1, 0, 0);
2847
2848         retval = rtsx_send_cmd(chip, SD_CARD, 100);
2849         if (retval < 0) {
2850                 rtsx_clear_sd_error(chip);
2851                 return SWITCH_ERR;
2852         }
2853
2854         ptr = rtsx_get_cmd_data(chip) + 1;
2855
2856         if (width == MMC_8BIT_BUS) {
2857                 dev_dbg(rtsx_dev(chip), "BUSTEST_R [8bits]: 0x%02x 0x%02x\n",
2858                         ptr[0], ptr[1]);
2859                 if ((ptr[0] == 0xAA) && (ptr[1] == 0x55)) {
2860                         u8 rsp[5];
2861                         u32 arg;
2862
2863                         if (CHK_MMC_DDR52(sd_card))
2864                                 arg = 0x03B70600;
2865                         else
2866                                 arg = 0x03B70200;
2867
2868                         retval = sd_send_cmd_get_rsp(chip, SWITCH, arg,
2869                                                      SD_RSP_TYPE_R1b, rsp, 5);
2870                         if ((retval == STATUS_SUCCESS) &&
2871                             !(rsp[4] & MMC_SWITCH_ERR))
2872                                 return SWITCH_SUCCESS;
2873                 }
2874         } else {
2875                 dev_dbg(rtsx_dev(chip), "BUSTEST_R [4bits]: 0x%02x\n", ptr[0]);
2876                 if (ptr[0] == 0xA5) {
2877                         u8 rsp[5];
2878                         u32 arg;
2879
2880                         if (CHK_MMC_DDR52(sd_card))
2881                                 arg = 0x03B70500;
2882                         else
2883                                 arg = 0x03B70100;
2884
2885                         retval = sd_send_cmd_get_rsp(chip, SWITCH, arg,
2886                                                      SD_RSP_TYPE_R1b, rsp, 5);
2887                         if ((retval == STATUS_SUCCESS) &&
2888                             !(rsp[4] & MMC_SWITCH_ERR))
2889                                 return SWITCH_SUCCESS;
2890                 }
2891         }
2892
2893         return SWITCH_FAIL;
2894 }
2895
2896 static int mmc_switch_timing_bus(struct rtsx_chip *chip, bool switch_ddr)
2897 {
2898         struct sd_info *sd_card = &chip->sd_card;
2899         int retval;
2900         u8 *ptr, card_type, card_type_mask = 0;
2901
2902         CLR_MMC_HS(sd_card);
2903
2904         dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", SEND_EXT_CSD);
2905
2906         rtsx_init_cmd(chip);
2907
2908         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF,
2909                      0x40 | SEND_EXT_CSD);
2910         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, 0);
2911         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, 0);
2912         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, 0);
2913         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, 0);
2914
2915         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0);
2916         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, 2);
2917         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, 1);
2918         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, 0);
2919
2920         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
2921                      SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
2922                      SD_CHECK_CRC7 | SD_RSP_LEN_6);
2923         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01,
2924                      PINGPONG_BUFFER);
2925         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
2926                      SD_TM_NORMAL_READ | SD_TRANSFER_START);
2927         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
2928                      SD_TRANSFER_END);
2929
2930         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 196, 0xFF, 0);
2931         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 212, 0xFF, 0);
2932         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 213, 0xFF, 0);
2933         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 214, 0xFF, 0);
2934         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 215, 0xFF, 0);
2935
2936         retval = rtsx_send_cmd(chip, SD_CARD, 1000);
2937         if (retval < 0) {
2938                 if (retval == -ETIMEDOUT) {
2939                         rtsx_clear_sd_error(chip);
2940                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
2941                                             SD_RSP_TYPE_R1, NULL, 0);
2942                 }
2943                 return STATUS_FAIL;
2944         }
2945
2946         ptr = rtsx_get_cmd_data(chip);
2947         if (ptr[0] & SD_TRANSFER_ERR) {
2948                 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
2949                                     SD_RSP_TYPE_R1, NULL, 0);
2950                 return STATUS_FAIL;
2951         }
2952
2953         if (CHK_MMC_SECTOR_MODE(sd_card)) {
2954                 sd_card->capacity = ((u32)ptr[5] << 24) | ((u32)ptr[4] << 16) |
2955                         ((u32)ptr[3] << 8) | ((u32)ptr[2]);
2956         }
2957
2958         card_type_mask = 0x03;
2959         card_type = ptr[1] & card_type_mask;
2960         if (card_type) {
2961                 u8 rsp[5];
2962
2963                 if (card_type & 0x04) {
2964                         if (switch_ddr)
2965                                 SET_MMC_DDR52(sd_card);
2966                         else
2967                                 SET_MMC_52M(sd_card);
2968                 } else if (card_type & 0x02) {
2969                         SET_MMC_52M(sd_card);
2970                 } else {
2971                         SET_MMC_26M(sd_card);
2972                 }
2973
2974                 retval = sd_send_cmd_get_rsp(chip, SWITCH, 0x03B90100,
2975                                              SD_RSP_TYPE_R1b, rsp, 5);
2976                 if ((retval != STATUS_SUCCESS) || (rsp[4] & MMC_SWITCH_ERR))
2977                         CLR_MMC_HS(sd_card);
2978         }
2979
2980         sd_choose_proper_clock(chip);
2981         retval = switch_clock(chip, sd_card->sd_clock);
2982         if (retval != STATUS_SUCCESS) {
2983                 return STATUS_FAIL;
2984         }
2985
2986         /* Test Bus Procedure */
2987         retval = mmc_test_switch_bus(chip, MMC_8BIT_BUS);
2988         if (retval == SWITCH_SUCCESS) {
2989                 SET_MMC_8BIT(sd_card);
2990                 chip->card_bus_width[chip->card2lun[SD_CARD]] = 8;
2991 #ifdef SUPPORT_SD_LOCK
2992                 sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
2993 #endif
2994         } else if (retval == SWITCH_FAIL) {
2995                 retval = mmc_test_switch_bus(chip, MMC_4BIT_BUS);
2996                 if (retval == SWITCH_SUCCESS) {
2997                         SET_MMC_4BIT(sd_card);
2998                         chip->card_bus_width[chip->card2lun[SD_CARD]] = 4;
2999 #ifdef SUPPORT_SD_LOCK
3000                         sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
3001 #endif
3002                 } else if (retval == SWITCH_FAIL) {
3003                         CLR_MMC_8BIT(sd_card);
3004                         CLR_MMC_4BIT(sd_card);
3005                 } else {
3006                         return STATUS_FAIL;
3007                 }
3008         } else {
3009                 return STATUS_FAIL;
3010         }
3011
3012         return STATUS_SUCCESS;
3013 }
3014
3015 static int reset_mmc(struct rtsx_chip *chip)
3016 {
3017         struct sd_info *sd_card = &chip->sd_card;
3018         int retval, i = 0, j = 0, k = 0;
3019         bool switch_ddr = true;
3020         u8 rsp[16];
3021         u8 spec_ver = 0;
3022         u32 temp;
3023
3024 #ifdef SUPPORT_SD_LOCK
3025         if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON)
3026                 goto MMC_UNLOCK_ENTRY;
3027 #endif
3028
3029 switch_fail:
3030         retval = sd_prepare_reset(chip);
3031         if (retval != STATUS_SUCCESS) {
3032                 return retval;
3033         }
3034
3035         SET_MMC(sd_card);
3036
3037 RTY_MMC_RST:
3038         retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0,
3039                                      NULL, 0);
3040         if (retval != STATUS_SUCCESS) {
3041                 return STATUS_FAIL;
3042         }
3043
3044         do {
3045                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3046                         sd_set_err_code(chip, SD_NO_CARD);
3047                         return STATUS_FAIL;
3048                 }
3049
3050                 retval = sd_send_cmd_get_rsp(chip, SEND_OP_COND,
3051                                              (SUPPORT_VOLTAGE | 0x40000000),
3052                                              SD_RSP_TYPE_R3, rsp, 5);
3053                 if (retval != STATUS_SUCCESS) {
3054                         if (sd_check_err_code(chip, SD_BUSY) ||
3055                             sd_check_err_code(chip, SD_TO_ERR)) {
3056                                 k++;
3057                                 if (k < 20) {
3058                                         sd_clr_err_code(chip);
3059                                         goto RTY_MMC_RST;
3060                                 } else {
3061                                         return STATUS_FAIL;
3062                                 }
3063                         } else {
3064                                 j++;
3065                                 if (j < 100) {
3066                                         sd_clr_err_code(chip);
3067                                         goto RTY_MMC_RST;
3068                                 } else {
3069                                         return STATUS_FAIL;
3070                                 }
3071                         }
3072                 }
3073
3074                 wait_timeout(20);
3075                 i++;
3076         } while (!(rsp[1] & 0x80) && (i < 255));
3077
3078         if (i == 255) {
3079                 return STATUS_FAIL;
3080         }
3081
3082         if ((rsp[1] & 0x60) == 0x40)
3083                 SET_MMC_SECTOR_MODE(sd_card);
3084         else
3085                 CLR_MMC_SECTOR_MODE(sd_card);
3086
3087         retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2,
3088                                      NULL, 0);
3089         if (retval != STATUS_SUCCESS) {
3090                 return STATUS_FAIL;
3091         }
3092
3093         sd_card->sd_addr = 0x00100000;
3094         retval = sd_send_cmd_get_rsp(chip, SET_RELATIVE_ADDR, sd_card->sd_addr,
3095                                      SD_RSP_TYPE_R6, rsp, 5);
3096         if (retval != STATUS_SUCCESS) {
3097                 return STATUS_FAIL;
3098         }
3099
3100         retval = sd_check_csd(chip, 1);
3101         if (retval != STATUS_SUCCESS) {
3102                 return STATUS_FAIL;
3103         }
3104
3105         spec_ver = (sd_card->raw_csd[0] & 0x3C) >> 2;
3106
3107         retval = sd_select_card(chip, 1);
3108         if (retval != STATUS_SUCCESS) {
3109                 return STATUS_FAIL;
3110         }
3111
3112         retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1,
3113                                      NULL, 0);
3114         if (retval != STATUS_SUCCESS) {
3115                 return STATUS_FAIL;
3116         }
3117
3118 #ifdef SUPPORT_SD_LOCK
3119 MMC_UNLOCK_ENTRY:
3120         retval = sd_update_lock_status(chip);
3121         if (retval != STATUS_SUCCESS) {
3122                 return STATUS_FAIL;
3123         }
3124 #endif
3125
3126         retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
3127         if (retval != STATUS_SUCCESS) {
3128                 return STATUS_FAIL;
3129         }
3130
3131         chip->card_bus_width[chip->card2lun[SD_CARD]] = 1;
3132
3133         if (!sd_card->mmc_dont_switch_bus) {
3134                 if (spec_ver == 4) {
3135                         /* MMC 4.x Cards */
3136                         retval = mmc_switch_timing_bus(chip, switch_ddr);
3137                         if (retval != STATUS_SUCCESS) {
3138                                 retval = sd_init_power(chip);
3139                                 if (retval != STATUS_SUCCESS) {
3140                                         return STATUS_FAIL;
3141                                 }
3142                                 sd_card->mmc_dont_switch_bus = 1;
3143                                 goto switch_fail;
3144                         }
3145                 }
3146
3147                 if (CHK_MMC_SECTOR_MODE(sd_card) && (sd_card->capacity == 0)) {
3148                         return STATUS_FAIL;
3149                 }
3150
3151                 if (switch_ddr && CHK_MMC_DDR52(sd_card)) {
3152                         retval = sd_set_init_para(chip);
3153                         if (retval != STATUS_SUCCESS) {
3154                                 return STATUS_FAIL;
3155                         }
3156
3157                         retval = mmc_ddr_tuning(chip);
3158                         if (retval != STATUS_SUCCESS) {
3159                                 retval = sd_init_power(chip);
3160                                 if (retval != STATUS_SUCCESS) {
3161                                         return STATUS_FAIL;
3162                                 }
3163
3164                                 switch_ddr = false;
3165                                 goto switch_fail;
3166                         }
3167
3168                         retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
3169                         if (retval == STATUS_SUCCESS) {
3170                                 retval = sd_read_lba0(chip);
3171                                 if (retval != STATUS_SUCCESS) {
3172                                         retval = sd_init_power(chip);
3173                                         if (retval != STATUS_SUCCESS) {
3174                                                 return STATUS_FAIL;
3175                                         }
3176
3177                                         switch_ddr = false;
3178                                         goto switch_fail;
3179                                 }
3180                         }
3181                 }
3182         }
3183
3184 #ifdef SUPPORT_SD_LOCK
3185         if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON) {
3186                 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_H, 0xFF,
3187                                              0x02);
3188                 if (retval) {
3189                         return retval;
3190                 }
3191                 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_L, 0xFF,
3192                                              0x00);
3193                 if (retval) {
3194                         return retval;
3195                 }
3196         }
3197 #endif
3198
3199         temp = rtsx_readl(chip, RTSX_BIPR);
3200         if (temp & SD_WRITE_PROTECT)
3201                 chip->card_wp |= SD_CARD;
3202
3203         return STATUS_SUCCESS;
3204 }
3205
3206 int reset_sd_card(struct rtsx_chip *chip)
3207 {
3208         struct sd_info *sd_card = &chip->sd_card;
3209         int retval;
3210
3211         sd_init_reg_addr(chip);
3212
3213         memset(sd_card, 0, sizeof(struct sd_info));
3214         chip->capacity[chip->card2lun[SD_CARD]] = 0;
3215
3216         retval = enable_card_clock(chip, SD_CARD);
3217         if (retval != STATUS_SUCCESS) {
3218                 return STATUS_FAIL;
3219         }
3220
3221         if (chip->ignore_sd && CHK_SDIO_EXIST(chip) &&
3222             !CHK_SDIO_IGNORED(chip)) {
3223                 if (chip->asic_code) {
3224                         retval = sd_pull_ctl_enable(chip);
3225                         if (retval != STATUS_SUCCESS) {
3226                                 return STATUS_FAIL;
3227                         }
3228                 } else {
3229                         retval = rtsx_write_register(chip, FPGA_PULL_CTL,
3230                                                      FPGA_SD_PULL_CTL_BIT |
3231                                                      0x20, 0);
3232                         if (retval != STATUS_SUCCESS) {
3233                                 return STATUS_FAIL;
3234                         }
3235                 }
3236                 retval = card_share_mode(chip, SD_CARD);
3237                 if (retval != STATUS_SUCCESS) {
3238                         return STATUS_FAIL;
3239                 }
3240
3241                 chip->sd_io = 1;
3242                 return STATUS_FAIL;
3243         }
3244
3245         retval = sd_init_power(chip);
3246         if (retval != STATUS_SUCCESS) {
3247                 return STATUS_FAIL;
3248         }
3249
3250         if (chip->sd_ctl & RESET_MMC_FIRST) {
3251                 retval = reset_mmc(chip);
3252                 if (retval != STATUS_SUCCESS) {
3253                         if (sd_check_err_code(chip, SD_NO_CARD)) {
3254                                 return STATUS_FAIL;
3255                         }
3256
3257                         retval = reset_sd(chip);
3258                         if (retval != STATUS_SUCCESS) {
3259                                 return STATUS_FAIL;
3260                         }
3261                 }
3262         } else {
3263                 retval = reset_sd(chip);
3264                 if (retval != STATUS_SUCCESS) {
3265                         if (sd_check_err_code(chip, SD_NO_CARD)) {
3266                                 return STATUS_FAIL;
3267                         }
3268
3269                         if (chip->sd_io) {
3270                                 return STATUS_FAIL;
3271                         }
3272                         retval = reset_mmc(chip);
3273                         if (retval != STATUS_SUCCESS) {
3274                                 return STATUS_FAIL;
3275                         }
3276                 }
3277         }
3278
3279         retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
3280         if (retval != STATUS_SUCCESS) {
3281                 return STATUS_FAIL;
3282         }
3283
3284         retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_L, 0xFF, 0);
3285         if (retval) {
3286                 return retval;
3287         }
3288         retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_H, 0xFF, 2);
3289         if (retval) {
3290                 return retval;
3291         }
3292
3293         chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity;
3294
3295         retval = sd_set_init_para(chip);
3296         if (retval != STATUS_SUCCESS) {
3297                 return STATUS_FAIL;
3298         }
3299
3300         dev_dbg(rtsx_dev(chip), "sd_card->sd_type = 0x%x\n", sd_card->sd_type);
3301
3302         return STATUS_SUCCESS;
3303 }
3304
3305 static int reset_mmc_only(struct rtsx_chip *chip)
3306 {
3307         struct sd_info *sd_card = &chip->sd_card;
3308         int retval;
3309
3310         sd_card->sd_type = 0;
3311         sd_card->seq_mode = 0;
3312         sd_card->sd_data_buf_ready = 0;
3313         sd_card->capacity = 0;
3314         sd_card->sd_switch_fail = 0;
3315
3316 #ifdef SUPPORT_SD_LOCK
3317         sd_card->sd_lock_status = 0;
3318         sd_card->sd_erase_status = 0;
3319 #endif
3320
3321         chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity = 0;
3322
3323         retval = enable_card_clock(chip, SD_CARD);
3324         if (retval != STATUS_SUCCESS) {
3325                 return STATUS_FAIL;
3326         }
3327
3328         retval = sd_init_power(chip);
3329         if (retval != STATUS_SUCCESS) {
3330                 return STATUS_FAIL;
3331         }
3332
3333         retval = reset_mmc(chip);
3334         if (retval != STATUS_SUCCESS) {
3335                 return STATUS_FAIL;
3336         }
3337
3338         retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
3339         if (retval != STATUS_SUCCESS) {
3340                 return STATUS_FAIL;
3341         }
3342
3343         retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_L, 0xFF, 0);
3344         if (retval) {
3345                 return retval;
3346         }
3347         retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_H, 0xFF, 2);
3348         if (retval) {
3349                 return retval;
3350         }
3351
3352         chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity;
3353
3354         retval = sd_set_init_para(chip);
3355         if (retval != STATUS_SUCCESS) {
3356                 return STATUS_FAIL;
3357         }
3358
3359         dev_dbg(rtsx_dev(chip), "In %s, sd_card->sd_type = 0x%x\n",
3360                 __func__, sd_card->sd_type);
3361
3362         return STATUS_SUCCESS;
3363 }
3364
3365 #define WAIT_DATA_READY_RTY_CNT         255
3366
3367 static int wait_data_buf_ready(struct rtsx_chip *chip)
3368 {
3369         struct sd_info *sd_card = &chip->sd_card;
3370         int i, retval;
3371
3372         for (i = 0; i < WAIT_DATA_READY_RTY_CNT; i++) {
3373                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3374                         sd_set_err_code(chip, SD_NO_CARD);
3375                         return STATUS_FAIL;
3376                 }
3377
3378                 sd_card->sd_data_buf_ready = 0;
3379
3380                 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS,
3381                                              sd_card->sd_addr, SD_RSP_TYPE_R1,
3382                                              NULL, 0);
3383                 if (retval != STATUS_SUCCESS) {
3384                         return STATUS_FAIL;
3385                 }
3386
3387                 if (sd_card->sd_data_buf_ready) {
3388                         return sd_send_cmd_get_rsp(chip, SEND_STATUS,
3389                                 sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
3390                 }
3391         }
3392
3393         sd_set_err_code(chip, SD_TO_ERR);
3394
3395         return STATUS_FAIL;
3396 }
3397
3398 void sd_stop_seq_mode(struct rtsx_chip *chip)
3399 {
3400         struct sd_info *sd_card = &chip->sd_card;
3401         int retval;
3402
3403         if (sd_card->seq_mode) {
3404                 retval = sd_switch_clock(chip);
3405                 if (retval != STATUS_SUCCESS)
3406                         return;
3407
3408                 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0,
3409                                              SD_RSP_TYPE_R1b, NULL, 0);
3410                 if (retval != STATUS_SUCCESS)
3411                         sd_set_err_code(chip, SD_STS_ERR);
3412
3413                 retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
3414                 if (retval != STATUS_SUCCESS)
3415                         sd_set_err_code(chip, SD_STS_ERR);
3416
3417                 sd_card->seq_mode = 0;
3418
3419                 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
3420         }
3421 }
3422
3423 static inline int sd_auto_tune_clock(struct rtsx_chip *chip)
3424 {
3425         struct sd_info *sd_card = &chip->sd_card;
3426         int retval;
3427
3428         if (chip->asic_code) {
3429                 if (sd_card->sd_clock > 30)
3430                         sd_card->sd_clock -= 20;
3431         } else {
3432                 switch (sd_card->sd_clock) {
3433                 case CLK_200:
3434                         sd_card->sd_clock = CLK_150;
3435                         break;
3436
3437                 case CLK_150:
3438                         sd_card->sd_clock = CLK_120;
3439                         break;
3440
3441                 case CLK_120:
3442                         sd_card->sd_clock = CLK_100;
3443                         break;
3444
3445                 case CLK_100:
3446                         sd_card->sd_clock = CLK_80;
3447                         break;
3448
3449                 case CLK_80:
3450                         sd_card->sd_clock = CLK_60;
3451                         break;
3452
3453                 case CLK_60:
3454                         sd_card->sd_clock = CLK_50;
3455                         break;
3456
3457                 default:
3458                         break;
3459                 }
3460         }
3461
3462         retval = sd_switch_clock(chip);
3463         if (retval != STATUS_SUCCESS) {
3464                 return STATUS_FAIL;
3465         }
3466
3467         return STATUS_SUCCESS;
3468 }
3469
3470 int sd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector,
3471           u16 sector_cnt)
3472 {
3473         struct sd_info *sd_card = &chip->sd_card;
3474         u32 data_addr;
3475         u8 cfg2;
3476         int retval;
3477
3478         if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3479                 dev_dbg(rtsx_dev(chip), "%s: Read %d %s from 0x%x\n", __func__,
3480                         sector_cnt, (sector_cnt > 1) ? "sectors" : "sector",
3481                         start_sector);
3482         } else {
3483                 dev_dbg(rtsx_dev(chip), "%s: Write %d %s to 0x%x\n", __func__,
3484                         sector_cnt, (sector_cnt > 1) ? "sectors" : "sector",
3485                         start_sector);
3486         }
3487
3488         sd_card->cleanup_counter = 0;
3489
3490         if (!(chip->card_ready & SD_CARD)) {
3491                 sd_card->seq_mode = 0;
3492
3493                 retval = reset_sd_card(chip);
3494                 if (retval == STATUS_SUCCESS) {
3495                         chip->card_ready |= SD_CARD;
3496                         chip->card_fail &= ~SD_CARD;
3497                 } else {
3498                         chip->card_ready &= ~SD_CARD;
3499                         chip->card_fail |= SD_CARD;
3500                         chip->capacity[chip->card2lun[SD_CARD]] = 0;
3501                         chip->rw_need_retry = 1;
3502                         return STATUS_FAIL;
3503                 }
3504         }
3505
3506         if (!CHK_SD_HCXC(sd_card) && !CHK_MMC_SECTOR_MODE(sd_card))
3507                 data_addr = start_sector << 9;
3508         else
3509                 data_addr = start_sector;
3510
3511         sd_clr_err_code(chip);
3512
3513         retval = sd_switch_clock(chip);
3514         if (retval != STATUS_SUCCESS) {
3515                 sd_set_err_code(chip, SD_IO_ERR);
3516                 goto RW_FAIL;
3517         }
3518
3519         if (sd_card->seq_mode &&
3520             ((sd_card->pre_dir != srb->sc_data_direction) ||
3521             ((sd_card->pre_sec_addr + sd_card->pre_sec_cnt) !=
3522             start_sector))) {
3523                 if ((sd_card->pre_sec_cnt < 0x80) &&
3524                     (sd_card->pre_dir == DMA_FROM_DEVICE) &&
3525                     !CHK_SD30_SPEED(sd_card) &&
3526                     !CHK_SD_HS(sd_card) &&
3527                     !CHK_MMC_HS(sd_card)) {
3528                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
3529                                             SD_RSP_TYPE_R1, NULL, 0);
3530                 }
3531
3532                 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0,
3533                                              SD_RSP_TYPE_R1b, NULL, 0);
3534                 if (retval != STATUS_SUCCESS) {
3535                         chip->rw_need_retry = 1;
3536                         sd_set_err_code(chip, SD_STS_ERR);
3537                         goto RW_FAIL;
3538                 }
3539
3540                 sd_card->seq_mode = 0;
3541
3542                 retval = rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
3543                 if (retval != STATUS_SUCCESS) {
3544                         sd_set_err_code(chip, SD_IO_ERR);
3545                         goto RW_FAIL;
3546                 }
3547
3548                 if ((sd_card->pre_sec_cnt < 0x80) &&
3549                     !CHK_SD30_SPEED(sd_card) &&
3550                     !CHK_SD_HS(sd_card) &&
3551                     !CHK_MMC_HS(sd_card)) {
3552                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
3553                                             SD_RSP_TYPE_R1, NULL, 0);
3554                 }
3555         }
3556
3557         rtsx_init_cmd(chip);
3558
3559         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0x00);
3560         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, 0x02);
3561         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF,
3562                      (u8)sector_cnt);
3563         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF,
3564                      (u8)(sector_cnt >> 8));
3565
3566         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
3567
3568         if (CHK_MMC_8BIT(sd_card))
3569                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1,
3570                              0x03, SD_BUS_WIDTH_8);
3571         else if (CHK_MMC_4BIT(sd_card) || CHK_SD(sd_card))
3572                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1,
3573                              0x03, SD_BUS_WIDTH_4);
3574         else
3575                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1,
3576                              0x03, SD_BUS_WIDTH_1);
3577
3578         if (sd_card->seq_mode) {
3579                 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
3580                         SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 |
3581                         SD_RSP_LEN_0;
3582                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2);
3583
3584                 trans_dma_enable(srb->sc_data_direction, chip, sector_cnt * 512,
3585                                  DMA_512);
3586
3587                 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3588                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3589                                      SD_TM_AUTO_READ_3 | SD_TRANSFER_START);
3590                 } else {
3591                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3592                                      SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
3593                 }
3594
3595                 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
3596                              SD_TRANSFER_END, SD_TRANSFER_END);
3597
3598                 rtsx_send_cmd_no_wait(chip);
3599         } else {
3600                 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3601                         dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n",
3602                                 READ_MULTIPLE_BLOCK);
3603                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF,
3604                                      0x40 | READ_MULTIPLE_BLOCK);
3605                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF,
3606                                      (u8)(data_addr >> 24));
3607                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF,
3608                                      (u8)(data_addr >> 16));
3609                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF,
3610                                      (u8)(data_addr >> 8));
3611                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF,
3612                                      (u8)data_addr);
3613
3614                         cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
3615                                 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 |
3616                                 SD_RSP_LEN_6;
3617                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
3618                                      cfg2);
3619
3620                         trans_dma_enable(srb->sc_data_direction, chip,
3621                                          sector_cnt * 512, DMA_512);
3622
3623                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3624                                      SD_TM_AUTO_READ_2 | SD_TRANSFER_START);
3625                         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
3626                                      SD_TRANSFER_END, SD_TRANSFER_END);
3627
3628                         rtsx_send_cmd_no_wait(chip);
3629                 } else {
3630                         retval = rtsx_send_cmd(chip, SD_CARD, 50);
3631                         if (retval < 0) {
3632                                 rtsx_clear_sd_error(chip);
3633
3634                                 chip->rw_need_retry = 1;
3635                                 sd_set_err_code(chip, SD_TO_ERR);
3636                                 goto RW_FAIL;
3637                         }
3638
3639                         retval = wait_data_buf_ready(chip);
3640                         if (retval != STATUS_SUCCESS) {
3641                                 chip->rw_need_retry = 1;
3642                                 sd_set_err_code(chip, SD_TO_ERR);
3643                                 goto RW_FAIL;
3644                         }
3645
3646                         retval = sd_send_cmd_get_rsp(chip, WRITE_MULTIPLE_BLOCK,
3647                                                      data_addr, SD_RSP_TYPE_R1,
3648                                                      NULL, 0);
3649                         if (retval != STATUS_SUCCESS) {
3650                                 chip->rw_need_retry = 1;
3651                                 goto RW_FAIL;
3652                         }
3653
3654                         rtsx_init_cmd(chip);
3655
3656                         cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
3657                                 SD_NO_WAIT_BUSY_END |
3658                                 SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
3659                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
3660                                      cfg2);
3661
3662                         trans_dma_enable(srb->sc_data_direction, chip,
3663                                          sector_cnt * 512, DMA_512);
3664
3665                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3666                                      SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
3667                         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
3668                                      SD_TRANSFER_END, SD_TRANSFER_END);
3669
3670                         rtsx_send_cmd_no_wait(chip);
3671                 }
3672
3673                 sd_card->seq_mode = 1;
3674         }
3675
3676         retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb),
3677                                     scsi_bufflen(srb), scsi_sg_count(srb),
3678                                 srb->sc_data_direction, chip->sd_timeout);
3679         if (retval < 0) {
3680                 u8 stat = 0;
3681                 int err;
3682
3683                 sd_card->seq_mode = 0;
3684
3685                 if (retval == -ETIMEDOUT)
3686                         err = STATUS_TIMEDOUT;
3687                 else
3688                         err = STATUS_FAIL;
3689
3690                 rtsx_read_register(chip, REG_SD_STAT1, &stat);
3691                 rtsx_clear_sd_error(chip);
3692                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3693                         chip->rw_need_retry = 0;
3694                         dev_dbg(rtsx_dev(chip), "No card exist, exit %s\n",
3695                                 __func__);
3696                         return STATUS_FAIL;
3697                 }
3698
3699                 chip->rw_need_retry = 1;
3700
3701                 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0,
3702                                              SD_RSP_TYPE_R1b, NULL, 0);
3703                 if (retval != STATUS_SUCCESS) {
3704                         sd_set_err_code(chip, SD_STS_ERR);
3705                         goto RW_FAIL;
3706                 }
3707
3708                 if (stat & (SD_CRC7_ERR | SD_CRC16_ERR | SD_CRC_WRITE_ERR)) {
3709                         dev_dbg(rtsx_dev(chip), "SD CRC error, tune clock!\n");
3710                         sd_set_err_code(chip, SD_CRC_ERR);
3711                         goto RW_FAIL;
3712                 }
3713
3714                 if (err == STATUS_TIMEDOUT) {
3715                         sd_set_err_code(chip, SD_TO_ERR);
3716                         goto RW_FAIL;
3717                 }
3718
3719                 return err;
3720         }
3721
3722         sd_card->pre_sec_addr = start_sector;
3723         sd_card->pre_sec_cnt = sector_cnt;
3724         sd_card->pre_dir = srb->sc_data_direction;
3725
3726         return STATUS_SUCCESS;
3727
3728 RW_FAIL:
3729         sd_card->seq_mode = 0;
3730
3731         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3732                 chip->rw_need_retry = 0;
3733                 dev_dbg(rtsx_dev(chip), "No card exist, exit %s\n", __func__);
3734                 return STATUS_FAIL;
3735         }
3736
3737         if (sd_check_err_code(chip, SD_CRC_ERR)) {
3738                 if (CHK_MMC_4BIT(sd_card) || CHK_MMC_8BIT(sd_card)) {
3739                         sd_card->mmc_dont_switch_bus = 1;
3740                         reset_mmc_only(chip);
3741                         sd_card->mmc_dont_switch_bus = 0;
3742                 } else {
3743                         sd_card->need_retune = 1;
3744                         sd_auto_tune_clock(chip);
3745                 }
3746         } else if (sd_check_err_code(chip, SD_TO_ERR | SD_STS_ERR)) {
3747                 retval = reset_sd_card(chip);
3748                 if (retval != STATUS_SUCCESS) {
3749                         chip->card_ready &= ~SD_CARD;
3750                         chip->card_fail |= SD_CARD;
3751                         chip->capacity[chip->card2lun[SD_CARD]] = 0;
3752                 }
3753         }
3754
3755         return STATUS_FAIL;
3756 }
3757
3758 #ifdef SUPPORT_CPRM
3759 int soft_reset_sd_card(struct rtsx_chip *chip)
3760 {
3761         return reset_sd(chip);
3762 }
3763
3764 int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx, u32 arg,
3765                             u8 rsp_type, u8 *rsp, int rsp_len,
3766                             bool special_check)
3767 {
3768         int retval;
3769         int timeout = 100;
3770         u16 reg_addr;
3771         u8 *ptr;
3772         int stat_idx = 0;
3773         int rty_cnt = 0;
3774
3775         dev_dbg(rtsx_dev(chip), "EXT SD/MMC CMD %d\n", cmd_idx);
3776
3777         if (rsp_type == SD_RSP_TYPE_R1b)
3778                 timeout = 3000;
3779
3780 RTY_SEND_CMD:
3781
3782         rtsx_init_cmd(chip);
3783
3784         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | cmd_idx);
3785         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, (u8)(arg >> 24));
3786         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, (u8)(arg >> 16));
3787         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, (u8)(arg >> 8));
3788         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, (u8)arg);
3789
3790         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type);
3791         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3792                      0x01, PINGPONG_BUFFER);
3793         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER,
3794                      0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
3795         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
3796                      SD_TRANSFER_END);
3797
3798         if (rsp_type == SD_RSP_TYPE_R2) {
3799                 for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16;
3800                      reg_addr++)
3801                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
3802
3803                 stat_idx = 17;
3804         } else if (rsp_type != SD_RSP_TYPE_R0) {
3805                 for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4;
3806                      reg_addr++)
3807                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
3808
3809                 stat_idx = 6;
3810         }
3811         rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0, 0);
3812
3813         rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_STAT1, 0, 0);
3814
3815         retval = rtsx_send_cmd(chip, SD_CARD, timeout);
3816         if (retval < 0) {
3817                 if (retval == -ETIMEDOUT) {
3818                         rtsx_clear_sd_error(chip);
3819
3820                         if (rsp_type & SD_WAIT_BUSY_END) {
3821                                 retval = sd_check_data0_status(chip);
3822                                 if (retval != STATUS_SUCCESS) {
3823                                         return retval;
3824                                 }
3825                         } else {
3826                                 sd_set_err_code(chip, SD_TO_ERR);
3827                         }
3828                 }
3829                 return STATUS_FAIL;
3830         }
3831
3832         if (rsp_type == SD_RSP_TYPE_R0)
3833                 return STATUS_SUCCESS;
3834
3835         ptr = rtsx_get_cmd_data(chip) + 1;
3836
3837         if ((ptr[0] & 0xC0) != 0) {
3838                 sd_set_err_code(chip, SD_STS_ERR);
3839                 return STATUS_FAIL;
3840         }
3841
3842         if (!(rsp_type & SD_NO_CHECK_CRC7)) {
3843                 if (ptr[stat_idx] & SD_CRC7_ERR) {
3844                         if (cmd_idx == WRITE_MULTIPLE_BLOCK) {
3845                                 sd_set_err_code(chip, SD_CRC_ERR);
3846                                 return STATUS_FAIL;
3847                         }
3848                         if (rty_cnt < SD_MAX_RETRY_COUNT) {
3849                                 wait_timeout(20);
3850                                 rty_cnt++;
3851                                 goto RTY_SEND_CMD;
3852                         } else {
3853                                 sd_set_err_code(chip, SD_CRC_ERR);
3854                                 return STATUS_FAIL;
3855                         }
3856                 }
3857         }
3858
3859         if ((cmd_idx == SELECT_CARD) || (cmd_idx == APP_CMD) ||
3860             (cmd_idx == SEND_STATUS) || (cmd_idx == STOP_TRANSMISSION)) {
3861                 if ((cmd_idx != STOP_TRANSMISSION) && !special_check) {
3862                         if (ptr[1] & 0x80) {
3863                                 return STATUS_FAIL;
3864                         }
3865                 }
3866 #ifdef SUPPORT_SD_LOCK
3867                 if (ptr[1] & 0x7D) {
3868 #else
3869                 if (ptr[1] & 0x7F) {
3870 #endif
3871                         return STATUS_FAIL;
3872                 }
3873                 if (ptr[2] & 0xF8) {
3874                         return STATUS_FAIL;
3875                 }
3876
3877                 if (cmd_idx == SELECT_CARD) {
3878                         if (rsp_type == SD_RSP_TYPE_R2) {
3879                                 if ((ptr[3] & 0x1E) != 0x04) {
3880                                         return STATUS_FAIL;
3881                                 }
3882                         }
3883                 }
3884         }
3885
3886         if (rsp && rsp_len)
3887                 memcpy(rsp, ptr, rsp_len);
3888
3889         return STATUS_SUCCESS;
3890 }
3891
3892 int ext_sd_get_rsp(struct rtsx_chip *chip, int len, u8 *rsp, u8 rsp_type)
3893 {
3894         int retval, rsp_len;
3895         u16 reg_addr;
3896
3897         if (rsp_type == SD_RSP_TYPE_R0)
3898                 return STATUS_SUCCESS;
3899
3900         rtsx_init_cmd(chip);
3901
3902         if (rsp_type == SD_RSP_TYPE_R2) {
3903                 for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16;
3904                      reg_addr++)
3905                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0);
3906
3907                 rsp_len = 17;
3908         } else if (rsp_type != SD_RSP_TYPE_R0) {
3909                 for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4;
3910                      reg_addr++)
3911                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0);
3912
3913                 rsp_len = 6;
3914         }
3915         rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0xFF, 0);
3916
3917         retval = rtsx_send_cmd(chip, SD_CARD, 100);
3918         if (retval != STATUS_SUCCESS) {
3919                 return STATUS_FAIL;
3920         }
3921
3922         if (rsp) {
3923                 int min_len = (rsp_len < len) ? rsp_len : len;
3924
3925                 memcpy(rsp, rtsx_get_cmd_data(chip), min_len);
3926
3927                 dev_dbg(rtsx_dev(chip), "min_len = %d\n", min_len);
3928                 dev_dbg(rtsx_dev(chip), "Response in cmd buf: 0x%x 0x%x 0x%x 0x%x\n",
3929                         rsp[0], rsp[1], rsp[2], rsp[3]);
3930         }
3931
3932         return STATUS_SUCCESS;
3933 }
3934
3935 int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3936 {
3937         struct sd_info *sd_card = &chip->sd_card;
3938         unsigned int lun = SCSI_LUN(srb);
3939         int len;
3940         u8 buf[18] = {
3941                 0x00,
3942                 0x00,
3943                 0x00,
3944                 0x0E,
3945                 0x00,
3946                 0x00,
3947                 0x00,
3948                 0x00,
3949                 0x53,
3950                 0x44,
3951                 0x20,
3952                 0x43,
3953                 0x61,
3954                 0x72,
3955                 0x64,
3956                 0x00,
3957                 0x00,
3958                 0x00,
3959         };
3960
3961         sd_card->pre_cmd_err = 0;
3962
3963         if (!(CHK_BIT(chip->lun_mc, lun))) {
3964                 SET_BIT(chip->lun_mc, lun);
3965                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
3966                 return TRANSPORT_FAILED;
3967         }
3968
3969         if ((srb->cmnd[2] != 0x53) || (srb->cmnd[3] != 0x44) ||
3970             (srb->cmnd[4] != 0x20) || (srb->cmnd[5] != 0x43) ||
3971             (srb->cmnd[6] != 0x61) || (srb->cmnd[7] != 0x72) ||
3972             (srb->cmnd[8] != 0x64)) {
3973                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3974                 return TRANSPORT_FAILED;
3975         }
3976
3977         switch (srb->cmnd[1] & 0x0F) {
3978         case 0:
3979                 sd_card->sd_pass_thru_en = 0;
3980                 break;
3981
3982         case 1:
3983                 sd_card->sd_pass_thru_en = 1;
3984                 break;
3985
3986         default:
3987                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3988                 return TRANSPORT_FAILED;
3989         }
3990
3991         buf[5] = (CHK_SD(sd_card) == 1) ? 0x01 : 0x02;
3992         if (chip->card_wp & SD_CARD)
3993                 buf[5] |= 0x80;
3994
3995         buf[6] = (u8)(sd_card->sd_addr >> 16);
3996         buf[7] = (u8)(sd_card->sd_addr >> 24);
3997
3998         buf[15] = chip->max_lun;
3999
4000         len = min_t(int, 18, scsi_bufflen(srb));
4001         rtsx_stor_set_xfer_buf(buf, len, srb);
4002
4003         return TRANSPORT_GOOD;
4004 }
4005
4006 static inline int get_rsp_type(struct scsi_cmnd *srb, u8 *rsp_type,
4007                                int *rsp_len)
4008 {
4009         if (!rsp_type || !rsp_len)
4010                 return STATUS_FAIL;
4011
4012         switch (srb->cmnd[10]) {
4013         case 0x03:
4014                 *rsp_type = SD_RSP_TYPE_R0;
4015                 *rsp_len = 0;
4016                 break;
4017
4018         case 0x04:
4019                 *rsp_type = SD_RSP_TYPE_R1;
4020                 *rsp_len = 6;
4021                 break;
4022
4023         case 0x05:
4024                 *rsp_type = SD_RSP_TYPE_R1b;
4025                 *rsp_len = 6;
4026                 break;
4027
4028         case 0x06:
4029                 *rsp_type = SD_RSP_TYPE_R2;
4030                 *rsp_len = 17;
4031                 break;
4032
4033         case 0x07:
4034                 *rsp_type = SD_RSP_TYPE_R3;
4035                 *rsp_len = 6;
4036                 break;
4037
4038         default:
4039                 return STATUS_FAIL;
4040         }
4041
4042         return STATUS_SUCCESS;
4043 }
4044
4045 int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4046 {
4047         struct sd_info *sd_card = &chip->sd_card;
4048         unsigned int lun = SCSI_LUN(srb);
4049         int retval, rsp_len;
4050         u8 cmd_idx, rsp_type;
4051         bool standby = false, acmd = false;
4052         u32 arg;
4053
4054         if (!sd_card->sd_pass_thru_en) {
4055                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4056                 return TRANSPORT_FAILED;
4057         }
4058
4059         retval = sd_switch_clock(chip);
4060         if (retval != STATUS_SUCCESS) {
4061                 return TRANSPORT_FAILED;
4062         }
4063
4064         if (sd_card->pre_cmd_err) {
4065                 sd_card->pre_cmd_err = 0;
4066                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4067                 return TRANSPORT_FAILED;
4068         }
4069
4070         cmd_idx = srb->cmnd[2] & 0x3F;
4071         if (srb->cmnd[1] & 0x02)
4072                 standby = true;
4073
4074         if (srb->cmnd[1] & 0x01)
4075                 acmd = true;
4076
4077         arg = ((u32)srb->cmnd[3] << 24) | ((u32)srb->cmnd[4] << 16) |
4078                 ((u32)srb->cmnd[5] << 8) | srb->cmnd[6];
4079
4080         retval = get_rsp_type(srb, &rsp_type, &rsp_len);
4081         if (retval != STATUS_SUCCESS) {
4082                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4083                 return TRANSPORT_FAILED;
4084         }
4085         sd_card->last_rsp_type = rsp_type;
4086
4087         retval = sd_switch_clock(chip);
4088         if (retval != STATUS_SUCCESS) {
4089                 return TRANSPORT_FAILED;
4090         }
4091
4092 #ifdef SUPPORT_SD_LOCK
4093         if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
4094                 if (CHK_MMC_8BIT(sd_card)) {
4095                         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
4096                                                      SD_BUS_WIDTH_8);
4097                         if (retval != STATUS_SUCCESS) {
4098                                 return TRANSPORT_FAILED;
4099                         }
4100
4101                 } else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) {
4102                         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
4103                                                      SD_BUS_WIDTH_4);
4104                         if (retval != STATUS_SUCCESS) {
4105                                 return TRANSPORT_FAILED;
4106                         }
4107                 }
4108         }
4109 #else
4110         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4);
4111         if (retval != STATUS_SUCCESS) {
4112                 return TRANSPORT_FAILED;
4113         }
4114 #endif
4115
4116         if (standby) {
4117                 retval = sd_select_card(chip, 0);
4118                 if (retval != STATUS_SUCCESS) {
4119                         goto sd_execute_cmd_failed;
4120                 }
4121         }
4122
4123         if (acmd) {
4124                 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
4125                                                  sd_card->sd_addr,
4126                                                  SD_RSP_TYPE_R1, NULL, 0,
4127                                                  false);
4128                 if (retval != STATUS_SUCCESS) {
4129                         goto sd_execute_cmd_failed;
4130                 }
4131         }
4132
4133         retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type,
4134                                          sd_card->rsp, rsp_len, false);
4135         if (retval != STATUS_SUCCESS) {
4136                 goto sd_execute_cmd_failed;
4137         }
4138
4139         if (standby) {
4140                 retval = sd_select_card(chip, 1);
4141                 if (retval != STATUS_SUCCESS) {
4142                         goto sd_execute_cmd_failed;
4143                 }
4144         }
4145
4146 #ifdef SUPPORT_SD_LOCK
4147         retval = sd_update_lock_status(chip);
4148         if (retval != STATUS_SUCCESS) {
4149                 goto sd_execute_cmd_failed;
4150         }
4151 #endif
4152
4153         scsi_set_resid(srb, 0);
4154         return TRANSPORT_GOOD;
4155
4156 sd_execute_cmd_failed:
4157         sd_card->pre_cmd_err = 1;
4158         set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
4159         release_sd_card(chip);
4160         do_reset_sd_card(chip);
4161         if (!(chip->card_ready & SD_CARD))
4162                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
4163
4164         return TRANSPORT_FAILED;
4165 }
4166
4167 int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4168 {
4169         struct sd_info *sd_card = &chip->sd_card;
4170         unsigned int lun = SCSI_LUN(srb);
4171         int retval, rsp_len, i;
4172         bool read_err = false, cmd13_checkbit = false;
4173         u8 cmd_idx, rsp_type, bus_width;
4174         bool standby = false, send_cmd12 = false, acmd = false;
4175         u32 data_len;
4176
4177         if (!sd_card->sd_pass_thru_en) {
4178                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4179                 return TRANSPORT_FAILED;
4180         }
4181
4182         if (sd_card->pre_cmd_err) {
4183                 sd_card->pre_cmd_err = 0;
4184                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4185                 return TRANSPORT_FAILED;
4186         }
4187
4188         retval = sd_switch_clock(chip);
4189         if (retval != STATUS_SUCCESS) {
4190                 return TRANSPORT_FAILED;
4191         }
4192
4193         cmd_idx = srb->cmnd[2] & 0x3F;
4194         if (srb->cmnd[1] & 0x04)
4195                 send_cmd12 = true;
4196
4197         if (srb->cmnd[1] & 0x02)
4198                 standby = true;
4199
4200         if (srb->cmnd[1] & 0x01)
4201                 acmd = true;
4202
4203         data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8]
4204                                                 << 8) | srb->cmnd[9];
4205
4206         retval = get_rsp_type(srb, &rsp_type, &rsp_len);
4207         if (retval != STATUS_SUCCESS) {
4208                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4209                 return TRANSPORT_FAILED;
4210         }
4211         sd_card->last_rsp_type = rsp_type;
4212
4213         retval = sd_switch_clock(chip);
4214         if (retval != STATUS_SUCCESS) {
4215                 return TRANSPORT_FAILED;
4216         }
4217
4218 #ifdef SUPPORT_SD_LOCK
4219         if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
4220                 if (CHK_MMC_8BIT(sd_card))
4221                         bus_width = SD_BUS_WIDTH_8;
4222                 else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card))
4223                         bus_width = SD_BUS_WIDTH_4;
4224                 else
4225                         bus_width = SD_BUS_WIDTH_1;
4226         } else {
4227                 bus_width = SD_BUS_WIDTH_4;
4228         }
4229         dev_dbg(rtsx_dev(chip), "bus_width = %d\n", bus_width);
4230 #else
4231         bus_width = SD_BUS_WIDTH_4;
4232 #endif
4233
4234         if (data_len < 512) {
4235                 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len,
4236                                                  SD_RSP_TYPE_R1, NULL, 0,
4237                                                  false);
4238                 if (retval != STATUS_SUCCESS) {
4239                         goto sd_execute_read_cmd_failed;
4240                 }
4241         }
4242
4243         if (standby) {
4244                 retval = sd_select_card(chip, 0);
4245                 if (retval != STATUS_SUCCESS) {
4246                         goto sd_execute_read_cmd_failed;
4247                 }
4248         }
4249
4250         if (acmd) {
4251                 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
4252                                                  sd_card->sd_addr,
4253                                                  SD_RSP_TYPE_R1, NULL, 0,
4254                                                  false);
4255                 if (retval != STATUS_SUCCESS) {
4256                         goto sd_execute_read_cmd_failed;
4257                 }
4258         }
4259
4260         if (data_len <= 512) {
4261                 int min_len;
4262                 u8 *buf;
4263                 u16 byte_cnt, blk_cnt;
4264                 u8 cmd[5];
4265
4266                 byte_cnt = ((u16)(srb->cmnd[8] & 0x03) << 8) | srb->cmnd[9];
4267                 blk_cnt = 1;
4268
4269                 cmd[0] = 0x40 | cmd_idx;
4270                 cmd[1] = srb->cmnd[3];
4271                 cmd[2] = srb->cmnd[4];
4272                 cmd[3] = srb->cmnd[5];
4273                 cmd[4] = srb->cmnd[6];
4274
4275                 buf = kmalloc(data_len, GFP_KERNEL);
4276                 if (!buf) {
4277                         return TRANSPORT_ERROR;
4278                 }
4279
4280                 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, byte_cnt,
4281                                       blk_cnt, bus_width, buf, data_len, 2000);
4282                 if (retval != STATUS_SUCCESS) {
4283                         read_err = true;
4284                         kfree(buf);
4285                         rtsx_clear_sd_error(chip);
4286                         goto sd_execute_read_cmd_failed;
4287                 }
4288
4289                 min_len = min(data_len, scsi_bufflen(srb));
4290                 rtsx_stor_set_xfer_buf(buf, min_len, srb);
4291
4292                 kfree(buf);
4293         } else if (!(data_len & 0x1FF)) {
4294                 rtsx_init_cmd(chip);
4295
4296                 trans_dma_enable(DMA_FROM_DEVICE, chip, data_len, DMA_512);
4297
4298                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
4299                              0x02);
4300                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
4301                              0x00);
4302                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H,
4303                              0xFF, (srb->cmnd[7] & 0xFE) >> 1);
4304                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L,
4305                              0xFF, (u8)((data_len & 0x0001FE00) >> 9));
4306
4307                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF,
4308                              0x40 | cmd_idx);
4309                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF,
4310                              srb->cmnd[3]);
4311                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF,
4312                              srb->cmnd[4]);
4313                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF,
4314                              srb->cmnd[5]);
4315                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF,
4316                              srb->cmnd[6]);
4317
4318                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
4319                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type);
4320
4321                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER,
4322                              0xFF, SD_TM_AUTO_READ_2 | SD_TRANSFER_START);
4323                 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
4324                              SD_TRANSFER_END, SD_TRANSFER_END);
4325
4326                 rtsx_send_cmd_no_wait(chip);
4327
4328                 retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb),
4329                                             scsi_bufflen(srb),
4330                                             scsi_sg_count(srb),
4331                                             DMA_FROM_DEVICE, 10000);
4332                 if (retval < 0) {
4333                         read_err = true;
4334                         rtsx_clear_sd_error(chip);
4335                         goto sd_execute_read_cmd_failed;
4336                 }
4337
4338         } else {
4339                 goto sd_execute_read_cmd_failed;
4340         }
4341
4342         retval = ext_sd_get_rsp(chip, rsp_len, sd_card->rsp, rsp_type);
4343         if (retval != STATUS_SUCCESS) {
4344                 goto sd_execute_read_cmd_failed;
4345         }
4346
4347         if (standby) {
4348                 retval = sd_select_card(chip, 1);
4349                 if (retval != STATUS_SUCCESS) {
4350                         goto sd_execute_read_cmd_failed;
4351                 }
4352         }
4353
4354         if (send_cmd12) {
4355                 retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0,
4356                                                  SD_RSP_TYPE_R1b, NULL, 0,
4357                                                  false);
4358                 if (retval != STATUS_SUCCESS) {
4359                         goto sd_execute_read_cmd_failed;
4360                 }
4361         }
4362
4363         if (data_len < 512) {
4364                 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200,
4365                                                  SD_RSP_TYPE_R1, NULL, 0,
4366                                                  false);
4367                 if (retval != STATUS_SUCCESS) {
4368                         goto sd_execute_read_cmd_failed;
4369                 }
4370
4371                 retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02);
4372                 if (retval != STATUS_SUCCESS) {
4373                         goto sd_execute_read_cmd_failed;
4374                 }
4375
4376                 retval = rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00);
4377                 if (retval != STATUS_SUCCESS) {
4378                         goto sd_execute_read_cmd_failed;
4379                 }
4380         }
4381
4382         if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04))
4383                 cmd13_checkbit = true;
4384
4385         for (i = 0; i < 3; i++) {
4386                 retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS,
4387                                                  sd_card->sd_addr,
4388                                                 SD_RSP_TYPE_R1, NULL, 0,
4389                                                 cmd13_checkbit);
4390                 if (retval == STATUS_SUCCESS)
4391                         break;
4392         }
4393         if (retval != STATUS_SUCCESS) {
4394                 goto sd_execute_read_cmd_failed;
4395         }
4396
4397         scsi_set_resid(srb, 0);
4398         return TRANSPORT_GOOD;
4399
4400 sd_execute_read_cmd_failed:
4401         sd_card->pre_cmd_err = 1;
4402         set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
4403         if (read_err)
4404                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4405
4406         release_sd_card(chip);
4407         do_reset_sd_card(chip);
4408         if (!(chip->card_ready & SD_CARD))
4409                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
4410
4411         return TRANSPORT_FAILED;
4412 }
4413
4414 int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4415 {
4416         struct sd_info *sd_card = &chip->sd_card;
4417         unsigned int lun = SCSI_LUN(srb);
4418         int retval, rsp_len, i;
4419         bool write_err = false, cmd13_checkbit = false;
4420         u8 cmd_idx, rsp_type;
4421         bool standby = false, send_cmd12 = false, acmd = false;
4422         u32 data_len, arg;
4423 #ifdef SUPPORT_SD_LOCK
4424         int lock_cmd_fail = 0;
4425         u8 sd_lock_state = 0;
4426         u8 lock_cmd_type = 0;
4427 #endif
4428
4429         if (!sd_card->sd_pass_thru_en) {
4430                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4431                 return TRANSPORT_FAILED;
4432         }
4433
4434         if (sd_card->pre_cmd_err) {
4435                 sd_card->pre_cmd_err = 0;
4436                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4437                 return TRANSPORT_FAILED;
4438         }
4439
4440         retval = sd_switch_clock(chip);
4441         if (retval != STATUS_SUCCESS) {
4442                 return TRANSPORT_FAILED;
4443         }
4444
4445         cmd_idx = srb->cmnd[2] & 0x3F;
4446         if (srb->cmnd[1] & 0x04)
4447                 send_cmd12 = true;
4448
4449         if (srb->cmnd[1] & 0x02)
4450                 standby = true;
4451
4452         if (srb->cmnd[1] & 0x01)
4453                 acmd = true;
4454
4455         data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8]
4456                                                 << 8) | srb->cmnd[9];
4457         arg = ((u32)srb->cmnd[3] << 24) | ((u32)srb->cmnd[4] << 16) |
4458                 ((u32)srb->cmnd[5] << 8) | srb->cmnd[6];
4459
4460 #ifdef SUPPORT_SD_LOCK
4461         if (cmd_idx == LOCK_UNLOCK) {
4462                 sd_lock_state = sd_card->sd_lock_status;
4463                 sd_lock_state &= SD_LOCKED;
4464         }
4465 #endif
4466
4467         retval = get_rsp_type(srb, &rsp_type, &rsp_len);
4468         if (retval != STATUS_SUCCESS) {
4469                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4470                 return TRANSPORT_FAILED;
4471         }
4472         sd_card->last_rsp_type = rsp_type;
4473
4474         retval = sd_switch_clock(chip);
4475         if (retval != STATUS_SUCCESS) {
4476                 return TRANSPORT_FAILED;
4477         }
4478
4479 #ifdef SUPPORT_SD_LOCK
4480         if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
4481                 if (CHK_MMC_8BIT(sd_card)) {
4482                         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
4483                                                      SD_BUS_WIDTH_8);
4484                         if (retval != STATUS_SUCCESS) {
4485                                 return TRANSPORT_FAILED;
4486                         }
4487
4488                 } else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) {
4489                         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
4490                                                      SD_BUS_WIDTH_4);
4491                         if (retval != STATUS_SUCCESS) {
4492                                 return TRANSPORT_FAILED;
4493                         }
4494                 }
4495         }
4496 #else
4497         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4);
4498         if (retval != STATUS_SUCCESS) {
4499                 return TRANSPORT_FAILED;
4500         }
4501 #endif
4502
4503         if (data_len < 512) {
4504                 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len,
4505                                                  SD_RSP_TYPE_R1, NULL, 0,
4506                                                  false);
4507                 if (retval != STATUS_SUCCESS) {
4508                         goto sd_execute_write_cmd_failed;
4509                 }
4510         }
4511
4512         if (standby) {
4513                 retval = sd_select_card(chip, 0);
4514                 if (retval != STATUS_SUCCESS) {
4515                         goto sd_execute_write_cmd_failed;
4516                 }
4517         }
4518
4519         if (acmd) {
4520                 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
4521                                                  sd_card->sd_addr,
4522                                                  SD_RSP_TYPE_R1, NULL, 0,
4523                                                  false);
4524                 if (retval != STATUS_SUCCESS) {
4525                         goto sd_execute_write_cmd_failed;
4526                 }
4527         }
4528
4529         retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type,
4530                                          sd_card->rsp, rsp_len, false);
4531         if (retval != STATUS_SUCCESS) {
4532                 goto sd_execute_write_cmd_failed;
4533         }
4534
4535         if (data_len <= 512) {
4536                 u16 i;
4537                 u8 *buf;
4538
4539                 buf = kmalloc(data_len, GFP_KERNEL);
4540                 if (!buf) {
4541                         return TRANSPORT_ERROR;
4542                 }
4543
4544                 rtsx_stor_get_xfer_buf(buf, data_len, srb);
4545
4546 #ifdef SUPPORT_SD_LOCK
4547                 if (cmd_idx == LOCK_UNLOCK)
4548                         lock_cmd_type = buf[0] & 0x0F;
4549 #endif
4550
4551                 if (data_len > 256) {
4552                         rtsx_init_cmd(chip);
4553                         for (i = 0; i < 256; i++) {
4554                                 rtsx_add_cmd(chip, WRITE_REG_CMD,
4555                                              PPBUF_BASE2 + i, 0xFF, buf[i]);
4556                         }
4557                         retval = rtsx_send_cmd(chip, 0, 250);
4558                         if (retval != STATUS_SUCCESS) {
4559                                 kfree(buf);
4560                                 goto sd_execute_write_cmd_failed;
4561                         }
4562
4563                         rtsx_init_cmd(chip);
4564                         for (i = 256; i < data_len; i++) {
4565                                 rtsx_add_cmd(chip, WRITE_REG_CMD,
4566                                              PPBUF_BASE2 + i, 0xFF, buf[i]);
4567                         }
4568                         retval = rtsx_send_cmd(chip, 0, 250);
4569                         if (retval != STATUS_SUCCESS) {
4570                                 kfree(buf);
4571                                 goto sd_execute_write_cmd_failed;
4572                         }
4573                 } else {
4574                         rtsx_init_cmd(chip);
4575                         for (i = 0; i < data_len; i++) {
4576                                 rtsx_add_cmd(chip, WRITE_REG_CMD,
4577                                              PPBUF_BASE2 + i, 0xFF, buf[i]);
4578                         }
4579                         retval = rtsx_send_cmd(chip, 0, 250);
4580                         if (retval != STATUS_SUCCESS) {
4581                                 kfree(buf);
4582                                 goto sd_execute_write_cmd_failed;
4583                         }
4584                 }
4585
4586                 kfree(buf);
4587
4588                 rtsx_init_cmd(chip);
4589
4590                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
4591                              srb->cmnd[8] & 0x03);
4592                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
4593                              srb->cmnd[9]);
4594                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF,
4595                              0x00);
4596                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF,
4597                              0x01);
4598                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01,
4599                              PINGPONG_BUFFER);
4600
4601                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
4602                              SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
4603                 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
4604                              SD_TRANSFER_END, SD_TRANSFER_END);
4605
4606                 retval = rtsx_send_cmd(chip, SD_CARD, 250);
4607         } else if (!(data_len & 0x1FF)) {
4608                 rtsx_init_cmd(chip);
4609
4610                 trans_dma_enable(DMA_TO_DEVICE, chip, data_len, DMA_512);
4611
4612                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
4613                              0x02);
4614                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
4615                              0x00);
4616                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H,
4617                              0xFF, (srb->cmnd[7] & 0xFE) >> 1);
4618                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L,
4619                              0xFF, (u8)((data_len & 0x0001FE00) >> 9));
4620
4621                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
4622                              SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
4623                 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
4624                              SD_TRANSFER_END, SD_TRANSFER_END);
4625
4626                 rtsx_send_cmd_no_wait(chip);
4627
4628                 retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb),
4629                                             scsi_bufflen(srb),
4630                                             scsi_sg_count(srb),
4631                                             DMA_TO_DEVICE, 10000);
4632
4633         } else {
4634                 goto sd_execute_write_cmd_failed;
4635         }
4636
4637         if (retval < 0) {
4638                 write_err = true;
4639                 rtsx_clear_sd_error(chip);
4640                 goto sd_execute_write_cmd_failed;
4641         }
4642
4643 #ifdef SUPPORT_SD_LOCK
4644         if (cmd_idx == LOCK_UNLOCK) {
4645                 if (lock_cmd_type == SD_ERASE) {
4646                         sd_card->sd_erase_status = SD_UNDER_ERASING;
4647                         scsi_set_resid(srb, 0);
4648                         return TRANSPORT_GOOD;
4649                 }
4650
4651                 rtsx_init_cmd(chip);
4652                 rtsx_add_cmd(chip, CHECK_REG_CMD, 0xFD30, 0x02, 0x02);
4653
4654                 rtsx_send_cmd(chip, SD_CARD, 250);
4655
4656                 retval = sd_update_lock_status(chip);
4657                 if (retval != STATUS_SUCCESS) {
4658                         dev_dbg(rtsx_dev(chip), "Lock command fail!\n");
4659                         lock_cmd_fail = 1;
4660                 }
4661         }
4662 #endif /* SUPPORT_SD_LOCK */
4663
4664         if (standby) {
4665                 retval = sd_select_card(chip, 1);
4666                 if (retval != STATUS_SUCCESS) {
4667                         goto sd_execute_write_cmd_failed;
4668                 }
4669         }
4670
4671         if (send_cmd12) {
4672                 retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0,
4673                                                  SD_RSP_TYPE_R1b, NULL, 0,
4674                                                  false);
4675                 if (retval != STATUS_SUCCESS) {
4676                         goto sd_execute_write_cmd_failed;
4677                 }
4678         }
4679
4680         if (data_len < 512) {
4681                 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200,
4682                                                  SD_RSP_TYPE_R1, NULL, 0,
4683                                                  false);
4684                 if (retval != STATUS_SUCCESS) {
4685                         goto sd_execute_write_cmd_failed;
4686                 }
4687
4688                 retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02);
4689                 if (retval != STATUS_SUCCESS) {
4690                         goto sd_execute_write_cmd_failed;
4691                 }
4692
4693                 retval = rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00);
4694                 if (retval != STATUS_SUCCESS) {
4695                         goto sd_execute_write_cmd_failed;
4696                 }
4697         }
4698
4699         if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04))
4700                 cmd13_checkbit = true;
4701
4702         for (i = 0; i < 3; i++) {
4703                 retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS,
4704                                                  sd_card->sd_addr,
4705                                                  SD_RSP_TYPE_R1, NULL, 0,
4706                                                  cmd13_checkbit);
4707                 if (retval == STATUS_SUCCESS)
4708                         break;
4709         }
4710         if (retval != STATUS_SUCCESS) {
4711                 goto sd_execute_write_cmd_failed;
4712         }
4713
4714 #ifdef SUPPORT_SD_LOCK
4715         if (cmd_idx == LOCK_UNLOCK) {
4716                 if (!lock_cmd_fail) {
4717                         dev_dbg(rtsx_dev(chip), "lock_cmd_type = 0x%x\n",
4718                                 lock_cmd_type);
4719                         if (lock_cmd_type & SD_CLR_PWD)
4720                                 sd_card->sd_lock_status &= ~SD_PWD_EXIST;
4721
4722                         if (lock_cmd_type & SD_SET_PWD)
4723                                 sd_card->sd_lock_status |= SD_PWD_EXIST;
4724                 }
4725
4726                 dev_dbg(rtsx_dev(chip), "sd_lock_state = 0x%x, sd_card->sd_lock_status = 0x%x\n",
4727                         sd_lock_state, sd_card->sd_lock_status);
4728                 if (sd_lock_state ^ (sd_card->sd_lock_status & SD_LOCKED)) {
4729                         sd_card->sd_lock_notify = 1;
4730                         if (sd_lock_state) {
4731                                 if (sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) {
4732                                         sd_card->sd_lock_status |= (
4733                                                 SD_UNLOCK_POW_ON | SD_SDR_RST);
4734                                         if (CHK_SD(sd_card)) {
4735                                                 retval = reset_sd(chip);
4736                                                 if (retval != STATUS_SUCCESS) {
4737                                                         sd_card->sd_lock_status &= ~(SD_UNLOCK_POW_ON | SD_SDR_RST);
4738                                                         goto sd_execute_write_cmd_failed;
4739                                                 }
4740                                         }
4741
4742                                         sd_card->sd_lock_status &= ~(SD_UNLOCK_POW_ON | SD_SDR_RST);
4743                                 }
4744                         }
4745                 }
4746         }
4747
4748         if (lock_cmd_fail) {
4749                 scsi_set_resid(srb, 0);
4750                 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
4751                 return TRANSPORT_FAILED;
4752         }
4753 #endif  /* SUPPORT_SD_LOCK */
4754
4755         scsi_set_resid(srb, 0);
4756         return TRANSPORT_GOOD;
4757
4758 sd_execute_write_cmd_failed:
4759         sd_card->pre_cmd_err = 1;
4760         set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
4761         if (write_err)
4762                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
4763
4764         release_sd_card(chip);
4765         do_reset_sd_card(chip);
4766         if (!(chip->card_ready & SD_CARD))
4767                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
4768
4769         return TRANSPORT_FAILED;
4770 }
4771
4772 int sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4773 {
4774         struct sd_info *sd_card = &chip->sd_card;
4775         unsigned int lun = SCSI_LUN(srb);
4776         int count;
4777         u16 data_len;
4778
4779         if (!sd_card->sd_pass_thru_en) {
4780                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4781                 return TRANSPORT_FAILED;
4782         }
4783
4784         if (sd_card->pre_cmd_err) {
4785                 sd_card->pre_cmd_err = 0;
4786                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4787                 return TRANSPORT_FAILED;
4788         }
4789
4790         data_len = ((u16)srb->cmnd[7] << 8) | srb->cmnd[8];
4791
4792         if (sd_card->last_rsp_type == SD_RSP_TYPE_R0) {
4793                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4794                 return TRANSPORT_FAILED;
4795         } else if (sd_card->last_rsp_type == SD_RSP_TYPE_R2) {
4796                 count = (data_len < 17) ? data_len : 17;
4797         } else {
4798                 count = (data_len < 6) ? data_len : 6;
4799         }
4800         rtsx_stor_set_xfer_buf(sd_card->rsp, count, srb);
4801
4802         dev_dbg(rtsx_dev(chip), "Response length: %d\n", data_len);
4803         dev_dbg(rtsx_dev(chip), "Response: 0x%x 0x%x 0x%x 0x%x\n",
4804                 sd_card->rsp[0], sd_card->rsp[1],
4805                 sd_card->rsp[2], sd_card->rsp[3]);
4806
4807         scsi_set_resid(srb, 0);
4808         return TRANSPORT_GOOD;
4809 }
4810
4811 int sd_hw_rst(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4812 {
4813         struct sd_info *sd_card = &chip->sd_card;
4814         unsigned int lun = SCSI_LUN(srb);
4815         int retval;
4816
4817         if (!sd_card->sd_pass_thru_en) {
4818                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4819                 return TRANSPORT_FAILED;
4820         }
4821
4822         if (sd_card->pre_cmd_err) {
4823                 sd_card->pre_cmd_err = 0;
4824                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4825                 return TRANSPORT_FAILED;
4826         }
4827
4828         if ((srb->cmnd[2] != 0x53) || (srb->cmnd[3] != 0x44) ||
4829             (srb->cmnd[4] != 0x20) || (srb->cmnd[5] != 0x43) ||
4830             (srb->cmnd[6] != 0x61) || (srb->cmnd[7] != 0x72) ||
4831             (srb->cmnd[8] != 0x64)) {
4832                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4833                 return TRANSPORT_FAILED;
4834         }
4835
4836         switch (srb->cmnd[1] & 0x0F) {
4837         case 0:
4838 #ifdef SUPPORT_SD_LOCK
4839                 if (srb->cmnd[9] == 0x64)
4840                         sd_card->sd_lock_status |= SD_SDR_RST;
4841 #endif
4842                 retval = reset_sd_card(chip);
4843                 if (retval != STATUS_SUCCESS) {
4844 #ifdef SUPPORT_SD_LOCK
4845                         sd_card->sd_lock_status &= ~SD_SDR_RST;
4846 #endif
4847                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
4848                         sd_card->pre_cmd_err = 1;
4849                         return TRANSPORT_FAILED;
4850                 }
4851 #ifdef SUPPORT_SD_LOCK
4852                 sd_card->sd_lock_status &= ~SD_SDR_RST;
4853 #endif
4854                 break;
4855
4856         case 1:
4857                 retval = soft_reset_sd_card(chip);
4858                 if (retval != STATUS_SUCCESS) {
4859                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
4860                         sd_card->pre_cmd_err = 1;
4861                         return TRANSPORT_FAILED;
4862                 }
4863                 break;
4864
4865         default:
4866                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4867                 return TRANSPORT_FAILED;
4868         }
4869
4870         scsi_set_resid(srb, 0);
4871         return TRANSPORT_GOOD;
4872 }
4873 #endif
4874
4875 void sd_cleanup_work(struct rtsx_chip *chip)
4876 {
4877         struct sd_info *sd_card = &chip->sd_card;
4878
4879         if (sd_card->seq_mode) {
4880                 dev_dbg(rtsx_dev(chip), "SD: stop transmission\n");
4881                 sd_stop_seq_mode(chip);
4882                 sd_card->cleanup_counter = 0;
4883         }
4884 }
4885
4886 int sd_power_off_card3v3(struct rtsx_chip *chip)
4887 {
4888         int retval;
4889
4890         retval = disable_card_clock(chip, SD_CARD);
4891         if (retval != STATUS_SUCCESS) {
4892                 return STATUS_FAIL;
4893         }
4894
4895         retval = rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0);
4896         if (retval) {
4897                 return retval;
4898         }
4899
4900         if (!chip->ft2_fast_mode) {
4901                 retval = card_power_off(chip, SD_CARD);
4902                 if (retval != STATUS_SUCCESS) {
4903                         return STATUS_FAIL;
4904                 }
4905
4906                 mdelay(50);
4907         }
4908
4909         if (chip->asic_code) {
4910                 retval = sd_pull_ctl_disable(chip);
4911                 if (retval != STATUS_SUCCESS) {
4912                         return STATUS_FAIL;
4913                 }
4914         } else {
4915                 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
4916                                              FPGA_SD_PULL_CTL_BIT | 0x20,
4917                                              FPGA_SD_PULL_CTL_BIT);
4918                 if (retval) {
4919                         return retval;
4920                 }
4921         }
4922
4923         return STATUS_SUCCESS;
4924 }
4925
4926 int release_sd_card(struct rtsx_chip *chip)
4927 {
4928         struct sd_info *sd_card = &chip->sd_card;
4929         int retval;
4930
4931         chip->card_ready &= ~SD_CARD;
4932         chip->card_fail &= ~SD_CARD;
4933         chip->card_wp &= ~SD_CARD;
4934
4935         chip->sd_io = 0;
4936         chip->sd_int = 0;
4937
4938 #ifdef SUPPORT_SD_LOCK
4939         sd_card->sd_lock_status = 0;
4940         sd_card->sd_erase_status = 0;
4941 #endif
4942
4943         memset(sd_card->raw_csd, 0, 16);
4944         memset(sd_card->raw_scr, 0, 8);
4945
4946         retval = sd_power_off_card3v3(chip);
4947         if (retval != STATUS_SUCCESS) {
4948                 return STATUS_FAIL;
4949         }
4950
4951         return STATUS_SUCCESS;
4952 }