drivers/staging/slicoss/slic.h

   1 /**************************************************************************
   2  *
   3  * Copyright (c) 2000-2002 Alacritech, Inc.  All rights reserved.
   4  *
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  *
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above
  13  *    copyright notice, this list of conditions and the following
  14  *    disclaimer in the documentation and/or other materials provided
  15  *    with the distribution.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
  18  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  20  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ALACRITECH, INC. OR
  21  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  24  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  25  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  27  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  * The views and conclusions contained in the software and documentation
  31  * are those of the authors and should not be interpreted as representing
  32  * official policies, either expressed or implied, of Alacritech, Inc.
  33  *
  34  **************************************************************************/
  35
  36 /*
  37  * FILENAME: slic.h
  38  *
  39  * This is the base set of header definitions for the SLICOSS driver.
  40  */
  41 #ifndef __SLIC_DRIVER_H__
  42 #define __SLIC_DRIVER_H__
  43
  44 /* firmware stuff */
  45 #define OASIS_UCODE_VERS_STRING "1.2"
  46 #define OASIS_UCODE_VERS_DATE   "2006/03/27 15:10:37"
  47 #define OASIS_UCODE_HOSTIF_ID   3
  48
  49 #define MOJAVE_UCODE_VERS_STRING        "1.2"
  50 #define MOJAVE_UCODE_VERS_DATE          "2006/03/27 15:12:22"
  51 #define MOJAVE_UCODE_HOSTIF_ID          3
  52
  53 #define GB_RCVUCODE_VERS_STRING "1.2"
  54 #define GB_RCVUCODE_VERS_DATE   "2006/03/27 15:12:15"
  55 static u32 OasisRcvUCodeLen = 512;
  56 static u32 GBRcvUCodeLen = 512;
  57 #define SECTION_SIZE 65536
  58
  59 #define SLIC_RSPQ_PAGES_GB        10
  60 #define SLIC_RSPQ_BUFSINPAGE      (PAGE_SIZE / SLIC_RSPBUF_SIZE)
  61
  62 struct slic_rspqueue {
  63         u32             offset;
  64         u32             pageindex;
  65         u32             num_pages;
  66         struct slic_rspbuf *rspbuf;
  67         u32 *vaddr[SLIC_RSPQ_PAGES_GB];
  68         dma_addr_t          paddr[SLIC_RSPQ_PAGES_GB];
  69 };
  70
  71 #define SLIC_RCVQ_EXPANSION         1
  72 #define SLIC_RCVQ_ENTRIES           (256 * SLIC_RCVQ_EXPANSION)
  73 #define SLIC_RCVQ_MINENTRIES        (SLIC_RCVQ_ENTRIES / 2)
  74 #define SLIC_RCVQ_MAX_PROCESS_ISR   ((SLIC_RCVQ_ENTRIES * 4))
  75 #define SLIC_RCVQ_RCVBUFSIZE        2048
  76 #define SLIC_RCVQ_FILLENTRIES       (16 * SLIC_RCVQ_EXPANSION)
  77 #define SLIC_RCVQ_FILLTHRESH        (SLIC_RCVQ_ENTRIES - SLIC_RCVQ_FILLENTRIES)
  78
  79 struct slic_rcvqueue {
  80         struct sk_buff    *head;
  81         struct sk_buff    *tail;
  82         u32            count;
  83         u32            size;
  84         u32            errors;
  85 };
  86
  87 struct slic_rcvbuf_info {
  88         u32     id;
  89         u32     starttime;
  90         u32     stoptime;
  91         u32     slicworld;
  92         u32     lasttime;
  93         u32     lastid;
  94 };
  95
  96 /*
  97  * SLIC Handle structure.  Used to restrict handle values to
  98  * 32 bits by using an index rather than an address.
  99  * Simplifies ucode in 64-bit systems
 100  */
 101 struct slic_handle_word {
 102         union {
 103                 struct {
 104                         ushort      index;
 105                         ushort      bottombits; /* to denote num bufs to card */
 106                 }  parts;
 107                 u32         whole;
 108         }  handle;
 109 };
 110
 111 struct slic_handle {
 112         struct slic_handle_word  token;  /* token passed between host and card*/
 113         ushort                      type;
 114         void *address;    /* actual address of the object*/
 115         ushort                      offset;
 116         struct slic_handle       *other_handle;
 117         struct slic_handle       *next;
 118 };
 119
 120 #define SLIC_HANDLE_FREE        0x0000
 121 #define SLIC_HANDLE_DATA        0x0001
 122 #define SLIC_HANDLE_CMD         0x0002
 123 #define SLIC_HANDLE_CONTEXT     0x0003
 124 #define SLIC_HANDLE_TEAM        0x0004
 125
 126 #define handle_index        handle.parts.index
 127 #define handle_bottom       handle.parts.bottombits
 128 #define handle_token        handle.whole
 129
 130 #define SLIC_HOSTCMD_SIZE    512
 131
 132 struct slic_hostcmd {
 133         struct slic_host64_cmd  cmd64;
 134         u32                    type;
 135         struct sk_buff            *skb;
 136         u32                    paddrl;
 137         u32                    paddrh;
 138         u32                    busy;
 139         u32                    cmdsize;
 140         ushort                     numbufs;
 141         struct slic_handle    *pslic_handle;/* handle associated with command */
 142         struct slic_hostcmd    *next;
 143         struct slic_hostcmd    *next_all;
 144 };
 145
 146 #define SLIC_CMDQ_CMDSINPAGE    (PAGE_SIZE / SLIC_HOSTCMD_SIZE)
 147 #define SLIC_CMD_DUMB            3
 148 #define SLIC_CMDQ_INITCMDS       256
 149 #define SLIC_CMDQ_MAXCMDS        256
 150 #define SLIC_CMDQ_MAXOUTSTAND    SLIC_CMDQ_MAXCMDS
 151 #define SLIC_CMDQ_MAXPAGES       (SLIC_CMDQ_MAXCMDS / SLIC_CMDQ_CMDSINPAGE)
 152 #define SLIC_CMDQ_INITPAGES      (SLIC_CMDQ_INITCMDS / SLIC_CMDQ_CMDSINPAGE)
 153
 154 struct slic_cmdqmem {
 155         int pagecnt;
 156         u32 *pages[SLIC_CMDQ_MAXPAGES];
 157         dma_addr_t dma_pages[SLIC_CMDQ_MAXPAGES];
 158 };
 159
 160 struct slic_cmdqueue {
 161         struct slic_hostcmd *head;
 162         struct slic_hostcmd *tail;
 163         int count;
 164         spinlock_t lock;
 165 };
 166
 167 #define SLIC_MAX_CARDS              32
 168 #define SLIC_MAX_PORTS              4        /* Max # of ports per card   */
 169
 170 struct mcast_address {
 171         unsigned char address[6];
 172         struct mcast_address *next;
 173 };
 174
 175 #define CARD_DOWN        0x00000000
 176 #define CARD_UP          0x00000001
 177 #define CARD_FAIL        0x00000002
 178 #define CARD_DIAG        0x00000003
 179 #define CARD_SLEEP       0x00000004
 180
 181 #define ADAPT_DOWN             0x00
 182 #define ADAPT_UP               0x01
 183 #define ADAPT_FAIL             0x02
 184 #define ADAPT_RESET            0x03
 185 #define ADAPT_SLEEP            0x04
 186
 187 #define ADAPT_FLAGS_BOOTTIME            0x0001
 188 #define ADAPT_FLAGS_IS64BIT             0x0002
 189 #define ADAPT_FLAGS_PENDINGLINKDOWN     0x0004
 190 #define ADAPT_FLAGS_FIBERMEDIA          0x0008
 191 #define ADAPT_FLAGS_LOCKS_ALLOCED       0x0010
 192 #define ADAPT_FLAGS_INT_REGISTERED      0x0020
 193 #define ADAPT_FLAGS_LOAD_TIMER_SET      0x0040
 194 #define ADAPT_FLAGS_STATS_TIMER_SET     0x0080
 195 #define ADAPT_FLAGS_RESET_TIMER_SET     0x0100
 196
 197 #define LINK_DOWN              0x00
 198 #define LINK_CONFIG            0x01
 199 #define LINK_UP                0x02
 200
 201 #define LINK_10MB              0x00
 202 #define LINK_100MB             0x01
 203 #define LINK_AUTOSPEED         0x02
 204 #define LINK_1000MB            0x03
 205 #define LINK_10000MB           0x04
 206
 207 #define LINK_HALFD             0x00
 208 #define LINK_FULLD             0x01
 209 #define LINK_AUTOD             0x02
 210
 211 #define MAC_DIRECTED     0x00000001
 212 #define MAC_BCAST        0x00000002
 213 #define MAC_MCAST        0x00000004
 214 #define MAC_PROMISC      0x00000008
 215 #define MAC_LOOPBACK     0x00000010
 216 #define MAC_ALLMCAST     0x00000020
 217
 218 #define SLIC_DUPLEX(x)    ((x == LINK_FULLD) ? "FDX" : "HDX")
 219 #define SLIC_SPEED(x)     ((x == LINK_100MB) ? "100Mb" : ((x == LINK_1000MB) ?\
 220                                 "1000Mb" : " 10Mb"))
 221 #define SLIC_LINKSTATE(x) ((x == LINK_DOWN) ? "Down" : "Up  ")
 222 #define SLIC_ADAPTER_STATE(x) ((x == ADAPT_UP) ? "UP" : "Down")
 223 #define SLIC_CARD_STATE(x)    ((x == CARD_UP) ? "UP" : "Down")
 224
 225 struct slic_iface_stats {
 226         /*
 227          * Stats
 228          */
 229         u64        xmt_bytes;
 230         u64        xmt_ucast;
 231         u64        xmt_mcast;
 232         u64        xmt_bcast;
 233         u64        xmt_errors;
 234         u64        xmt_discards;
 235         u64        xmit_collisions;
 236         u64        xmit_excess_xmit_collisions;
 237         u64        rcv_bytes;
 238         u64        rcv_ucast;
 239         u64        rcv_mcast;
 240         u64        rcv_bcast;
 241         u64        rcv_errors;
 242         u64        rcv_discards;
 243 };
 244
 245 struct sliccp_stats {
 246         u64        xmit_tcp_segs;
 247         u64        xmit_tcp_bytes;
 248         u64        rcv_tcp_segs;
 249         u64        rcv_tcp_bytes;
 250 };
 251
 252 struct slicnet_stats {
 253         struct sliccp_stats        tcp;
 254         struct slic_iface_stats      iface;
 255 };
 256
 257 #define SLIC_LOADTIMER_PERIOD     1
 258 #define SLIC_INTAGG_DEFAULT       200
 259 #define SLIC_LOAD_0               0
 260 #define SLIC_INTAGG_0             0
 261 #define SLIC_LOAD_1               8000
 262 #define SLIC_LOAD_2               10000
 263 #define SLIC_LOAD_3               12000
 264 #define SLIC_LOAD_4               14000
 265 #define SLIC_LOAD_5               16000
 266 #define SLIC_INTAGG_1             50
 267 #define SLIC_INTAGG_2             100
 268 #define SLIC_INTAGG_3             150
 269 #define SLIC_INTAGG_4             200
 270 #define SLIC_INTAGG_5             250
 271 #define SLIC_LOAD_1GB             3000
 272 #define SLIC_LOAD_2GB             6000
 273 #define SLIC_LOAD_3GB             12000
 274 #define SLIC_LOAD_4GB             24000
 275 #define SLIC_LOAD_5GB             48000
 276 #define SLIC_INTAGG_1GB           50
 277 #define SLIC_INTAGG_2GB           75
 278 #define SLIC_INTAGG_3GB           100
 279 #define SLIC_INTAGG_4GB           100
 280 #define SLIC_INTAGG_5GB           100
 281
 282 struct ether_header {
 283         unsigned char    ether_dhost[6];
 284         unsigned char    ether_shost[6];
 285         ushort   ether_type;
 286 };
 287
 288 struct sliccard {
 289         uint              busnumber;
 290         uint              slotnumber;
 291         uint              state;
 292         uint              cardnum;
 293         uint              card_size;
 294         uint              adapters_activated;
 295         uint              adapters_allocated;
 296         uint              adapters_sleeping;
 297         uint              gennumber;
 298         u32           events;
 299         u32           loadlevel_current;
 300         u32           load;
 301         uint              reset_in_progress;
 302         u32           pingstatus;
 303         u32           bad_pingstatus;
 304         struct timer_list loadtimer;
 305         u32           loadtimerset;
 306         uint              config_set;
 307         struct slic_config  config;
 308         struct adapter  *master;
 309         struct adapter  *adapter[SLIC_MAX_PORTS];
 310         struct sliccard *next;
 311         u32             error_interrupts;
 312         u32             error_rmiss_interrupts;
 313         u32             rcv_interrupts;
 314         u32             xmit_interrupts;
 315         u32             num_isrs;
 316         u32             false_interrupts;
 317         u32             max_isr_rcvs;
 318         u32             max_isr_xmits;
 319         u32             rcv_interrupt_yields;
 320         u32             tx_packets;
 321         u32             debug_ix;
 322         ushort              reg_type[32];
 323         ushort              reg_offset[32];
 324         u32             reg_value[32];
 325         u32             reg_valueh[32];
 326 };
 327
 328 #define NUM_CFG_SPACES      2
 329 #define NUM_CFG_REGS        64
 330 #define NUM_CFG_REG_ULONGS  (NUM_CFG_REGS / sizeof(u32))
 331
 332 struct physcard {
 333         struct adapter  *adapter[SLIC_MAX_PORTS];
 334         struct physcard *next;
 335         uint                adapters_allocd;
 336
 337 /*
 338  * the following is not currently needed
 339  *      u32              bridge_busnum;
 340  *      u32              bridge_cfg[NUM_CFG_SPACES][NUM_CFG_REG_ULONGS];
 341  */
 342 };
 343
 344 struct base_driver {
 345         spinlock_t       driver_lock;
 346         u32              num_slic_cards;
 347         u32              num_slic_ports;
 348         u32              num_slic_ports_active;
 349         u32              dynamic_intagg;
 350         struct sliccard  *slic_card;
 351         struct physcard  *phys_card;
 352         uint                 cardnuminuse[SLIC_MAX_CARDS];
 353 };
 354
 355 struct slic_stats {
 356         /* xmit stats */
 357         u64 xmit_tcp_bytes;
 358         u64 xmit_tcp_segs;
 359         u64 xmit_bytes;
 360         u64 xmit_collisions;
 361         u64 xmit_unicasts;
 362         u64 xmit_other_error;
 363         u64 xmit_excess_collisions;
 364         /* rcv stats */
 365         u64 rcv_tcp_bytes;
 366         u64 rcv_tcp_segs;
 367         u64 rcv_bytes;
 368         u64 rcv_unicasts;
 369         u64 rcv_other_error;
 370         u64 rcv_drops;
 371 };
 372
 373 struct slic_shmem_data {
 374         u32 isr;
 375         u32 lnkstatus;
 376         struct slic_stats stats;
 377 };
 378
 379 struct slic_shmemory {
 380         dma_addr_t isr_phaddr;
 381         dma_addr_t lnkstatus_phaddr;
 382         dma_addr_t stats_phaddr;
 383         struct slic_shmem_data __iomem *shmem_data;
 384 };
 385
 386 struct slic_upr {
 387         uint               adapter;
 388         u32            upr_request;
 389         u32            upr_data;
 390         u32            upr_data_h;
 391         u32            upr_buffer;
 392         u32            upr_buffer_h;
 393         struct slic_upr *next;
 394 };
 395
 396 struct slic_ifevents {
 397         uint        oflow802;
 398         uint        uflow802;
 399         uint        Tprtoflow;
 400         uint        rcvearly;
 401         uint        Bufov;
 402         uint        Carre;
 403         uint        Longe;
 404         uint        Invp;
 405         uint        Crc;
 406         uint        Drbl;
 407         uint        Code;
 408         uint        IpHlen;
 409         uint        IpLen;
 410         uint        IpCsum;
 411         uint        TpCsum;
 412         uint        TpHlen;
 413 };
 414
 415 struct adapter {
 416         void *ifp;
 417         struct sliccard *card;
 418         uint                port;
 419         struct physcard *physcard;
 420         uint                physport;
 421         uint                cardindex;
 422         uint                card_size;
 423         uint                chipid;
 424         struct net_device  *netdev;
 425         spinlock_t          adapter_lock;
 426         spinlock_t          reset_lock;
 427         struct pci_dev     *pcidev;
 428         uint                busnumber;
 429         uint                slotnumber;
 430         uint                functionnumber;
 431         ushort              vendid;
 432         ushort              devid;
 433         ushort              subsysid;
 434         u32             irq;
 435         u32             drambase;
 436         u32             dramlength;
 437         uint                queues_initialized;
 438         uint                allocated;
 439         uint                activated;
 440         u32             intrregistered;
 441         uint                isp_initialized;
 442         uint                gennumber;
 443         struct slic_shmemory shmem;
 444         dma_addr_t          phys_shmem;
 445         void __iomem *regs;
 446         unsigned char               state;
 447         unsigned char               linkstate;
 448         unsigned char               linkspeed;
 449         unsigned char               linkduplex;
 450         uint                flags;
 451         unsigned char               macaddr[6];
 452         unsigned char               currmacaddr[6];
 453         u32             macopts;
 454         ushort              devflags_prev;
 455         u64             mcastmask;
 456         struct mcast_address   *mcastaddrs;
 457         struct slic_upr   *upr_list;
 458         uint                upr_busy;
 459         struct timer_list   pingtimer;
 460         u32             pingtimerset;
 461         struct timer_list   loadtimer;
 462         u32             loadtimerset;
 463         spinlock_t               upr_lock;
 464         spinlock_t               bit64reglock;
 465         struct slic_rspqueue     rspqueue;
 466         struct slic_rcvqueue     rcvqueue;
 467         struct slic_cmdqueue     cmdq_free;
 468         struct slic_cmdqueue     cmdq_done;
 469         struct slic_cmdqueue     cmdq_all;
 470         struct slic_cmdqmem      cmdqmem;
 471         /*
 472          * SLIC Handles
 473          */
 474         /* Object handles*/
 475         struct slic_handle slic_handles[SLIC_CMDQ_MAXCMDS + 1];
 476         /* Free object handles*/
 477         struct slic_handle *pfree_slic_handles;
 478         /* Object handle list lock*/
 479         spinlock_t          handle_lock;
 480         ushort              slic_handle_ix;
 481
 482         u32             xmitq_full;
 483         u32             all_reg_writes;
 484         u32             icr_reg_writes;
 485         u32             isr_reg_writes;
 486         u32             error_interrupts;
 487         u32             error_rmiss_interrupts;
 488         u32             rx_errors;
 489         u32             rcv_drops;
 490         u32             rcv_interrupts;
 491         u32             xmit_interrupts;
 492         u32             linkevent_interrupts;
 493         u32             upr_interrupts;
 494         u32             num_isrs;
 495         u32             false_interrupts;
 496         u32             tx_packets;
 497         u32             xmit_completes;
 498         u32             tx_drops;
 499         u32             rcv_broadcasts;
 500         u32             rcv_multicasts;
 501         u32             rcv_unicasts;
 502         u32             max_isr_rcvs;
 503         u32             max_isr_xmits;
 504         u32             rcv_interrupt_yields;
 505         u32             intagg_period;
 506         u32             intagg_delay;
 507         u32             dynamic_intagg;
 508         struct inicpm_state    *inicpm_info;
 509         void *pinicpm_info;
 510         struct slic_ifevents  if_events;
 511         struct slic_stats        inicstats_prev;
 512         struct slicnet_stats     slic_stats;
 513 };
 514
 515 static inline u32 slic_read32(struct adapter *adapter, unsigned int reg)
 516 {
 517         return ioread32(adapter->regs + reg);
 518 }
 519
 520 static inline void slic_write32(struct adapter *adapter, unsigned int reg,
 521                                 u32 val)
 522 {
 523         iowrite32(val, adapter->regs + reg);
 524 }
 525
 526 static inline void slic_write64(struct adapter *adapter, unsigned int reg,
 527                                 u32 val, u32 hiaddr)
 528 {
 529         unsigned long flags;
 530
 531         spin_lock_irqsave(&adapter->bit64reglock, flags);
 532         slic_write32(adapter, SLIC_REG_ADDR_UPPER, hiaddr);
 533         slic_write32(adapter, reg, val);
 534         mmiowb();
 535         spin_unlock_irqrestore(&adapter->bit64reglock, flags);
 536 }
 537
 538 static inline void slic_flush_write(struct adapter *adapter)
 539 {
 540         ioread32(adapter->regs + SLIC_REG_HOSTID);
 541 }
 542
 543 #define UPDATE_STATS(largestat, newstat, oldstat)                        \
 544 {                                                                        \
 545         if ((newstat) < (oldstat))                                       \
 546                 (largestat) += ((newstat) + (0xFFFFFFFF - oldstat + 1)); \
 547         else                                                             \
 548                 (largestat) += ((newstat) - (oldstat));                  \
 549 }
 550
 551 #define UPDATE_STATS_GB(largestat, newstat, oldstat)                     \
 552 {                                                                        \
 553         (largestat) += ((newstat) - (oldstat));                          \
 554 }
 555
 556 #if BITS_PER_LONG == 64
 557 #define   SLIC_GET_ADDR_LOW(_addr)  (u32)((u64)(_addr) & \
 558         0x00000000FFFFFFFF)
 559 #define   SLIC_GET_ADDR_HIGH(_addr)  (u32)(((u64)(_addr) >> 32) & \
 560         0x00000000FFFFFFFF)
 561 #elif BITS_PER_LONG == 32
 562 #define   SLIC_GET_ADDR_LOW(_addr)   (u32)(_addr)
 563 #define   SLIC_GET_ADDR_HIGH(_addr)  (u32)0
 564 #else
 565 #error BITS_PER_LONG must be 32 or 64
 566 #endif
 567
 568 #define FLUSH           true
 569 #define DONT_FLUSH      false
 570
 571 #define SIOCSLICSETINTAGG        (SIOCDEVPRIVATE + 10)
 572
 573 #endif /*  __SLIC_DRIVER_H__ */