drivers/staging/typec/tcpci.h

   1 /*
   2  * Copyright 2015-2017 Google, Inc
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * USB Type-C Port Controller Interface.
  15  */
  16
  17 #ifndef __LINUX_USB_TCPCI_H
  18 #define __LINUX_USB_TCPCI_H
  19
  20 #define TCPC_VENDOR_ID                  0x0
  21 #define TCPC_PRODUCT_ID                 0x2
  22 #define TCPC_BCD_DEV                    0x4
  23 #define TCPC_TC_REV                     0x6
  24 #define TCPC_PD_REV                     0x8
  25 #define TCPC_PD_INT_REV                 0xa
  26
  27 #define TCPC_ALERT                      0x10
  28 #define TCPC_ALERT_VBUS_DISCNCT         BIT(11)
  29 #define TCPC_ALERT_RX_BUF_OVF           BIT(10)
  30 #define TCPC_ALERT_FAULT                BIT(9)
  31 #define TCPC_ALERT_V_ALARM_LO           BIT(8)
  32 #define TCPC_ALERT_V_ALARM_HI           BIT(7)
  33 #define TCPC_ALERT_TX_SUCCESS           BIT(6)
  34 #define TCPC_ALERT_TX_DISCARDED         BIT(5)
  35 #define TCPC_ALERT_TX_FAILED            BIT(4)
  36 #define TCPC_ALERT_RX_HARD_RST          BIT(3)
  37 #define TCPC_ALERT_RX_STATUS            BIT(2)
  38 #define TCPC_ALERT_POWER_STATUS         BIT(1)
  39 #define TCPC_ALERT_CC_STATUS            BIT(0)
  40
  41 #define TCPC_ALERT_MASK                 0x12
  42 #define TCPC_POWER_STATUS_MASK          0x14
  43 #define TCPC_FAULT_STATUS_MASK          0x15
  44 #define TCPC_CONFIG_STD_OUTPUT          0x18
  45
  46 #define TCPC_TCPC_CTRL                  0x19
  47 #define TCPC_TCPC_CTRL_ORIENTATION      BIT(0)
  48
  49 #define TCPC_ROLE_CTRL                  0x1a
  50 #define TCPC_ROLE_CTRL_DRP              BIT(6)
  51 #define TCPC_ROLE_CTRL_RP_VAL_SHIFT     4
  52 #define TCPC_ROLE_CTRL_RP_VAL_MASK      0x3
  53 #define TCPC_ROLE_CTRL_RP_VAL_DEF       0x0
  54 #define TCPC_ROLE_CTRL_RP_VAL_1_5       0x1
  55 #define TCPC_ROLE_CTRL_RP_VAL_3_0       0x2
  56 #define TCPC_ROLE_CTRL_CC2_SHIFT        2
  57 #define TCPC_ROLE_CTRL_CC2_MASK         0x3
  58 #define TCPC_ROLE_CTRL_CC1_SHIFT        0
  59 #define TCPC_ROLE_CTRL_CC1_MASK         0x3
  60 #define TCPC_ROLE_CTRL_CC_RA            0x0
  61 #define TCPC_ROLE_CTRL_CC_RP            0x1
  62 #define TCPC_ROLE_CTRL_CC_RD            0x2
  63 #define TCPC_ROLE_CTRL_CC_OPEN          0x3
  64
  65 #define TCPC_FAULT_CTRL                 0x1b
  66
  67 #define TCPC_POWER_CTRL                 0x1c
  68 #define TCPC_POWER_CTRL_VCONN_ENABLE    BIT(0)
  69
  70 #define TCPC_CC_STATUS                  0x1d
  71 #define TCPC_CC_STATUS_TERM             BIT(4)
  72 #define TCPC_CC_STATUS_CC2_SHIFT        2
  73 #define TCPC_CC_STATUS_CC2_MASK         0x3
  74 #define TCPC_CC_STATUS_CC1_SHIFT        0
  75 #define TCPC_CC_STATUS_CC1_MASK         0x3
  76
  77 #define TCPC_POWER_STATUS               0x1e
  78 #define TCPC_POWER_STATUS_UNINIT        BIT(6)
  79 #define TCPC_POWER_STATUS_VBUS_DET      BIT(3)
  80 #define TCPC_POWER_STATUS_VBUS_PRES     BIT(2)
  81
  82 #define TCPC_FAULT_STATUS               0x1f
  83
  84 #define TCPC_COMMAND                    0x23
  85 #define TCPC_CMD_WAKE_I2C               0x11
  86 #define TCPC_CMD_DISABLE_VBUS_DETECT    0x22
  87 #define TCPC_CMD_ENABLE_VBUS_DETECT     0x33
  88 #define TCPC_CMD_DISABLE_SINK_VBUS      0x44
  89 #define TCPC_CMD_SINK_VBUS              0x55
  90 #define TCPC_CMD_DISABLE_SRC_VBUS       0x66
  91 #define TCPC_CMD_SRC_VBUS_DEFAULT       0x77
  92 #define TCPC_CMD_SRC_VBUS_HIGH          0x88
  93 #define TCPC_CMD_LOOK4CONNECTION        0x99
  94 #define TCPC_CMD_RXONEMORE              0xAA
  95 #define TCPC_CMD_I2C_IDLE               0xFF
  96
  97 #define TCPC_DEV_CAP_1                  0x24
  98 #define TCPC_DEV_CAP_2                  0x26
  99 #define TCPC_STD_INPUT_CAP              0x28
 100 #define TCPC_STD_OUTPUT_CAP             0x29
 101
 102 #define TCPC_MSG_HDR_INFO               0x2e
 103 #define TCPC_MSG_HDR_INFO_DATA_ROLE     BIT(3)
 104 #define TCPC_MSG_HDR_INFO_PWR_ROLE      BIT(0)
 105 #define TCPC_MSG_HDR_INFO_REV_SHIFT     1
 106 #define TCPC_MSG_HDR_INFO_REV_MASK      0x3
 107
 108 #define TCPC_RX_DETECT                  0x2f
 109 #define TCPC_RX_DETECT_HARD_RESET       BIT(5)
 110 #define TCPC_RX_DETECT_SOP              BIT(0)
 111
 112 #define TCPC_RX_BYTE_CNT                0x30
 113 #define TCPC_RX_BUF_FRAME_TYPE          0x31
 114 #define TCPC_RX_HDR                     0x32
 115 #define TCPC_RX_DATA                    0x34 /* through 0x4f */
 116
 117 #define TCPC_TRANSMIT                   0x50
 118 #define TCPC_TRANSMIT_RETRY_SHIFT       4
 119 #define TCPC_TRANSMIT_RETRY_MASK        0x3
 120 #define TCPC_TRANSMIT_TYPE_SHIFT        0
 121 #define TCPC_TRANSMIT_TYPE_MASK         0x7
 122
 123 #define TCPC_TX_BYTE_CNT                0x51
 124 #define TCPC_TX_HDR                     0x52
 125 #define TCPC_TX_DATA                    0x54 /* through 0x6f */
 126
 127 #define TCPC_VBUS_VOLTAGE                       0x70
 128 #define TCPC_VBUS_SINK_DISCONNECT_THRESH        0x72
 129 #define TCPC_VBUS_STOP_DISCHARGE_THRESH         0x74
 130 #define TCPC_VBUS_VOLTAGE_ALARM_HI_CFG          0x76
 131 #define TCPC_VBUS_VOLTAGE_ALARM_LO_CFG          0x78
 132
 133 #endif /* __LINUX_USB_TCPCI_H */