2 * Mediatek 8250 driver.
4 * Copyright (c) 2014 MundoReader S.L.
5 * Author: Matthias Brugger <matthias.bgg@gmail.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 #include <linux/clk.h>
19 #include <linux/module.h>
20 #include <linux/of_irq.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_device.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/serial_8250.h>
25 #include <linux/serial_reg.h>
29 #define UART_MTK_HIGHS 0x09 /* Highspeed register */
30 #define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */
31 #define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */
32 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
41 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
44 struct uart_8250_port *up = up_to_u8250p(port);
46 unsigned int baud, quot;
49 * Store the requested baud rate before calling the generic 8250
50 * set_termios method. Standard 8250 port expects bauds to be
51 * no higher than (uartclk / 16) so the baud will be clamped if it
52 * gets out of that bound. Mediatek 8250 port supports speed
53 * higher than that, therefore we'll get original baud rate back
54 * after calling the generic set_termios method and recalculate
55 * the speed later in this method.
57 baud = tty_termios_baud_rate(termios);
59 serial8250_do_set_termios(port, termios, NULL);
61 tty_termios_encode_baud_rate(termios, baud, baud);
64 * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS)
66 * We need to recalcualte the quot register, as the claculation depends
67 * on the vaule in the highspeed register.
69 * Some baudrates are not supported by the chip, so we use the next
70 * lower rate supported and update termios c_flag.
72 * If highspeed register is set to 3, we need to specify sample count
73 * and sample point to increase accuracy. If not, we reset the
74 * registers to their default values.
76 baud = uart_get_baud_rate(port, termios, old,
77 port->uartclk / 16 / 0xffff,
81 serial_port_out(port, UART_MTK_HIGHS, 0x0);
82 quot = uart_get_divisor(port, baud);
83 } else if (baud <= 576000) {
84 serial_port_out(port, UART_MTK_HIGHS, 0x2);
86 /* Set to next lower baudrate supported */
87 if ((baud == 500000) || (baud == 576000))
89 quot = DIV_ROUND_UP(port->uartclk, 4 * baud);
91 serial_port_out(port, UART_MTK_HIGHS, 0x3);
92 quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
96 * Ok, we're now changing the port state. Do it with
97 * interrupts disabled.
99 spin_lock_irqsave(&port->lock, flags);
102 * Update the per-port timeout.
104 uart_update_timeout(port, termios->c_cflag, baud);
106 /* set DLAB we have cval saved in up->lcr from the call to the core */
107 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
108 serial_dl_write(up, quot);
111 serial_port_out(port, UART_LCR, up->lcr);
116 tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud);
117 serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1);
118 serial_port_out(port, UART_MTK_SAMPLE_POINT,
121 serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00);
122 serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff);
125 spin_unlock_irqrestore(&port->lock, flags);
126 /* Don't rewrite B0 */
127 if (tty_termios_baud_rate(termios))
128 tty_termios_encode_baud_rate(termios, baud, baud);
131 static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
133 struct mtk8250_data *data = dev_get_drvdata(dev);
135 clk_disable_unprepare(data->uart_clk);
136 clk_disable_unprepare(data->bus_clk);
141 static int __maybe_unused mtk8250_runtime_resume(struct device *dev)
143 struct mtk8250_data *data = dev_get_drvdata(dev);
146 err = clk_prepare_enable(data->uart_clk);
148 dev_warn(dev, "Can't enable clock\n");
152 err = clk_prepare_enable(data->bus_clk);
154 dev_warn(dev, "Can't enable bus clock\n");
162 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
165 pm_runtime_get_sync(port->dev);
167 serial8250_do_pm(port, state, old);
170 pm_runtime_put_sync_suspend(port->dev);
173 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
174 struct mtk8250_data *data)
176 data->uart_clk = devm_clk_get(&pdev->dev, "baud");
177 if (IS_ERR(data->uart_clk)) {
179 * For compatibility with older device trees try unnamed
180 * clk when no baud clk can be found.
182 data->uart_clk = devm_clk_get(&pdev->dev, NULL);
183 if (IS_ERR(data->uart_clk)) {
184 dev_warn(&pdev->dev, "Can't get uart clock\n");
185 return PTR_ERR(data->uart_clk);
191 data->bus_clk = devm_clk_get(&pdev->dev, "bus");
192 return PTR_ERR_OR_ZERO(data->bus_clk);
195 static int mtk8250_probe(struct platform_device *pdev)
197 struct uart_8250_port uart = {};
198 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
199 struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
200 struct mtk8250_data *data;
204 dev_err(&pdev->dev, "no registers/irq defined\n");
208 uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
209 resource_size(regs));
210 if (!uart.port.membase)
213 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
217 if (pdev->dev.of_node) {
218 err = mtk8250_probe_of(pdev, &uart.port, data);
224 spin_lock_init(&uart.port.lock);
225 uart.port.mapbase = regs->start;
226 uart.port.irq = irq->start;
227 uart.port.pm = mtk8250_do_pm;
228 uart.port.type = PORT_16550;
229 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
230 uart.port.dev = &pdev->dev;
231 uart.port.iotype = UPIO_MEM32;
232 uart.port.regshift = 2;
233 uart.port.private_data = data;
234 uart.port.set_termios = mtk8250_set_termios;
235 uart.port.uartclk = clk_get_rate(data->uart_clk);
237 /* Disable Rate Fix function */
238 writel(0x0, uart.port.membase +
239 (MTK_UART_RATE_FIX << uart.port.regshift));
241 platform_set_drvdata(pdev, data);
243 err = mtk8250_runtime_resume(&pdev->dev);
247 data->line = serial8250_register_8250_port(&uart);
251 pm_runtime_set_active(&pdev->dev);
252 pm_runtime_enable(&pdev->dev);
257 static int mtk8250_remove(struct platform_device *pdev)
259 struct mtk8250_data *data = platform_get_drvdata(pdev);
261 pm_runtime_get_sync(&pdev->dev);
263 serial8250_unregister_port(data->line);
264 mtk8250_runtime_suspend(&pdev->dev);
266 pm_runtime_disable(&pdev->dev);
267 pm_runtime_put_noidle(&pdev->dev);
272 static int __maybe_unused mtk8250_suspend(struct device *dev)
274 struct mtk8250_data *data = dev_get_drvdata(dev);
276 serial8250_suspend_port(data->line);
281 static int __maybe_unused mtk8250_resume(struct device *dev)
283 struct mtk8250_data *data = dev_get_drvdata(dev);
285 serial8250_resume_port(data->line);
290 static const struct dev_pm_ops mtk8250_pm_ops = {
291 SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
292 SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
296 static const struct of_device_id mtk8250_of_match[] = {
297 { .compatible = "mediatek,mt6577-uart" },
300 MODULE_DEVICE_TABLE(of, mtk8250_of_match);
302 static struct platform_driver mtk8250_platform_driver = {
304 .name = "mt6577-uart",
305 .pm = &mtk8250_pm_ops,
306 .of_match_table = mtk8250_of_match,
308 .probe = mtk8250_probe,
309 .remove = mtk8250_remove,
311 module_platform_driver(mtk8250_platform_driver);
313 #ifdef CONFIG_SERIAL_8250_CONSOLE
314 static int __init early_mtk8250_setup(struct earlycon_device *device,
317 if (!device->port.membase)
320 device->port.iotype = UPIO_MEM32;
322 return early_serial8250_setup(device, NULL);
325 OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
328 MODULE_AUTHOR("Matthias Brugger");
329 MODULE_LICENSE("GPL");
330 MODULE_DESCRIPTION("Mediatek 8250 serial port driver");