GNU Linux-libre 4.19.264-gnu1
[releases.git] / drivers / tty / serial / 8250 / 8250_of.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *  Serial Port driver for Open Firmware platform devices
4  *
5  *    Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
6  */
7 #include <linux/console.h>
8 #include <linux/module.h>
9 #include <linux/slab.h>
10 #include <linux/delay.h>
11 #include <linux/serial_core.h>
12 #include <linux/serial_reg.h>
13 #include <linux/of_address.h>
14 #include <linux/of_irq.h>
15 #include <linux/of_platform.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/clk.h>
18 #include <linux/reset.h>
19
20 #include "8250.h"
21
22 struct of_serial_info {
23         struct clk *clk;
24         struct reset_control *rst;
25         int type;
26         int line;
27 };
28
29 #ifdef CONFIG_ARCH_TEGRA
30 static void tegra_serial_handle_break(struct uart_port *p)
31 {
32         unsigned int status, tmout = 10000;
33
34         do {
35                 status = p->serial_in(p, UART_LSR);
36                 if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
37                         status = p->serial_in(p, UART_RX);
38                 else
39                         break;
40                 if (--tmout == 0)
41                         break;
42                 udelay(1);
43         } while (1);
44 }
45 #else
46 static inline void tegra_serial_handle_break(struct uart_port *port)
47 {
48 }
49 #endif
50
51 /*
52  * Fill a struct uart_port for a given device node
53  */
54 static int of_platform_serial_setup(struct platform_device *ofdev,
55                         int type, struct uart_port *port,
56                         struct of_serial_info *info)
57 {
58         struct resource resource;
59         struct device_node *np = ofdev->dev.of_node;
60         u32 clk, spd, prop;
61         int ret, irq;
62
63         memset(port, 0, sizeof *port);
64
65         pm_runtime_enable(&ofdev->dev);
66         pm_runtime_get_sync(&ofdev->dev);
67
68         if (of_property_read_u32(np, "clock-frequency", &clk)) {
69
70                 /* Get clk rate through clk driver if present */
71                 info->clk = devm_clk_get(&ofdev->dev, NULL);
72                 if (IS_ERR(info->clk)) {
73                         dev_warn(&ofdev->dev,
74                                 "clk or clock-frequency not defined\n");
75                         ret = PTR_ERR(info->clk);
76                         goto err_pmruntime;
77                 }
78
79                 ret = clk_prepare_enable(info->clk);
80                 if (ret < 0)
81                         goto err_pmruntime;
82
83                 clk = clk_get_rate(info->clk);
84         }
85         /* If current-speed was set, then try not to change it. */
86         if (of_property_read_u32(np, "current-speed", &spd) == 0)
87                 port->custom_divisor = clk / (16 * spd);
88
89         ret = of_address_to_resource(np, 0, &resource);
90         if (ret) {
91                 dev_warn(&ofdev->dev, "invalid address\n");
92                 goto err_unprepare;
93         }
94
95         port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT |
96                                   UPF_FIXED_TYPE;
97         spin_lock_init(&port->lock);
98
99         if (resource_type(&resource) == IORESOURCE_IO) {
100                 port->iotype = UPIO_PORT;
101                 port->iobase = resource.start;
102         } else {
103                 port->mapbase = resource.start;
104                 port->mapsize = resource_size(&resource);
105
106                 /* Check for shifted address mapping */
107                 if (of_property_read_u32(np, "reg-offset", &prop) == 0) {
108                         if (prop >= port->mapsize) {
109                                 dev_warn(&ofdev->dev, "reg-offset %u exceeds region size %pa\n",
110                                          prop, &port->mapsize);
111                                 ret = -EINVAL;
112                                 goto err_unprepare;
113                         }
114
115                         port->mapbase += prop;
116                         port->mapsize -= prop;
117                 }
118
119                 port->iotype = UPIO_MEM;
120                 if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
121                         switch (prop) {
122                         case 1:
123                                 port->iotype = UPIO_MEM;
124                                 break;
125                         case 2:
126                                 port->iotype = UPIO_MEM16;
127                                 break;
128                         case 4:
129                                 port->iotype = of_device_is_big_endian(np) ?
130                                                UPIO_MEM32BE : UPIO_MEM32;
131                                 break;
132                         default:
133                                 dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
134                                          prop);
135                                 ret = -EINVAL;
136                                 goto err_unprepare;
137                         }
138                 }
139                 port->flags |= UPF_IOREMAP;
140         }
141
142         /* Compatibility with the deprecated pxa driver and 8250_pxa drivers. */
143         if (of_device_is_compatible(np, "mrvl,mmp-uart"))
144                 port->regshift = 2;
145
146         /* Check for registers offset within the devices address range */
147         if (of_property_read_u32(np, "reg-shift", &prop) == 0)
148                 port->regshift = prop;
149
150         /* Check for fifo size */
151         if (of_property_read_u32(np, "fifo-size", &prop) == 0)
152                 port->fifosize = prop;
153
154         /* Check for a fixed line number */
155         ret = of_alias_get_id(np, "serial");
156         if (ret >= 0)
157                 port->line = ret;
158
159         irq = of_irq_get(np, 0);
160         if (irq < 0) {
161                 if (irq == -EPROBE_DEFER) {
162                         ret = -EPROBE_DEFER;
163                         goto err_unprepare;
164                 }
165                 /* IRQ support not mandatory */
166                 irq = 0;
167         }
168
169         port->irq = irq;
170
171         info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL);
172         if (IS_ERR(info->rst)) {
173                 ret = PTR_ERR(info->rst);
174                 goto err_unprepare;
175         }
176
177         ret = reset_control_deassert(info->rst);
178         if (ret)
179                 goto err_unprepare;
180
181         port->type = type;
182         port->uartclk = clk;
183
184         if (of_property_read_bool(np, "no-loopback-test"))
185                 port->flags |= UPF_SKIP_TEST;
186
187         port->dev = &ofdev->dev;
188
189         switch (type) {
190         case PORT_TEGRA:
191                 port->handle_break = tegra_serial_handle_break;
192                 break;
193
194         case PORT_RT2880:
195                 port->iotype = UPIO_AU;
196                 break;
197         }
198
199         if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) &&
200             (of_device_is_compatible(np, "fsl,ns16550") ||
201              of_device_is_compatible(np, "fsl,16550-FIFO64")))
202                 port->handle_irq = fsl8250_handle_irq;
203
204         return 0;
205 err_unprepare:
206         clk_disable_unprepare(info->clk);
207 err_pmruntime:
208         pm_runtime_put_sync(&ofdev->dev);
209         pm_runtime_disable(&ofdev->dev);
210         return ret;
211 }
212
213 /*
214  * Try to register a serial port
215  */
216 static const struct of_device_id of_platform_serial_table[];
217 static int of_platform_serial_probe(struct platform_device *ofdev)
218 {
219         const struct of_device_id *match;
220         struct of_serial_info *info;
221         struct uart_8250_port port8250;
222         u32 tx_threshold;
223         int port_type;
224         int ret;
225
226         match = of_match_device(of_platform_serial_table, &ofdev->dev);
227         if (!match)
228                 return -EINVAL;
229
230         if (of_property_read_bool(ofdev->dev.of_node, "used-by-rtas"))
231                 return -EBUSY;
232
233         info = kzalloc(sizeof(*info), GFP_KERNEL);
234         if (info == NULL)
235                 return -ENOMEM;
236
237         port_type = (unsigned long)match->data;
238         memset(&port8250, 0, sizeof(port8250));
239         ret = of_platform_serial_setup(ofdev, port_type, &port8250.port, info);
240         if (ret)
241                 goto err_free;
242
243         if (port8250.port.fifosize)
244                 port8250.capabilities = UART_CAP_FIFO;
245
246         /* Check for TX FIFO threshold & set tx_loadsz */
247         if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold",
248                                   &tx_threshold) == 0) &&
249             (tx_threshold < port8250.port.fifosize))
250                 port8250.tx_loadsz = port8250.port.fifosize - tx_threshold;
251
252         if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control"))
253                 port8250.capabilities |= UART_CAP_AFE;
254
255         if (of_property_read_u32(ofdev->dev.of_node,
256                         "overrun-throttle-ms",
257                         &port8250.overrun_backoff_time_ms) != 0)
258                 port8250.overrun_backoff_time_ms = 0;
259
260         ret = serial8250_register_8250_port(&port8250);
261         if (ret < 0)
262                 goto err_dispose;
263
264         info->type = port_type;
265         info->line = ret;
266         platform_set_drvdata(ofdev, info);
267         return 0;
268 err_dispose:
269         irq_dispose_mapping(port8250.port.irq);
270         pm_runtime_put_sync(&ofdev->dev);
271         pm_runtime_disable(&ofdev->dev);
272         clk_disable_unprepare(info->clk);
273 err_free:
274         kfree(info);
275         return ret;
276 }
277
278 /*
279  * Release a line
280  */
281 static int of_platform_serial_remove(struct platform_device *ofdev)
282 {
283         struct of_serial_info *info = platform_get_drvdata(ofdev);
284
285         serial8250_unregister_port(info->line);
286
287         reset_control_assert(info->rst);
288         pm_runtime_put_sync(&ofdev->dev);
289         pm_runtime_disable(&ofdev->dev);
290         clk_disable_unprepare(info->clk);
291         kfree(info);
292         return 0;
293 }
294
295 #ifdef CONFIG_PM_SLEEP
296 static int of_serial_suspend(struct device *dev)
297 {
298         struct of_serial_info *info = dev_get_drvdata(dev);
299         struct uart_8250_port *port8250 = serial8250_get_port(info->line);
300         struct uart_port *port = &port8250->port;
301
302         serial8250_suspend_port(info->line);
303
304         if (!uart_console(port) || console_suspend_enabled) {
305                 pm_runtime_put_sync(dev);
306                 clk_disable_unprepare(info->clk);
307         }
308         return 0;
309 }
310
311 static int of_serial_resume(struct device *dev)
312 {
313         struct of_serial_info *info = dev_get_drvdata(dev);
314         struct uart_8250_port *port8250 = serial8250_get_port(info->line);
315         struct uart_port *port = &port8250->port;
316
317         if (!uart_console(port) || console_suspend_enabled) {
318                 pm_runtime_get_sync(dev);
319                 clk_prepare_enable(info->clk);
320         }
321
322         serial8250_resume_port(info->line);
323
324         return 0;
325 }
326 #endif
327 static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
328
329 /*
330  * A few common types, add more as needed.
331  */
332 static const struct of_device_id of_platform_serial_table[] = {
333         { .compatible = "ns8250",   .data = (void *)PORT_8250, },
334         { .compatible = "ns16450",  .data = (void *)PORT_16450, },
335         { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
336         { .compatible = "ns16550",  .data = (void *)PORT_16550, },
337         { .compatible = "ns16750",  .data = (void *)PORT_16750, },
338         { .compatible = "ns16850",  .data = (void *)PORT_16850, },
339         { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
340         { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
341         { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
342         { .compatible = "altr,16550-FIFO32",
343                 .data = (void *)PORT_ALTR_16550_F32, },
344         { .compatible = "altr,16550-FIFO64",
345                 .data = (void *)PORT_ALTR_16550_F64, },
346         { .compatible = "altr,16550-FIFO128",
347                 .data = (void *)PORT_ALTR_16550_F128, },
348         { .compatible = "mediatek,mtk-btif",
349                 .data = (void *)PORT_MTK_BTIF, },
350         { .compatible = "mrvl,mmp-uart",
351                 .data = (void *)PORT_XSCALE, },
352         { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, },
353         { .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, },
354         { /* end of list */ },
355 };
356 MODULE_DEVICE_TABLE(of, of_platform_serial_table);
357
358 static struct platform_driver of_platform_serial_driver = {
359         .driver = {
360                 .name = "of_serial",
361                 .of_match_table = of_platform_serial_table,
362                 .pm = &of_serial_pm_ops,
363         },
364         .probe = of_platform_serial_probe,
365         .remove = of_platform_serial_remove,
366 };
367
368 module_platform_driver(of_platform_serial_driver);
369
370 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
371 MODULE_LICENSE("GPL");
372 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");