drivers/usb/dwc3/ulpi.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /**
   3  * ulpi.c - DesignWare USB3 Controller's ULPI PHY interface
   4  *
   5  * Copyright (C) 2015 Intel Corporation
   6  *
   7  * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
   8  */
   9
  10 #include <linux/delay.h>
  11 #include <linux/time64.h>
  12 #include <linux/ulpi/regs.h>
  13
  14 #include "core.h"
  15 #include "io.h"
  16
  17 #define DWC3_ULPI_ADDR(a) \
  18                 ((a >= ULPI_EXT_VENDOR_SPECIFIC) ? \
  19                 DWC3_GUSB2PHYACC_ADDR(ULPI_ACCESS_EXTENDED) | \
  20                 DWC3_GUSB2PHYACC_EXTEND_ADDR(a) : DWC3_GUSB2PHYACC_ADDR(a))
  21
  22 #define DWC3_ULPI_BASE_DELAY    DIV_ROUND_UP(NSEC_PER_SEC, 60000000L)
  23
  24 static int dwc3_ulpi_busyloop(struct dwc3 *dwc, u8 addr, bool read)
  25 {
  26         unsigned long ns = 5L * DWC3_ULPI_BASE_DELAY;
  27         unsigned int count = 1000;
  28         u32 reg;
  29
  30         if (addr >= ULPI_EXT_VENDOR_SPECIFIC)
  31                 ns += DWC3_ULPI_BASE_DELAY;
  32
  33         if (read)
  34                 ns += DWC3_ULPI_BASE_DELAY;
  35
  36         while (count--) {
  37                 ndelay(ns);
  38                 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
  39                 if (reg & DWC3_GUSB2PHYACC_DONE)
  40                         return 0;
  41                 cpu_relax();
  42         }
  43
  44         return -ETIMEDOUT;
  45 }
  46
  47 static int dwc3_ulpi_read(struct device *dev, u8 addr)
  48 {
  49         struct dwc3 *dwc = dev_get_drvdata(dev);
  50         u32 reg;
  51         int ret;
  52
  53         reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
  54         if (reg & DWC3_GUSB2PHYCFG_SUSPHY) {
  55                 reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
  56                 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
  57         }
  58
  59         reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
  60         dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
  61
  62         ret = dwc3_ulpi_busyloop(dwc, addr, true);
  63         if (ret)
  64                 return ret;
  65
  66         reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
  67
  68         return DWC3_GUSB2PHYACC_DATA(reg);
  69 }
  70
  71 static int dwc3_ulpi_write(struct device *dev, u8 addr, u8 val)
  72 {
  73         struct dwc3 *dwc = dev_get_drvdata(dev);
  74         u32 reg;
  75
  76         reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
  77         if (reg & DWC3_GUSB2PHYCFG_SUSPHY) {
  78                 reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
  79                 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
  80         }
  81
  82         reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
  83         reg |= DWC3_GUSB2PHYACC_WRITE | val;
  84         dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
  85
  86         return dwc3_ulpi_busyloop(dwc, addr, false);
  87 }
  88
  89 static const struct ulpi_ops dwc3_ulpi_ops = {
  90         .read = dwc3_ulpi_read,
  91         .write = dwc3_ulpi_write,
  92 };
  93
  94 int dwc3_ulpi_init(struct dwc3 *dwc)
  95 {
  96         /* Register the interface */
  97         dwc->ulpi = ulpi_register_interface(dwc->dev, &dwc3_ulpi_ops);
  98         if (IS_ERR(dwc->ulpi)) {
  99                 dev_err(dwc->dev, "failed to register ULPI interface");
 100                 return PTR_ERR(dwc->ulpi);
 101         }
 102
 103         return 0;
 104 }
 105
 106 void dwc3_ulpi_exit(struct dwc3 *dwc)
 107 {
 108         if (dwc->ulpi) {
 109                 ulpi_unregister_interface(dwc->ulpi);
 110                 dwc->ulpi = NULL;
 111         }
 112 }