drivers/usb/gadget/udc/atmel_usba_udc.c

   1 /*
   2  * Driver for the Atmel USBA high speed USB device controller
   3  *
   4  * Copyright (C) 2005-2007 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/clk.h>
  11 #include <linux/clk/at91_pmc.h>
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/io.h>
  16 #include <linux/slab.h>
  17 #include <linux/device.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/list.h>
  20 #include <linux/mfd/syscon.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/regmap.h>
  23 #include <linux/ctype.h>
  24 #include <linux/usb/ch9.h>
  25 #include <linux/usb/gadget.h>
  26 #include <linux/usb/atmel_usba_udc.h>
  27 #include <linux/delay.h>
  28 #include <linux/of.h>
  29 #include <linux/of_gpio.h>
  30
  31 #include "atmel_usba_udc.h"
  32 #define USBA_VBUS_IRQFLAGS (IRQF_ONESHOT \
  33                            | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING)
  34
  35 #ifdef CONFIG_USB_GADGET_DEBUG_FS
  36 #include <linux/debugfs.h>
  37 #include <linux/uaccess.h>
  38
  39 static int queue_dbg_open(struct inode *inode, struct file *file)
  40 {
  41         struct usba_ep *ep = inode->i_private;
  42         struct usba_request *req, *req_copy;
  43         struct list_head *queue_data;
  44
  45         queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
  46         if (!queue_data)
  47                 return -ENOMEM;
  48         INIT_LIST_HEAD(queue_data);
  49
  50         spin_lock_irq(&ep->udc->lock);
  51         list_for_each_entry(req, &ep->queue, queue) {
  52                 req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
  53                 if (!req_copy)
  54                         goto fail;
  55                 list_add_tail(&req_copy->queue, queue_data);
  56         }
  57         spin_unlock_irq(&ep->udc->lock);
  58
  59         file->private_data = queue_data;
  60         return 0;
  61
  62 fail:
  63         spin_unlock_irq(&ep->udc->lock);
  64         list_for_each_entry_safe(req, req_copy, queue_data, queue) {
  65                 list_del(&req->queue);
  66                 kfree(req);
  67         }
  68         kfree(queue_data);
  69         return -ENOMEM;
  70 }
  71
  72 /*
  73  * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
  74  *
  75  * b: buffer address
  76  * l: buffer length
  77  * I/i: interrupt/no interrupt
  78  * Z/z: zero/no zero
  79  * S/s: short ok/short not ok
  80  * s: status
  81  * n: nr_packets
  82  * F/f: submitted/not submitted to FIFO
  83  * D/d: using/not using DMA
  84  * L/l: last transaction/not last transaction
  85  */
  86 static ssize_t queue_dbg_read(struct file *file, char __user *buf,
  87                 size_t nbytes, loff_t *ppos)
  88 {
  89         struct list_head *queue = file->private_data;
  90         struct usba_request *req, *tmp_req;
  91         size_t len, remaining, actual = 0;
  92         char tmpbuf[38];
  93
  94         if (!access_ok(VERIFY_WRITE, buf, nbytes))
  95                 return -EFAULT;
  96
  97         inode_lock(file_inode(file));
  98         list_for_each_entry_safe(req, tmp_req, queue, queue) {
  99                 len = snprintf(tmpbuf, sizeof(tmpbuf),
 100                                 "%8p %08x %c%c%c %5d %c%c%c\n",
 101                                 req->req.buf, req->req.length,
 102                                 req->req.no_interrupt ? 'i' : 'I',
 103                                 req->req.zero ? 'Z' : 'z',
 104                                 req->req.short_not_ok ? 's' : 'S',
 105                                 req->req.status,
 106                                 req->submitted ? 'F' : 'f',
 107                                 req->using_dma ? 'D' : 'd',
 108                                 req->last_transaction ? 'L' : 'l');
 109                 len = min(len, sizeof(tmpbuf));
 110                 if (len > nbytes)
 111                         break;
 112
 113                 list_del(&req->queue);
 114                 kfree(req);
 115
 116                 remaining = __copy_to_user(buf, tmpbuf, len);
 117                 actual += len - remaining;
 118                 if (remaining)
 119                         break;
 120
 121                 nbytes -= len;
 122                 buf += len;
 123         }
 124         inode_unlock(file_inode(file));
 125
 126         return actual;
 127 }
 128
 129 static int queue_dbg_release(struct inode *inode, struct file *file)
 130 {
 131         struct list_head *queue_data = file->private_data;
 132         struct usba_request *req, *tmp_req;
 133
 134         list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
 135                 list_del(&req->queue);
 136                 kfree(req);
 137         }
 138         kfree(queue_data);
 139         return 0;
 140 }
 141
 142 static int regs_dbg_open(struct inode *inode, struct file *file)
 143 {
 144         struct usba_udc *udc;
 145         unsigned int i;
 146         u32 *data;
 147         int ret = -ENOMEM;
 148
 149         inode_lock(inode);
 150         udc = inode->i_private;
 151         data = kmalloc(inode->i_size, GFP_KERNEL);
 152         if (!data)
 153                 goto out;
 154
 155         spin_lock_irq(&udc->lock);
 156         for (i = 0; i < inode->i_size / 4; i++)
 157                 data[i] = readl_relaxed(udc->regs + i * 4);
 158         spin_unlock_irq(&udc->lock);
 159
 160         file->private_data = data;
 161         ret = 0;
 162
 163 out:
 164         inode_unlock(inode);
 165
 166         return ret;
 167 }
 168
 169 static ssize_t regs_dbg_read(struct file *file, char __user *buf,
 170                 size_t nbytes, loff_t *ppos)
 171 {
 172         struct inode *inode = file_inode(file);
 173         int ret;
 174
 175         inode_lock(inode);
 176         ret = simple_read_from_buffer(buf, nbytes, ppos,
 177                         file->private_data,
 178                         file_inode(file)->i_size);
 179         inode_unlock(inode);
 180
 181         return ret;
 182 }
 183
 184 static int regs_dbg_release(struct inode *inode, struct file *file)
 185 {
 186         kfree(file->private_data);
 187         return 0;
 188 }
 189
 190 const struct file_operations queue_dbg_fops = {
 191         .owner          = THIS_MODULE,
 192         .open           = queue_dbg_open,
 193         .llseek         = no_llseek,
 194         .read           = queue_dbg_read,
 195         .release        = queue_dbg_release,
 196 };
 197
 198 const struct file_operations regs_dbg_fops = {
 199         .owner          = THIS_MODULE,
 200         .open           = regs_dbg_open,
 201         .llseek         = generic_file_llseek,
 202         .read           = regs_dbg_read,
 203         .release        = regs_dbg_release,
 204 };
 205
 206 static void usba_ep_init_debugfs(struct usba_udc *udc,
 207                 struct usba_ep *ep)
 208 {
 209         struct dentry *ep_root;
 210
 211         ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
 212         if (!ep_root)
 213                 goto err_root;
 214         ep->debugfs_dir = ep_root;
 215
 216         ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
 217                                                 ep, &queue_dbg_fops);
 218         if (!ep->debugfs_queue)
 219                 goto err_queue;
 220
 221         if (ep->can_dma) {
 222                 ep->debugfs_dma_status
 223                         = debugfs_create_u32("dma_status", 0400, ep_root,
 224                                         &ep->last_dma_status);
 225                 if (!ep->debugfs_dma_status)
 226                         goto err_dma_status;
 227         }
 228         if (ep_is_control(ep)) {
 229                 ep->debugfs_state
 230                         = debugfs_create_u32("state", 0400, ep_root,
 231                                         &ep->state);
 232                 if (!ep->debugfs_state)
 233                         goto err_state;
 234         }
 235
 236         return;
 237
 238 err_state:
 239         if (ep->can_dma)
 240                 debugfs_remove(ep->debugfs_dma_status);
 241 err_dma_status:
 242         debugfs_remove(ep->debugfs_queue);
 243 err_queue:
 244         debugfs_remove(ep_root);
 245 err_root:
 246         dev_err(&ep->udc->pdev->dev,
 247                 "failed to create debugfs directory for %s\n", ep->ep.name);
 248 }
 249
 250 static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
 251 {
 252         debugfs_remove(ep->debugfs_queue);
 253         debugfs_remove(ep->debugfs_dma_status);
 254         debugfs_remove(ep->debugfs_state);
 255         debugfs_remove(ep->debugfs_dir);
 256         ep->debugfs_dma_status = NULL;
 257         ep->debugfs_dir = NULL;
 258 }
 259
 260 static void usba_init_debugfs(struct usba_udc *udc)
 261 {
 262         struct dentry *root, *regs;
 263         struct resource *regs_resource;
 264
 265         root = debugfs_create_dir(udc->gadget.name, NULL);
 266         if (IS_ERR(root) || !root)
 267                 goto err_root;
 268         udc->debugfs_root = root;
 269
 270         regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
 271                                 CTRL_IOMEM_ID);
 272
 273         if (regs_resource) {
 274                 regs = debugfs_create_file_size("regs", 0400, root, udc,
 275                                                 &regs_dbg_fops,
 276                                                 resource_size(regs_resource));
 277                 if (!regs)
 278                         goto err_regs;
 279                 udc->debugfs_regs = regs;
 280         }
 281
 282         usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
 283
 284         return;
 285
 286 err_regs:
 287         debugfs_remove(root);
 288 err_root:
 289         udc->debugfs_root = NULL;
 290         dev_err(&udc->pdev->dev, "debugfs is not available\n");
 291 }
 292
 293 static void usba_cleanup_debugfs(struct usba_udc *udc)
 294 {
 295         usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
 296         debugfs_remove(udc->debugfs_regs);
 297         debugfs_remove(udc->debugfs_root);
 298         udc->debugfs_regs = NULL;
 299         udc->debugfs_root = NULL;
 300 }
 301 #else
 302 static inline void usba_ep_init_debugfs(struct usba_udc *udc,
 303                                          struct usba_ep *ep)
 304 {
 305
 306 }
 307
 308 static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
 309 {
 310
 311 }
 312
 313 static inline void usba_init_debugfs(struct usba_udc *udc)
 314 {
 315
 316 }
 317
 318 static inline void usba_cleanup_debugfs(struct usba_udc *udc)
 319 {
 320
 321 }
 322 #endif
 323
 324 static ushort fifo_mode;
 325
 326 module_param(fifo_mode, ushort, 0x0);
 327 MODULE_PARM_DESC(fifo_mode, "Endpoint configuration mode");
 328
 329 /* mode 0 - uses autoconfig */
 330
 331 /* mode 1 - fits in 8KB, generic max fifo configuration */
 332 static struct usba_fifo_cfg mode_1_cfg[] = {
 333 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 334 { .hw_ep_num = 1, .fifo_size = 1024,    .nr_banks = 2, },
 335 { .hw_ep_num = 2, .fifo_size = 1024,    .nr_banks = 1, },
 336 { .hw_ep_num = 3, .fifo_size = 1024,    .nr_banks = 1, },
 337 { .hw_ep_num = 4, .fifo_size = 1024,    .nr_banks = 1, },
 338 { .hw_ep_num = 5, .fifo_size = 1024,    .nr_banks = 1, },
 339 { .hw_ep_num = 6, .fifo_size = 1024,    .nr_banks = 1, },
 340 };
 341
 342 /* mode 2 - fits in 8KB, performance max fifo configuration */
 343 static struct usba_fifo_cfg mode_2_cfg[] = {
 344 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 345 { .hw_ep_num = 1, .fifo_size = 1024,    .nr_banks = 3, },
 346 { .hw_ep_num = 2, .fifo_size = 1024,    .nr_banks = 2, },
 347 { .hw_ep_num = 3, .fifo_size = 1024,    .nr_banks = 2, },
 348 };
 349
 350 /* mode 3 - fits in 8KB, mixed fifo configuration */
 351 static struct usba_fifo_cfg mode_3_cfg[] = {
 352 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 353 { .hw_ep_num = 1, .fifo_size = 1024,    .nr_banks = 2, },
 354 { .hw_ep_num = 2, .fifo_size = 512,     .nr_banks = 2, },
 355 { .hw_ep_num = 3, .fifo_size = 512,     .nr_banks = 2, },
 356 { .hw_ep_num = 4, .fifo_size = 512,     .nr_banks = 2, },
 357 { .hw_ep_num = 5, .fifo_size = 512,     .nr_banks = 2, },
 358 { .hw_ep_num = 6, .fifo_size = 512,     .nr_banks = 2, },
 359 };
 360
 361 /* mode 4 - fits in 8KB, custom fifo configuration */
 362 static struct usba_fifo_cfg mode_4_cfg[] = {
 363 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 364 { .hw_ep_num = 1, .fifo_size = 512,     .nr_banks = 2, },
 365 { .hw_ep_num = 2, .fifo_size = 512,     .nr_banks = 2, },
 366 { .hw_ep_num = 3, .fifo_size = 8,       .nr_banks = 2, },
 367 { .hw_ep_num = 4, .fifo_size = 512,     .nr_banks = 2, },
 368 { .hw_ep_num = 5, .fifo_size = 512,     .nr_banks = 2, },
 369 { .hw_ep_num = 6, .fifo_size = 16,      .nr_banks = 2, },
 370 { .hw_ep_num = 7, .fifo_size = 8,       .nr_banks = 2, },
 371 { .hw_ep_num = 8, .fifo_size = 8,       .nr_banks = 2, },
 372 };
 373 /* Add additional configurations here */
 374
 375 static int usba_config_fifo_table(struct usba_udc *udc)
 376 {
 377         int n;
 378
 379         switch (fifo_mode) {
 380         default:
 381                 fifo_mode = 0;
 382         case 0:
 383                 udc->fifo_cfg = NULL;
 384                 n = 0;
 385                 break;
 386         case 1:
 387                 udc->fifo_cfg = mode_1_cfg;
 388                 n = ARRAY_SIZE(mode_1_cfg);
 389                 break;
 390         case 2:
 391                 udc->fifo_cfg = mode_2_cfg;
 392                 n = ARRAY_SIZE(mode_2_cfg);
 393                 break;
 394         case 3:
 395                 udc->fifo_cfg = mode_3_cfg;
 396                 n = ARRAY_SIZE(mode_3_cfg);
 397                 break;
 398         case 4:
 399                 udc->fifo_cfg = mode_4_cfg;
 400                 n = ARRAY_SIZE(mode_4_cfg);
 401                 break;
 402         }
 403         DBG(DBG_HW, "Setup fifo_mode %d\n", fifo_mode);
 404
 405         return n;
 406 }
 407
 408 static inline u32 usba_int_enb_get(struct usba_udc *udc)
 409 {
 410         return udc->int_enb_cache;
 411 }
 412
 413 static inline void usba_int_enb_set(struct usba_udc *udc, u32 val)
 414 {
 415         usba_writel(udc, INT_ENB, val);
 416         udc->int_enb_cache = val;
 417 }
 418
 419 static int vbus_is_present(struct usba_udc *udc)
 420 {
 421         if (gpio_is_valid(udc->vbus_pin))
 422                 return gpio_get_value(udc->vbus_pin) ^ udc->vbus_pin_inverted;
 423
 424         /* No Vbus detection: Assume always present */
 425         return 1;
 426 }
 427
 428 static void toggle_bias(struct usba_udc *udc, int is_on)
 429 {
 430         if (udc->errata && udc->errata->toggle_bias)
 431                 udc->errata->toggle_bias(udc, is_on);
 432 }
 433
 434 static void generate_bias_pulse(struct usba_udc *udc)
 435 {
 436         if (!udc->bias_pulse_needed)
 437                 return;
 438
 439         if (udc->errata && udc->errata->pulse_bias)
 440                 udc->errata->pulse_bias(udc);
 441
 442         udc->bias_pulse_needed = false;
 443 }
 444
 445 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
 446 {
 447         unsigned int transaction_len;
 448
 449         transaction_len = req->req.length - req->req.actual;
 450         req->last_transaction = 1;
 451         if (transaction_len > ep->ep.maxpacket) {
 452                 transaction_len = ep->ep.maxpacket;
 453                 req->last_transaction = 0;
 454         } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
 455                 req->last_transaction = 0;
 456
 457         DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
 458                 ep->ep.name, req, transaction_len,
 459                 req->last_transaction ? ", done" : "");
 460
 461         memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
 462         usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
 463         req->req.actual += transaction_len;
 464 }
 465
 466 static void submit_request(struct usba_ep *ep, struct usba_request *req)
 467 {
 468         DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
 469                 ep->ep.name, req, req->req.length);
 470
 471         req->req.actual = 0;
 472         req->submitted = 1;
 473
 474         if (req->using_dma) {
 475                 if (req->req.length == 0) {
 476                         usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
 477                         return;
 478                 }
 479
 480                 if (req->req.zero)
 481                         usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
 482                 else
 483                         usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
 484
 485                 usba_dma_writel(ep, ADDRESS, req->req.dma);
 486                 usba_dma_writel(ep, CONTROL, req->ctrl);
 487         } else {
 488                 next_fifo_transaction(ep, req);
 489                 if (req->last_transaction) {
 490                         usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
 491                         if (ep_is_control(ep))
 492                                 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
 493                 } else {
 494                         if (ep_is_control(ep))
 495                                 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
 496                         usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
 497                 }
 498         }
 499 }
 500
 501 static void submit_next_request(struct usba_ep *ep)
 502 {
 503         struct usba_request *req;
 504
 505         if (list_empty(&ep->queue)) {
 506                 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
 507                 return;
 508         }
 509
 510         req = list_entry(ep->queue.next, struct usba_request, queue);
 511         if (!req->submitted)
 512                 submit_request(ep, req);
 513 }
 514
 515 static void send_status(struct usba_udc *udc, struct usba_ep *ep)
 516 {
 517         ep->state = STATUS_STAGE_IN;
 518         usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
 519         usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
 520 }
 521
 522 static void receive_data(struct usba_ep *ep)
 523 {
 524         struct usba_udc *udc = ep->udc;
 525         struct usba_request *req;
 526         unsigned long status;
 527         unsigned int bytecount, nr_busy;
 528         int is_complete = 0;
 529
 530         status = usba_ep_readl(ep, STA);
 531         nr_busy = USBA_BFEXT(BUSY_BANKS, status);
 532
 533         DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
 534
 535         while (nr_busy > 0) {
 536                 if (list_empty(&ep->queue)) {
 537                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
 538                         break;
 539                 }
 540                 req = list_entry(ep->queue.next,
 541                                  struct usba_request, queue);
 542
 543                 bytecount = USBA_BFEXT(BYTE_COUNT, status);
 544
 545                 if (status & (1 << 31))
 546                         is_complete = 1;
 547                 if (req->req.actual + bytecount >= req->req.length) {
 548                         is_complete = 1;
 549                         bytecount = req->req.length - req->req.actual;
 550                 }
 551
 552                 memcpy_fromio(req->req.buf + req->req.actual,
 553                                 ep->fifo, bytecount);
 554                 req->req.actual += bytecount;
 555
 556                 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
 557
 558                 if (is_complete) {
 559                         DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
 560                         req->req.status = 0;
 561                         list_del_init(&req->queue);
 562                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
 563                         spin_unlock(&udc->lock);
 564                         usb_gadget_giveback_request(&ep->ep, &req->req);
 565                         spin_lock(&udc->lock);
 566                 }
 567
 568                 status = usba_ep_readl(ep, STA);
 569                 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
 570
 571                 if (is_complete && ep_is_control(ep)) {
 572                         send_status(udc, ep);
 573                         break;
 574                 }
 575         }
 576 }
 577
 578 static void
 579 request_complete(struct usba_ep *ep, struct usba_request *req, int status)
 580 {
 581         struct usba_udc *udc = ep->udc;
 582
 583         WARN_ON(!list_empty(&req->queue));
 584
 585         if (req->req.status == -EINPROGRESS)
 586                 req->req.status = status;
 587
 588         if (req->using_dma)
 589                 usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
 590
 591         DBG(DBG_GADGET | DBG_REQ,
 592                 "%s: req %p complete: status %d, actual %u\n",
 593                 ep->ep.name, req, req->req.status, req->req.actual);
 594
 595         spin_unlock(&udc->lock);
 596         usb_gadget_giveback_request(&ep->ep, &req->req);
 597         spin_lock(&udc->lock);
 598 }
 599
 600 static void
 601 request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
 602 {
 603         struct usba_request *req, *tmp_req;
 604
 605         list_for_each_entry_safe(req, tmp_req, list, queue) {
 606                 list_del_init(&req->queue);
 607                 request_complete(ep, req, status);
 608         }
 609 }
 610
 611 static int
 612 usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
 613 {
 614         struct usba_ep *ep = to_usba_ep(_ep);
 615         struct usba_udc *udc = ep->udc;
 616         unsigned long flags, maxpacket;
 617         unsigned int nr_trans;
 618
 619         DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
 620
 621         maxpacket = usb_endpoint_maxp(desc);
 622
 623         if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
 624                         || ep->index == 0
 625                         || desc->bDescriptorType != USB_DT_ENDPOINT
 626                         || maxpacket == 0
 627                         || maxpacket > ep->fifo_size) {
 628                 DBG(DBG_ERR, "ep_enable: Invalid argument");
 629                 return -EINVAL;
 630         }
 631
 632         ep->is_isoc = 0;
 633         ep->is_in = 0;
 634
 635         DBG(DBG_ERR, "%s: EPT_CFG = 0x%lx (maxpacket = %lu)\n",
 636                         ep->ep.name, ep->ept_cfg, maxpacket);
 637
 638         if (usb_endpoint_dir_in(desc)) {
 639                 ep->is_in = 1;
 640                 ep->ept_cfg |= USBA_EPT_DIR_IN;
 641         }
 642
 643         switch (usb_endpoint_type(desc)) {
 644         case USB_ENDPOINT_XFER_CONTROL:
 645                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
 646                 break;
 647         case USB_ENDPOINT_XFER_ISOC:
 648                 if (!ep->can_isoc) {
 649                         DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
 650                                         ep->ep.name);
 651                         return -EINVAL;
 652                 }
 653
 654                 /*
 655                  * Bits 11:12 specify number of _additional_
 656                  * transactions per microframe.
 657                  */
 658                 nr_trans = usb_endpoint_maxp_mult(desc);
 659                 if (nr_trans > 3)
 660                         return -EINVAL;
 661
 662                 ep->is_isoc = 1;
 663                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
 664                 ep->ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
 665
 666                 break;
 667         case USB_ENDPOINT_XFER_BULK:
 668                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
 669                 break;
 670         case USB_ENDPOINT_XFER_INT:
 671                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
 672                 break;
 673         }
 674
 675         spin_lock_irqsave(&ep->udc->lock, flags);
 676
 677         ep->ep.desc = desc;
 678         ep->ep.maxpacket = maxpacket;
 679
 680         usba_ep_writel(ep, CFG, ep->ept_cfg);
 681         usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
 682
 683         if (ep->can_dma) {
 684                 u32 ctrl;
 685
 686                 usba_int_enb_set(udc, usba_int_enb_get(udc) |
 687                                       USBA_BF(EPT_INT, 1 << ep->index) |
 688                                       USBA_BF(DMA_INT, 1 << ep->index));
 689                 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
 690                 usba_ep_writel(ep, CTL_ENB, ctrl);
 691         } else {
 692                 usba_int_enb_set(udc, usba_int_enb_get(udc) |
 693                                       USBA_BF(EPT_INT, 1 << ep->index));
 694         }
 695
 696         spin_unlock_irqrestore(&udc->lock, flags);
 697
 698         DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
 699                         (unsigned long)usba_ep_readl(ep, CFG));
 700         DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
 701                         (unsigned long)usba_int_enb_get(udc));
 702
 703         return 0;
 704 }
 705
 706 static int usba_ep_disable(struct usb_ep *_ep)
 707 {
 708         struct usba_ep *ep = to_usba_ep(_ep);
 709         struct usba_udc *udc = ep->udc;
 710         LIST_HEAD(req_list);
 711         unsigned long flags;
 712
 713         DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
 714
 715         spin_lock_irqsave(&udc->lock, flags);
 716
 717         if (!ep->ep.desc) {
 718                 spin_unlock_irqrestore(&udc->lock, flags);
 719                 /* REVISIT because this driver disables endpoints in
 720                  * reset_all_endpoints() before calling disconnect(),
 721                  * most gadget drivers would trigger this non-error ...
 722                  */
 723                 if (udc->gadget.speed != USB_SPEED_UNKNOWN)
 724                         DBG(DBG_ERR, "ep_disable: %s not enabled\n",
 725                                         ep->ep.name);
 726                 return -EINVAL;
 727         }
 728         ep->ep.desc = NULL;
 729
 730         list_splice_init(&ep->queue, &req_list);
 731         if (ep->can_dma) {
 732                 usba_dma_writel(ep, CONTROL, 0);
 733                 usba_dma_writel(ep, ADDRESS, 0);
 734                 usba_dma_readl(ep, STATUS);
 735         }
 736         usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
 737         usba_int_enb_set(udc, usba_int_enb_get(udc) &
 738                               ~USBA_BF(EPT_INT, 1 << ep->index));
 739
 740         request_complete_list(ep, &req_list, -ESHUTDOWN);
 741
 742         spin_unlock_irqrestore(&udc->lock, flags);
 743
 744         return 0;
 745 }
 746
 747 static struct usb_request *
 748 usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
 749 {
 750         struct usba_request *req;
 751
 752         DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
 753
 754         req = kzalloc(sizeof(*req), gfp_flags);
 755         if (!req)
 756                 return NULL;
 757
 758         INIT_LIST_HEAD(&req->queue);
 759
 760         return &req->req;
 761 }
 762
 763 static void
 764 usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
 765 {
 766         struct usba_request *req = to_usba_req(_req);
 767
 768         DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
 769
 770         kfree(req);
 771 }
 772
 773 static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
 774                 struct usba_request *req, gfp_t gfp_flags)
 775 {
 776         unsigned long flags;
 777         int ret;
 778
 779         DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n",
 780                 ep->ep.name, req->req.length, &req->req.dma,
 781                 req->req.zero ? 'Z' : 'z',
 782                 req->req.short_not_ok ? 'S' : 's',
 783                 req->req.no_interrupt ? 'I' : 'i');
 784
 785         if (req->req.length > 0x10000) {
 786                 /* Lengths from 0 to 65536 (inclusive) are supported */
 787                 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
 788                 return -EINVAL;
 789         }
 790
 791         ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
 792         if (ret)
 793                 return ret;
 794
 795         req->using_dma = 1;
 796         req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
 797                         | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
 798                         | USBA_DMA_END_BUF_EN;
 799
 800         if (!ep->is_in)
 801                 req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
 802
 803         /*
 804          * Add this request to the queue and submit for DMA if
 805          * possible. Check if we're still alive first -- we may have
 806          * received a reset since last time we checked.
 807          */
 808         ret = -ESHUTDOWN;
 809         spin_lock_irqsave(&udc->lock, flags);
 810         if (ep->ep.desc) {
 811                 if (list_empty(&ep->queue))
 812                         submit_request(ep, req);
 813
 814                 list_add_tail(&req->queue, &ep->queue);
 815                 ret = 0;
 816         }
 817         spin_unlock_irqrestore(&udc->lock, flags);
 818
 819         return ret;
 820 }
 821
 822 static int
 823 usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 824 {
 825         struct usba_request *req = to_usba_req(_req);
 826         struct usba_ep *ep = to_usba_ep(_ep);
 827         struct usba_udc *udc = ep->udc;
 828         unsigned long flags;
 829         int ret;
 830
 831         DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
 832                         ep->ep.name, req, _req->length);
 833
 834         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
 835             !ep->ep.desc)
 836                 return -ESHUTDOWN;
 837
 838         req->submitted = 0;
 839         req->using_dma = 0;
 840         req->last_transaction = 0;
 841
 842         _req->status = -EINPROGRESS;
 843         _req->actual = 0;
 844
 845         if (ep->can_dma)
 846                 return queue_dma(udc, ep, req, gfp_flags);
 847
 848         /* May have received a reset since last time we checked */
 849         ret = -ESHUTDOWN;
 850         spin_lock_irqsave(&udc->lock, flags);
 851         if (ep->ep.desc) {
 852                 list_add_tail(&req->queue, &ep->queue);
 853
 854                 if ((!ep_is_control(ep) && ep->is_in) ||
 855                         (ep_is_control(ep)
 856                                 && (ep->state == DATA_STAGE_IN
 857                                         || ep->state == STATUS_STAGE_IN)))
 858                         usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
 859                 else
 860                         usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
 861                 ret = 0;
 862         }
 863         spin_unlock_irqrestore(&udc->lock, flags);
 864
 865         return ret;
 866 }
 867
 868 static void
 869 usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
 870 {
 871         req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
 872 }
 873
 874 static int stop_dma(struct usba_ep *ep, u32 *pstatus)
 875 {
 876         unsigned int timeout;
 877         u32 status;
 878
 879         /*
 880          * Stop the DMA controller. When writing both CH_EN
 881          * and LINK to 0, the other bits are not affected.
 882          */
 883         usba_dma_writel(ep, CONTROL, 0);
 884
 885         /* Wait for the FIFO to empty */
 886         for (timeout = 40; timeout; --timeout) {
 887                 status = usba_dma_readl(ep, STATUS);
 888                 if (!(status & USBA_DMA_CH_EN))
 889                         break;
 890                 udelay(1);
 891         }
 892
 893         if (pstatus)
 894                 *pstatus = status;
 895
 896         if (timeout == 0) {
 897                 dev_err(&ep->udc->pdev->dev,
 898                         "%s: timed out waiting for DMA FIFO to empty\n",
 899                         ep->ep.name);
 900                 return -ETIMEDOUT;
 901         }
 902
 903         return 0;
 904 }
 905
 906 static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 907 {
 908         struct usba_ep *ep = to_usba_ep(_ep);
 909         struct usba_udc *udc = ep->udc;
 910         struct usba_request *req;
 911         unsigned long flags;
 912         u32 status;
 913
 914         DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
 915                         ep->ep.name, _req);
 916
 917         spin_lock_irqsave(&udc->lock, flags);
 918
 919         list_for_each_entry(req, &ep->queue, queue) {
 920                 if (&req->req == _req)
 921                         break;
 922         }
 923
 924         if (&req->req != _req) {
 925                 spin_unlock_irqrestore(&udc->lock, flags);
 926                 return -EINVAL;
 927         }
 928
 929         if (req->using_dma) {
 930                 /*
 931                  * If this request is currently being transferred,
 932                  * stop the DMA controller and reset the FIFO.
 933                  */
 934                 if (ep->queue.next == &req->queue) {
 935                         status = usba_dma_readl(ep, STATUS);
 936                         if (status & USBA_DMA_CH_EN)
 937                                 stop_dma(ep, &status);
 938
 939 #ifdef CONFIG_USB_GADGET_DEBUG_FS
 940                         ep->last_dma_status = status;
 941 #endif
 942
 943                         usba_writel(udc, EPT_RST, 1 << ep->index);
 944
 945                         usba_update_req(ep, req, status);
 946                 }
 947         }
 948
 949         /*
 950          * Errors should stop the queue from advancing until the
 951          * completion function returns.
 952          */
 953         list_del_init(&req->queue);
 954
 955         request_complete(ep, req, -ECONNRESET);
 956
 957         /* Process the next request if any */
 958         submit_next_request(ep);
 959         spin_unlock_irqrestore(&udc->lock, flags);
 960
 961         return 0;
 962 }
 963
 964 static int usba_ep_set_halt(struct usb_ep *_ep, int value)
 965 {
 966         struct usba_ep *ep = to_usba_ep(_ep);
 967         struct usba_udc *udc = ep->udc;
 968         unsigned long flags;
 969         int ret = 0;
 970
 971         DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
 972                         value ? "set" : "clear");
 973
 974         if (!ep->ep.desc) {
 975                 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
 976                                 ep->ep.name);
 977                 return -ENODEV;
 978         }
 979         if (ep->is_isoc) {
 980                 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
 981                                 ep->ep.name);
 982                 return -ENOTTY;
 983         }
 984
 985         spin_lock_irqsave(&udc->lock, flags);
 986
 987         /*
 988          * We can't halt IN endpoints while there are still data to be
 989          * transferred
 990          */
 991         if (!list_empty(&ep->queue)
 992                         || ((value && ep->is_in && (usba_ep_readl(ep, STA)
 993                                         & USBA_BF(BUSY_BANKS, -1L))))) {
 994                 ret = -EAGAIN;
 995         } else {
 996                 if (value)
 997                         usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
 998                 else
 999                         usba_ep_writel(ep, CLR_STA,
1000                                         USBA_FORCE_STALL | USBA_TOGGLE_CLR);
1001                 usba_ep_readl(ep, STA);
1002         }
1003
1004         spin_unlock_irqrestore(&udc->lock, flags);
1005
1006         return ret;
1007 }
1008
1009 static int usba_ep_fifo_status(struct usb_ep *_ep)
1010 {
1011         struct usba_ep *ep = to_usba_ep(_ep);
1012
1013         return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1014 }
1015
1016 static void usba_ep_fifo_flush(struct usb_ep *_ep)
1017 {
1018         struct usba_ep *ep = to_usba_ep(_ep);
1019         struct usba_udc *udc = ep->udc;
1020
1021         usba_writel(udc, EPT_RST, 1 << ep->index);
1022 }
1023
1024 static const struct usb_ep_ops usba_ep_ops = {
1025         .enable         = usba_ep_enable,
1026         .disable        = usba_ep_disable,
1027         .alloc_request  = usba_ep_alloc_request,
1028         .free_request   = usba_ep_free_request,
1029         .queue          = usba_ep_queue,
1030         .dequeue        = usba_ep_dequeue,
1031         .set_halt       = usba_ep_set_halt,
1032         .fifo_status    = usba_ep_fifo_status,
1033         .fifo_flush     = usba_ep_fifo_flush,
1034 };
1035
1036 static int usba_udc_get_frame(struct usb_gadget *gadget)
1037 {
1038         struct usba_udc *udc = to_usba_udc(gadget);
1039
1040         return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
1041 }
1042
1043 static int usba_udc_wakeup(struct usb_gadget *gadget)
1044 {
1045         struct usba_udc *udc = to_usba_udc(gadget);
1046         unsigned long flags;
1047         u32 ctrl;
1048         int ret = -EINVAL;
1049
1050         spin_lock_irqsave(&udc->lock, flags);
1051         if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
1052                 ctrl = usba_readl(udc, CTRL);
1053                 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
1054                 ret = 0;
1055         }
1056         spin_unlock_irqrestore(&udc->lock, flags);
1057
1058         return ret;
1059 }
1060
1061 static int
1062 usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1063 {
1064         struct usba_udc *udc = to_usba_udc(gadget);
1065         unsigned long flags;
1066
1067         gadget->is_selfpowered = (is_selfpowered != 0);
1068         spin_lock_irqsave(&udc->lock, flags);
1069         if (is_selfpowered)
1070                 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
1071         else
1072                 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1073         spin_unlock_irqrestore(&udc->lock, flags);
1074
1075         return 0;
1076 }
1077
1078 static int atmel_usba_start(struct usb_gadget *gadget,
1079                 struct usb_gadget_driver *driver);
1080 static int atmel_usba_stop(struct usb_gadget *gadget);
1081
1082 static struct usb_ep *atmel_usba_match_ep(struct usb_gadget *gadget,
1083                                 struct usb_endpoint_descriptor  *desc,
1084                                 struct usb_ss_ep_comp_descriptor *ep_comp)
1085 {
1086         struct usb_ep   *_ep;
1087         struct usba_ep *ep;
1088
1089         /* Look at endpoints until an unclaimed one looks usable */
1090         list_for_each_entry(_ep, &gadget->ep_list, ep_list) {
1091                 if (usb_gadget_ep_match_desc(gadget, _ep, desc, ep_comp))
1092                         goto found_ep;
1093         }
1094         /* Fail */
1095         return NULL;
1096
1097 found_ep:
1098
1099         if (fifo_mode == 0) {
1100                 /* Optimize hw fifo size based on ep type and other info */
1101                 ep = to_usba_ep(_ep);
1102
1103                 switch (usb_endpoint_type(desc)) {
1104                 case USB_ENDPOINT_XFER_CONTROL:
1105                         break;
1106
1107                 case USB_ENDPOINT_XFER_ISOC:
1108                         ep->fifo_size = 1024;
1109                         ep->nr_banks = 2;
1110                         break;
1111
1112                 case USB_ENDPOINT_XFER_BULK:
1113                         ep->fifo_size = 512;
1114                         ep->nr_banks = 1;
1115                         break;
1116
1117                 case USB_ENDPOINT_XFER_INT:
1118                         if (desc->wMaxPacketSize == 0)
1119                                 ep->fifo_size =
1120                                     roundup_pow_of_two(_ep->maxpacket_limit);
1121                         else
1122                                 ep->fifo_size =
1123                                     roundup_pow_of_two(le16_to_cpu(desc->wMaxPacketSize));
1124                         ep->nr_banks = 1;
1125                         break;
1126                 }
1127
1128                 /* It might be a little bit late to set this */
1129                 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
1130
1131                 /* Generate ept_cfg basd on FIFO size and number of banks */
1132                 if (ep->fifo_size  <= 8)
1133                         ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
1134                 else
1135                         /* LSB is bit 1, not 0 */
1136                         ep->ept_cfg =
1137                                 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
1138
1139                 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
1140
1141                 ep->udc->configured_ep++;
1142         }
1143
1144         return _ep;
1145 }
1146
1147 static const struct usb_gadget_ops usba_udc_ops = {
1148         .get_frame              = usba_udc_get_frame,
1149         .wakeup                 = usba_udc_wakeup,
1150         .set_selfpowered        = usba_udc_set_selfpowered,
1151         .udc_start              = atmel_usba_start,
1152         .udc_stop               = atmel_usba_stop,
1153         .match_ep               = atmel_usba_match_ep,
1154 };
1155
1156 static struct usb_endpoint_descriptor usba_ep0_desc = {
1157         .bLength = USB_DT_ENDPOINT_SIZE,
1158         .bDescriptorType = USB_DT_ENDPOINT,
1159         .bEndpointAddress = 0,
1160         .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
1161         .wMaxPacketSize = cpu_to_le16(64),
1162         /* FIXME: I have no idea what to put here */
1163         .bInterval = 1,
1164 };
1165
1166 static struct usb_gadget usba_gadget_template = {
1167         .ops            = &usba_udc_ops,
1168         .max_speed      = USB_SPEED_HIGH,
1169         .name           = "atmel_usba_udc",
1170 };
1171
1172 /*
1173  * Called with interrupts disabled and udc->lock held.
1174  */
1175 static void reset_all_endpoints(struct usba_udc *udc)
1176 {
1177         struct usba_ep *ep;
1178         struct usba_request *req, *tmp_req;
1179
1180         usba_writel(udc, EPT_RST, ~0UL);
1181
1182         ep = to_usba_ep(udc->gadget.ep0);
1183         list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1184                 list_del_init(&req->queue);
1185                 request_complete(ep, req, -ECONNRESET);
1186         }
1187 }
1188
1189 static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1190 {
1191         struct usba_ep *ep;
1192
1193         if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1194                 return to_usba_ep(udc->gadget.ep0);
1195
1196         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1197                 u8 bEndpointAddress;
1198
1199                 if (!ep->ep.desc)
1200                         continue;
1201                 bEndpointAddress = ep->ep.desc->bEndpointAddress;
1202                 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1203                         continue;
1204                 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1205                                 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1206                         return ep;
1207         }
1208
1209         return NULL;
1210 }
1211
1212 /* Called with interrupts disabled and udc->lock held */
1213 static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1214 {
1215         usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1216         ep->state = WAIT_FOR_SETUP;
1217 }
1218
1219 static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1220 {
1221         if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1222                 return 1;
1223         return 0;
1224 }
1225
1226 static inline void set_address(struct usba_udc *udc, unsigned int addr)
1227 {
1228         u32 regval;
1229
1230         DBG(DBG_BUS, "setting address %u...\n", addr);
1231         regval = usba_readl(udc, CTRL);
1232         regval = USBA_BFINS(DEV_ADDR, addr, regval);
1233         usba_writel(udc, CTRL, regval);
1234 }
1235
1236 static int do_test_mode(struct usba_udc *udc)
1237 {
1238         static const char test_packet_buffer[] = {
1239                 /* JKJKJKJK * 9 */
1240                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1241                 /* JJKKJJKK * 8 */
1242                 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1243                 /* JJKKJJKK * 8 */
1244                 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1245                 /* JJJJJJJKKKKKKK * 8 */
1246                 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1247                 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1248                 /* JJJJJJJK * 8 */
1249                 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1250                 /* {JKKKKKKK * 10}, JK */
1251                 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1252         };
1253         struct usba_ep *ep;
1254         struct device *dev = &udc->pdev->dev;
1255         int test_mode;
1256
1257         test_mode = udc->test_mode;
1258
1259         /* Start from a clean slate */
1260         reset_all_endpoints(udc);
1261
1262         switch (test_mode) {
1263         case 0x0100:
1264                 /* Test_J */
1265                 usba_writel(udc, TST, USBA_TST_J_MODE);
1266                 dev_info(dev, "Entering Test_J mode...\n");
1267                 break;
1268         case 0x0200:
1269                 /* Test_K */
1270                 usba_writel(udc, TST, USBA_TST_K_MODE);
1271                 dev_info(dev, "Entering Test_K mode...\n");
1272                 break;
1273         case 0x0300:
1274                 /*
1275                  * Test_SE0_NAK: Force high-speed mode and set up ep0
1276                  * for Bulk IN transfers
1277                  */
1278                 ep = &udc->usba_ep[0];
1279                 usba_writel(udc, TST,
1280                                 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1281                 usba_ep_writel(ep, CFG,
1282                                 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1283                                 | USBA_EPT_DIR_IN
1284                                 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1285                                 | USBA_BF(BK_NUMBER, 1));
1286                 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1287                         set_protocol_stall(udc, ep);
1288                         dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1289                 } else {
1290                         usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1291                         dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1292                 }
1293                 break;
1294         case 0x0400:
1295                 /* Test_Packet */
1296                 ep = &udc->usba_ep[0];
1297                 usba_ep_writel(ep, CFG,
1298                                 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1299                                 | USBA_EPT_DIR_IN
1300                                 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1301                                 | USBA_BF(BK_NUMBER, 1));
1302                 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1303                         set_protocol_stall(udc, ep);
1304                         dev_err(dev, "Test_Packet: ep0 not mapped\n");
1305                 } else {
1306                         usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1307                         usba_writel(udc, TST, USBA_TST_PKT_MODE);
1308                         memcpy_toio(ep->fifo, test_packet_buffer,
1309                                         sizeof(test_packet_buffer));
1310                         usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1311                         dev_info(dev, "Entering Test_Packet mode...\n");
1312                 }
1313                 break;
1314         default:
1315                 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1316                 return -EINVAL;
1317         }
1318
1319         return 0;
1320 }
1321
1322 /* Avoid overly long expressions */
1323 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1324 {
1325         if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
1326                 return true;
1327         return false;
1328 }
1329
1330 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1331 {
1332         if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
1333                 return true;
1334         return false;
1335 }
1336
1337 static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1338 {
1339         if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
1340                 return true;
1341         return false;
1342 }
1343
1344 static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1345                 struct usb_ctrlrequest *crq)
1346 {
1347         int retval = 0;
1348
1349         switch (crq->bRequest) {
1350         case USB_REQ_GET_STATUS: {
1351                 u16 status;
1352
1353                 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
1354                         status = cpu_to_le16(udc->devstatus);
1355                 } else if (crq->bRequestType
1356                                 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
1357                         status = cpu_to_le16(0);
1358                 } else if (crq->bRequestType
1359                                 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1360                         struct usba_ep *target;
1361
1362                         target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1363                         if (!target)
1364                                 goto stall;
1365
1366                         status = 0;
1367                         if (is_stalled(udc, target))
1368                                 status |= cpu_to_le16(1);
1369                 } else
1370                         goto delegate;
1371
1372                 /* Write directly to the FIFO. No queueing is done. */
1373                 if (crq->wLength != cpu_to_le16(sizeof(status)))
1374                         goto stall;
1375                 ep->state = DATA_STAGE_IN;
1376                 writew_relaxed(status, ep->fifo);
1377                 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1378                 break;
1379         }
1380
1381         case USB_REQ_CLEAR_FEATURE: {
1382                 if (crq->bRequestType == USB_RECIP_DEVICE) {
1383                         if (feature_is_dev_remote_wakeup(crq))
1384                                 udc->devstatus
1385                                         &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1386                         else
1387                                 /* Can't CLEAR_FEATURE TEST_MODE */
1388                                 goto stall;
1389                 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1390                         struct usba_ep *target;
1391
1392                         if (crq->wLength != cpu_to_le16(0)
1393                                         || !feature_is_ep_halt(crq))
1394                                 goto stall;
1395                         target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1396                         if (!target)
1397                                 goto stall;
1398
1399                         usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1400                         if (target->index != 0)
1401                                 usba_ep_writel(target, CLR_STA,
1402                                                 USBA_TOGGLE_CLR);
1403                 } else {
1404                         goto delegate;
1405                 }
1406
1407                 send_status(udc, ep);
1408                 break;
1409         }
1410
1411         case USB_REQ_SET_FEATURE: {
1412                 if (crq->bRequestType == USB_RECIP_DEVICE) {
1413                         if (feature_is_dev_test_mode(crq)) {
1414                                 send_status(udc, ep);
1415                                 ep->state = STATUS_STAGE_TEST;
1416                                 udc->test_mode = le16_to_cpu(crq->wIndex);
1417                                 return 0;
1418                         } else if (feature_is_dev_remote_wakeup(crq)) {
1419                                 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
1420                         } else {
1421                                 goto stall;
1422                         }
1423                 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1424                         struct usba_ep *target;
1425
1426                         if (crq->wLength != cpu_to_le16(0)
1427                                         || !feature_is_ep_halt(crq))
1428                                 goto stall;
1429
1430                         target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1431                         if (!target)
1432                                 goto stall;
1433
1434                         usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1435                 } else
1436                         goto delegate;
1437
1438                 send_status(udc, ep);
1439                 break;
1440         }
1441
1442         case USB_REQ_SET_ADDRESS:
1443                 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1444                         goto delegate;
1445
1446                 set_address(udc, le16_to_cpu(crq->wValue));
1447                 send_status(udc, ep);
1448                 ep->state = STATUS_STAGE_ADDR;
1449                 break;
1450
1451         default:
1452 delegate:
1453                 spin_unlock(&udc->lock);
1454                 retval = udc->driver->setup(&udc->gadget, crq);
1455                 spin_lock(&udc->lock);
1456         }
1457
1458         return retval;
1459
1460 stall:
1461         pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1462                 "halting endpoint...\n",
1463                 ep->ep.name, crq->bRequestType, crq->bRequest,
1464                 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1465                 le16_to_cpu(crq->wLength));
1466         set_protocol_stall(udc, ep);
1467         return -1;
1468 }
1469
1470 static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1471 {
1472         struct usba_request *req;
1473         u32 epstatus;
1474         u32 epctrl;
1475
1476 restart:
1477         epstatus = usba_ep_readl(ep, STA);
1478         epctrl = usba_ep_readl(ep, CTL);
1479
1480         DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1481                         ep->ep.name, ep->state, epstatus, epctrl);
1482
1483         req = NULL;
1484         if (!list_empty(&ep->queue))
1485                 req = list_entry(ep->queue.next,
1486                                  struct usba_request, queue);
1487
1488         if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1489                 if (req->submitted)
1490                         next_fifo_transaction(ep, req);
1491                 else
1492                         submit_request(ep, req);
1493
1494                 if (req->last_transaction) {
1495                         usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1496                         usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1497                 }
1498                 goto restart;
1499         }
1500         if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1501                 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1502
1503                 switch (ep->state) {
1504                 case DATA_STAGE_IN:
1505                         usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1506                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1507                         ep->state = STATUS_STAGE_OUT;
1508                         break;
1509                 case STATUS_STAGE_ADDR:
1510                         /* Activate our new address */
1511                         usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1512                                                 | USBA_FADDR_EN));
1513                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1514                         ep->state = WAIT_FOR_SETUP;
1515                         break;
1516                 case STATUS_STAGE_IN:
1517                         if (req) {
1518                                 list_del_init(&req->queue);
1519                                 request_complete(ep, req, 0);
1520                                 submit_next_request(ep);
1521                         }
1522                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1523                         ep->state = WAIT_FOR_SETUP;
1524                         break;
1525                 case STATUS_STAGE_TEST:
1526                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1527                         ep->state = WAIT_FOR_SETUP;
1528                         if (do_test_mode(udc))
1529                                 set_protocol_stall(udc, ep);
1530                         break;
1531                 default:
1532                         pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
1533                                 "halting endpoint...\n",
1534                                 ep->ep.name, ep->state);
1535                         set_protocol_stall(udc, ep);
1536                         break;
1537                 }
1538
1539                 goto restart;
1540         }
1541         if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1542                 switch (ep->state) {
1543                 case STATUS_STAGE_OUT:
1544                         usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1545                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1546
1547                         if (req) {
1548                                 list_del_init(&req->queue);
1549                                 request_complete(ep, req, 0);
1550                         }
1551                         ep->state = WAIT_FOR_SETUP;
1552                         break;
1553
1554                 case DATA_STAGE_OUT:
1555                         receive_data(ep);
1556                         break;
1557
1558                 default:
1559                         usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1560                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1561                         pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
1562                                 "halting endpoint...\n",
1563                                 ep->ep.name, ep->state);
1564                         set_protocol_stall(udc, ep);
1565                         break;
1566                 }
1567
1568                 goto restart;
1569         }
1570         if (epstatus & USBA_RX_SETUP) {
1571                 union {
1572                         struct usb_ctrlrequest crq;
1573                         unsigned long data[2];
1574                 } crq;
1575                 unsigned int pkt_len;
1576                 int ret;
1577
1578                 if (ep->state != WAIT_FOR_SETUP) {
1579                         /*
1580                          * Didn't expect a SETUP packet at this
1581                          * point. Clean up any pending requests (which
1582                          * may be successful).
1583                          */
1584                         int status = -EPROTO;
1585
1586                         /*
1587                          * RXRDY and TXCOMP are dropped when SETUP
1588                          * packets arrive.  Just pretend we received
1589                          * the status packet.
1590                          */
1591                         if (ep->state == STATUS_STAGE_OUT
1592                                         || ep->state == STATUS_STAGE_IN) {
1593                                 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1594                                 status = 0;
1595                         }
1596
1597                         if (req) {
1598                                 list_del_init(&req->queue);
1599                                 request_complete(ep, req, status);
1600                         }
1601                 }
1602
1603                 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1604                 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1605                 if (pkt_len != sizeof(crq)) {
1606                         pr_warn("udc: Invalid packet length %u (expected %zu)\n",
1607                                 pkt_len, sizeof(crq));
1608                         set_protocol_stall(udc, ep);
1609                         return;
1610                 }
1611
1612                 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
1613                 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
1614
1615                 /* Free up one bank in the FIFO so that we can
1616                  * generate or receive a reply right away. */
1617                 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1618
1619                 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1620                         ep->state, crq.crq.bRequestType,
1621                         crq.crq.bRequest); */
1622
1623                 if (crq.crq.bRequestType & USB_DIR_IN) {
1624                         /*
1625                          * The USB 2.0 spec states that "if wLength is
1626                          * zero, there is no data transfer phase."
1627                          * However, testusb #14 seems to actually
1628                          * expect a data phase even if wLength = 0...
1629                          */
1630                         ep->state = DATA_STAGE_IN;
1631                 } else {
1632                         if (crq.crq.wLength != cpu_to_le16(0))
1633                                 ep->state = DATA_STAGE_OUT;
1634                         else
1635                                 ep->state = STATUS_STAGE_IN;
1636                 }
1637
1638                 ret = -1;
1639                 if (ep->index == 0)
1640                         ret = handle_ep0_setup(udc, ep, &crq.crq);
1641                 else {
1642                         spin_unlock(&udc->lock);
1643                         ret = udc->driver->setup(&udc->gadget, &crq.crq);
1644                         spin_lock(&udc->lock);
1645                 }
1646
1647                 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1648                         crq.crq.bRequestType, crq.crq.bRequest,
1649                         le16_to_cpu(crq.crq.wLength), ep->state, ret);
1650
1651                 if (ret < 0) {
1652                         /* Let the host know that we failed */
1653                         set_protocol_stall(udc, ep);
1654                 }
1655         }
1656 }
1657
1658 static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1659 {
1660         struct usba_request *req;
1661         u32 epstatus;
1662         u32 epctrl;
1663
1664         epstatus = usba_ep_readl(ep, STA);
1665         epctrl = usba_ep_readl(ep, CTL);
1666
1667         DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1668
1669         while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1670                 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1671
1672                 if (list_empty(&ep->queue)) {
1673                         dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1674                         usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1675                         return;
1676                 }
1677
1678                 req = list_entry(ep->queue.next, struct usba_request, queue);
1679
1680                 if (req->using_dma) {
1681                         /* Send a zero-length packet */
1682                         usba_ep_writel(ep, SET_STA,
1683                                         USBA_TX_PK_RDY);
1684                         usba_ep_writel(ep, CTL_DIS,
1685                                         USBA_TX_PK_RDY);
1686                         list_del_init(&req->queue);
1687                         submit_next_request(ep);
1688                         request_complete(ep, req, 0);
1689                 } else {
1690                         if (req->submitted)
1691                                 next_fifo_transaction(ep, req);
1692                         else
1693                                 submit_request(ep, req);
1694
1695                         if (req->last_transaction) {
1696                                 list_del_init(&req->queue);
1697                                 submit_next_request(ep);
1698                                 request_complete(ep, req, 0);
1699                         }
1700                 }
1701
1702                 epstatus = usba_ep_readl(ep, STA);
1703                 epctrl = usba_ep_readl(ep, CTL);
1704         }
1705         if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1706                 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1707                 receive_data(ep);
1708         }
1709 }
1710
1711 static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1712 {
1713         struct usba_request *req;
1714         u32 status, control, pending;
1715
1716         status = usba_dma_readl(ep, STATUS);
1717         control = usba_dma_readl(ep, CONTROL);
1718 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1719         ep->last_dma_status = status;
1720 #endif
1721         pending = status & control;
1722         DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1723
1724         if (status & USBA_DMA_CH_EN) {
1725                 dev_err(&udc->pdev->dev,
1726                         "DMA_CH_EN is set after transfer is finished!\n");
1727                 dev_err(&udc->pdev->dev,
1728                         "status=%#08x, pending=%#08x, control=%#08x\n",
1729                         status, pending, control);
1730
1731                 /*
1732                  * try to pretend nothing happened. We might have to
1733                  * do something here...
1734                  */
1735         }
1736
1737         if (list_empty(&ep->queue))
1738                 /* Might happen if a reset comes along at the right moment */
1739                 return;
1740
1741         if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1742                 req = list_entry(ep->queue.next, struct usba_request, queue);
1743                 usba_update_req(ep, req, status);
1744
1745                 list_del_init(&req->queue);
1746                 submit_next_request(ep);
1747                 request_complete(ep, req, 0);
1748         }
1749 }
1750
1751 static irqreturn_t usba_udc_irq(int irq, void *devid)
1752 {
1753         struct usba_udc *udc = devid;
1754         u32 status, int_enb;
1755         u32 dma_status;
1756         u32 ep_status;
1757
1758         spin_lock(&udc->lock);
1759
1760         int_enb = usba_int_enb_get(udc);
1761         status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED);
1762         DBG(DBG_INT, "irq, status=%#08x\n", status);
1763
1764         if (status & USBA_DET_SUSPEND) {
1765                 toggle_bias(udc, 0);
1766                 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
1767                 usba_int_enb_set(udc, int_enb | USBA_WAKE_UP);
1768                 udc->bias_pulse_needed = true;
1769                 DBG(DBG_BUS, "Suspend detected\n");
1770                 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1771                                 && udc->driver && udc->driver->suspend) {
1772                         spin_unlock(&udc->lock);
1773                         udc->driver->suspend(&udc->gadget);
1774                         spin_lock(&udc->lock);
1775                 }
1776         }
1777
1778         if (status & USBA_WAKE_UP) {
1779                 toggle_bias(udc, 1);
1780                 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1781                 usba_int_enb_set(udc, int_enb & ~USBA_WAKE_UP);
1782                 DBG(DBG_BUS, "Wake Up CPU detected\n");
1783         }
1784
1785         if (status & USBA_END_OF_RESUME) {
1786                 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1787                 generate_bias_pulse(udc);
1788                 DBG(DBG_BUS, "Resume detected\n");
1789                 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1790                                 && udc->driver && udc->driver->resume) {
1791                         spin_unlock(&udc->lock);
1792                         udc->driver->resume(&udc->gadget);
1793                         spin_lock(&udc->lock);
1794                 }
1795         }
1796
1797         dma_status = USBA_BFEXT(DMA_INT, status);
1798         if (dma_status) {
1799                 int i;
1800
1801                 for (i = 1; i <= USBA_NR_DMAS; i++)
1802                         if (dma_status & (1 << i))
1803                                 usba_dma_irq(udc, &udc->usba_ep[i]);
1804         }
1805
1806         ep_status = USBA_BFEXT(EPT_INT, status);
1807         if (ep_status) {
1808                 int i;
1809
1810                 for (i = 0; i < udc->num_ep; i++)
1811                         if (ep_status & (1 << i)) {
1812                                 if (ep_is_control(&udc->usba_ep[i]))
1813                                         usba_control_irq(udc, &udc->usba_ep[i]);
1814                                 else
1815                                         usba_ep_irq(udc, &udc->usba_ep[i]);
1816                         }
1817         }
1818
1819         if (status & USBA_END_OF_RESET) {
1820                 struct usba_ep *ep0, *ep;
1821                 int i, n;
1822
1823                 usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
1824                 generate_bias_pulse(udc);
1825                 reset_all_endpoints(udc);
1826
1827                 if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) {
1828                         udc->gadget.speed = USB_SPEED_UNKNOWN;
1829                         spin_unlock(&udc->lock);
1830                         usb_gadget_udc_reset(&udc->gadget, udc->driver);
1831                         spin_lock(&udc->lock);
1832                 }
1833
1834                 if (status & USBA_HIGH_SPEED)
1835                         udc->gadget.speed = USB_SPEED_HIGH;
1836                 else
1837                         udc->gadget.speed = USB_SPEED_FULL;
1838                 DBG(DBG_BUS, "%s bus reset detected\n",
1839                     usb_speed_string(udc->gadget.speed));
1840
1841                 ep0 = &udc->usba_ep[0];
1842                 ep0->ep.desc = &usba_ep0_desc;
1843                 ep0->state = WAIT_FOR_SETUP;
1844                 usba_ep_writel(ep0, CFG,
1845                                 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1846                                 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1847                                 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1848                 usba_ep_writel(ep0, CTL_ENB,
1849                                 USBA_EPT_ENABLE | USBA_RX_SETUP);
1850                 usba_int_enb_set(udc, int_enb | USBA_BF(EPT_INT, 1) |
1851                                       USBA_DET_SUSPEND | USBA_END_OF_RESUME);
1852
1853                 /*
1854                  * Unclear why we hit this irregularly, e.g. in usbtest,
1855                  * but it's clearly harmless...
1856                  */
1857                 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1858                         dev_err(&udc->pdev->dev,
1859                                 "ODD: EP0 configuration is invalid!\n");
1860
1861                 /* Preallocate other endpoints */
1862                 n = fifo_mode ? udc->num_ep : udc->configured_ep;
1863                 for (i = 1; i < n; i++) {
1864                         ep = &udc->usba_ep[i];
1865                         usba_ep_writel(ep, CFG, ep->ept_cfg);
1866                         if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED))
1867                                 dev_err(&udc->pdev->dev,
1868                                         "ODD: EP%d configuration is invalid!\n", i);
1869                 }
1870         }
1871
1872         spin_unlock(&udc->lock);
1873
1874         return IRQ_HANDLED;
1875 }
1876
1877 static int start_clock(struct usba_udc *udc)
1878 {
1879         int ret;
1880
1881         if (udc->clocked)
1882                 return 0;
1883
1884         ret = clk_prepare_enable(udc->pclk);
1885         if (ret)
1886                 return ret;
1887         ret = clk_prepare_enable(udc->hclk);
1888         if (ret) {
1889                 clk_disable_unprepare(udc->pclk);
1890                 return ret;
1891         }
1892
1893         udc->clocked = true;
1894         return 0;
1895 }
1896
1897 static void stop_clock(struct usba_udc *udc)
1898 {
1899         if (!udc->clocked)
1900                 return;
1901
1902         clk_disable_unprepare(udc->hclk);
1903         clk_disable_unprepare(udc->pclk);
1904
1905         udc->clocked = false;
1906 }
1907
1908 static int usba_start(struct usba_udc *udc)
1909 {
1910         unsigned long flags;
1911         int ret;
1912
1913         ret = start_clock(udc);
1914         if (ret)
1915                 return ret;
1916
1917         spin_lock_irqsave(&udc->lock, flags);
1918         toggle_bias(udc, 1);
1919         usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1920         usba_int_enb_set(udc, USBA_END_OF_RESET);
1921         spin_unlock_irqrestore(&udc->lock, flags);
1922
1923         return 0;
1924 }
1925
1926 static void usba_stop(struct usba_udc *udc)
1927 {
1928         unsigned long flags;
1929
1930         spin_lock_irqsave(&udc->lock, flags);
1931         udc->gadget.speed = USB_SPEED_UNKNOWN;
1932         reset_all_endpoints(udc);
1933
1934         /* This will also disable the DP pullup */
1935         toggle_bias(udc, 0);
1936         usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1937         spin_unlock_irqrestore(&udc->lock, flags);
1938
1939         stop_clock(udc);
1940 }
1941
1942 static irqreturn_t usba_vbus_irq_thread(int irq, void *devid)
1943 {
1944         struct usba_udc *udc = devid;
1945         int vbus;
1946
1947         /* debounce */
1948         udelay(10);
1949
1950         mutex_lock(&udc->vbus_mutex);
1951
1952         vbus = vbus_is_present(udc);
1953         if (vbus != udc->vbus_prev) {
1954                 if (vbus) {
1955                         usba_start(udc);
1956                 } else {
1957                         usba_stop(udc);
1958
1959                         if (udc->driver->disconnect)
1960                                 udc->driver->disconnect(&udc->gadget);
1961                 }
1962                 udc->vbus_prev = vbus;
1963         }
1964
1965         mutex_unlock(&udc->vbus_mutex);
1966         return IRQ_HANDLED;
1967 }
1968
1969 static int atmel_usba_start(struct usb_gadget *gadget,
1970                 struct usb_gadget_driver *driver)
1971 {
1972         int ret;
1973         struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1974         unsigned long flags;
1975
1976         spin_lock_irqsave(&udc->lock, flags);
1977         udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
1978         udc->driver = driver;
1979         spin_unlock_irqrestore(&udc->lock, flags);
1980
1981         mutex_lock(&udc->vbus_mutex);
1982
1983         if (gpio_is_valid(udc->vbus_pin))
1984                 enable_irq(gpio_to_irq(udc->vbus_pin));
1985
1986         /* If Vbus is present, enable the controller and wait for reset */
1987         udc->vbus_prev = vbus_is_present(udc);
1988         if (udc->vbus_prev) {
1989                 ret = usba_start(udc);
1990                 if (ret)
1991                         goto err;
1992         }
1993
1994         mutex_unlock(&udc->vbus_mutex);
1995         return 0;
1996
1997 err:
1998         if (gpio_is_valid(udc->vbus_pin))
1999                 disable_irq(gpio_to_irq(udc->vbus_pin));
2000
2001         mutex_unlock(&udc->vbus_mutex);
2002
2003         spin_lock_irqsave(&udc->lock, flags);
2004         udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
2005         udc->driver = NULL;
2006         spin_unlock_irqrestore(&udc->lock, flags);
2007         return ret;
2008 }
2009
2010 static int atmel_usba_stop(struct usb_gadget *gadget)
2011 {
2012         struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
2013
2014         if (gpio_is_valid(udc->vbus_pin))
2015                 disable_irq(gpio_to_irq(udc->vbus_pin));
2016
2017         if (fifo_mode == 0)
2018                 udc->configured_ep = 1;
2019
2020         usba_stop(udc);
2021
2022         udc->driver = NULL;
2023
2024         return 0;
2025 }
2026
2027 #ifdef CONFIG_OF
2028 static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on)
2029 {
2030         regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
2031                            is_on ? AT91_PMC_BIASEN : 0);
2032 }
2033
2034 static void at91sam9g45_pulse_bias(struct usba_udc *udc)
2035 {
2036         regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 0);
2037         regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
2038                            AT91_PMC_BIASEN);
2039 }
2040
2041 static const struct usba_udc_errata at91sam9rl_errata = {
2042         .toggle_bias = at91sam9rl_toggle_bias,
2043 };
2044
2045 static const struct usba_udc_errata at91sam9g45_errata = {
2046         .pulse_bias = at91sam9g45_pulse_bias,
2047 };
2048
2049 static const struct of_device_id atmel_udc_dt_ids[] = {
2050         { .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata },
2051         { .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata },
2052         { .compatible = "atmel,sama5d3-udc" },
2053         { /* sentinel */ }
2054 };
2055
2056 MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
2057
2058 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2059                                                     struct usba_udc *udc)
2060 {
2061         u32 val;
2062         const char *name;
2063         enum of_gpio_flags flags;
2064         struct device_node *np = pdev->dev.of_node;
2065         const struct of_device_id *match;
2066         struct device_node *pp;
2067         int i, ret;
2068         struct usba_ep *eps, *ep;
2069
2070         match = of_match_node(atmel_udc_dt_ids, np);
2071         if (!match)
2072                 return ERR_PTR(-EINVAL);
2073
2074         udc->errata = match->data;
2075         udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9g45-pmc");
2076         if (IS_ERR(udc->pmc))
2077                 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9rl-pmc");
2078         if (IS_ERR(udc->pmc))
2079                 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9x5-pmc");
2080         if (udc->errata && IS_ERR(udc->pmc))
2081                 return ERR_CAST(udc->pmc);
2082
2083         udc->num_ep = 0;
2084
2085         udc->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0,
2086                                                 &flags);
2087         udc->vbus_pin_inverted = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0;
2088
2089         if (fifo_mode == 0) {
2090                 pp = NULL;
2091                 while ((pp = of_get_next_child(np, pp)))
2092                         udc->num_ep++;
2093                 udc->configured_ep = 1;
2094         } else {
2095                 udc->num_ep = usba_config_fifo_table(udc);
2096         }
2097
2098         eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * udc->num_ep,
2099                            GFP_KERNEL);
2100         if (!eps)
2101                 return ERR_PTR(-ENOMEM);
2102
2103         udc->gadget.ep0 = &eps[0].ep;
2104
2105         INIT_LIST_HEAD(&eps[0].ep.ep_list);
2106
2107         pp = NULL;
2108         i = 0;
2109         while ((pp = of_get_next_child(np, pp)) && i < udc->num_ep) {
2110                 ep = &eps[i];
2111
2112                 ret = of_property_read_u32(pp, "reg", &val);
2113                 if (ret) {
2114                         dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret);
2115                         goto err;
2116                 }
2117                 ep->index = fifo_mode ? udc->fifo_cfg[i].hw_ep_num : val;
2118
2119                 ret = of_property_read_u32(pp, "atmel,fifo-size", &val);
2120                 if (ret) {
2121                         dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret);
2122                         goto err;
2123                 }
2124                 if (fifo_mode) {
2125                         if (val < udc->fifo_cfg[i].fifo_size) {
2126                                 dev_warn(&pdev->dev,
2127                                          "Using max fifo-size value from DT\n");
2128                                 ep->fifo_size = val;
2129                         } else {
2130                                 ep->fifo_size = udc->fifo_cfg[i].fifo_size;
2131                         }
2132                 } else {
2133                         ep->fifo_size = val;
2134                 }
2135
2136                 ret = of_property_read_u32(pp, "atmel,nb-banks", &val);
2137                 if (ret) {
2138                         dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret);
2139                         goto err;
2140                 }
2141                 if (fifo_mode) {
2142                         if (val < udc->fifo_cfg[i].nr_banks) {
2143                                 dev_warn(&pdev->dev,
2144                                          "Using max nb-banks value from DT\n");
2145                                 ep->nr_banks = val;
2146                         } else {
2147                                 ep->nr_banks = udc->fifo_cfg[i].nr_banks;
2148                         }
2149                 } else {
2150                         ep->nr_banks = val;
2151                 }
2152
2153                 ep->can_dma = of_property_read_bool(pp, "atmel,can-dma");
2154                 ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc");
2155
2156                 ret = of_property_read_string(pp, "name", &name);
2157                 if (ret) {
2158                         dev_err(&pdev->dev, "of_probe: name error(%d)\n", ret);
2159                         goto err;
2160                 }
2161                 sprintf(ep->name, "ep%d", ep->index);
2162                 ep->ep.name = ep->name;
2163
2164                 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
2165                 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
2166                 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
2167                 ep->ep.ops = &usba_ep_ops;
2168                 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
2169                 ep->udc = udc;
2170                 INIT_LIST_HEAD(&ep->queue);
2171
2172                 if (ep->index == 0) {
2173                         ep->ep.caps.type_control = true;
2174                 } else {
2175                         ep->ep.caps.type_iso = ep->can_isoc;
2176                         ep->ep.caps.type_bulk = true;
2177                         ep->ep.caps.type_int = true;
2178                 }
2179
2180                 ep->ep.caps.dir_in = true;
2181                 ep->ep.caps.dir_out = true;
2182
2183                 if (fifo_mode != 0) {
2184                         /*
2185                          * Generate ept_cfg based on FIFO size and
2186                          * banks number
2187                          */
2188                         if (ep->fifo_size  <= 8)
2189                                 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
2190                         else
2191                                 /* LSB is bit 1, not 0 */
2192                                 ep->ept_cfg =
2193                                   USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
2194
2195                         ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
2196                 }
2197
2198                 if (i)
2199                         list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2200
2201                 i++;
2202         }
2203
2204         if (i == 0) {
2205                 dev_err(&pdev->dev, "of_probe: no endpoint specified\n");
2206                 ret = -EINVAL;
2207                 goto err;
2208         }
2209
2210         return eps;
2211 err:
2212         return ERR_PTR(ret);
2213 }
2214 #else
2215 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2216                                                     struct usba_udc *udc)
2217 {
2218         return ERR_PTR(-ENOSYS);
2219 }
2220 #endif
2221
2222 static struct usba_ep * usba_udc_pdata(struct platform_device *pdev,
2223                                                  struct usba_udc *udc)
2224 {
2225         struct usba_platform_data *pdata = dev_get_platdata(&pdev->dev);
2226         struct usba_ep *eps;
2227         int i;
2228
2229         if (!pdata)
2230                 return ERR_PTR(-ENXIO);
2231
2232         eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * pdata->num_ep,
2233                            GFP_KERNEL);
2234         if (!eps)
2235                 return ERR_PTR(-ENOMEM);
2236
2237         udc->gadget.ep0 = &eps[0].ep;
2238
2239         udc->vbus_pin = pdata->vbus_pin;
2240         udc->vbus_pin_inverted = pdata->vbus_pin_inverted;
2241         udc->num_ep = pdata->num_ep;
2242
2243         INIT_LIST_HEAD(&eps[0].ep.ep_list);
2244
2245         for (i = 0; i < pdata->num_ep; i++) {
2246                 struct usba_ep *ep = &eps[i];
2247
2248                 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
2249                 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
2250                 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
2251                 ep->ep.ops = &usba_ep_ops;
2252                 ep->ep.name = pdata->ep[i].name;
2253                 ep->fifo_size = pdata->ep[i].fifo_size;
2254                 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
2255                 ep->udc = udc;
2256                 INIT_LIST_HEAD(&ep->queue);
2257                 ep->nr_banks = pdata->ep[i].nr_banks;
2258                 ep->index = pdata->ep[i].index;
2259                 ep->can_dma = pdata->ep[i].can_dma;
2260                 ep->can_isoc = pdata->ep[i].can_isoc;
2261
2262                 if (i == 0) {
2263                         ep->ep.caps.type_control = true;
2264                 } else {
2265                         ep->ep.caps.type_iso = ep->can_isoc;
2266                         ep->ep.caps.type_bulk = true;
2267                         ep->ep.caps.type_int = true;
2268                 }
2269
2270                 ep->ep.caps.dir_in = true;
2271                 ep->ep.caps.dir_out = true;
2272
2273                 if (i)
2274                         list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2275         }
2276
2277         return eps;
2278 }
2279
2280 static int usba_udc_probe(struct platform_device *pdev)
2281 {
2282         struct resource *regs, *fifo;
2283         struct clk *pclk, *hclk;
2284         struct usba_udc *udc;
2285         int irq, ret, i;
2286
2287         udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2288         if (!udc)
2289                 return -ENOMEM;
2290
2291         udc->gadget = usba_gadget_template;
2292         INIT_LIST_HEAD(&udc->gadget.ep_list);
2293
2294         regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
2295         fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
2296         if (!regs || !fifo)
2297                 return -ENXIO;
2298
2299         irq = platform_get_irq(pdev, 0);
2300         if (irq < 0)
2301                 return irq;
2302
2303         pclk = devm_clk_get(&pdev->dev, "pclk");
2304         if (IS_ERR(pclk))
2305                 return PTR_ERR(pclk);
2306         hclk = devm_clk_get(&pdev->dev, "hclk");
2307         if (IS_ERR(hclk))
2308                 return PTR_ERR(hclk);
2309
2310         spin_lock_init(&udc->lock);
2311         mutex_init(&udc->vbus_mutex);
2312         udc->pdev = pdev;
2313         udc->pclk = pclk;
2314         udc->hclk = hclk;
2315         udc->vbus_pin = -ENODEV;
2316
2317         ret = -ENOMEM;
2318         udc->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
2319         if (!udc->regs) {
2320                 dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
2321                 return ret;
2322         }
2323         dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
2324                  (unsigned long)regs->start, udc->regs);
2325         udc->fifo = devm_ioremap(&pdev->dev, fifo->start, resource_size(fifo));
2326         if (!udc->fifo) {
2327                 dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
2328                 return ret;
2329         }
2330         dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
2331                  (unsigned long)fifo->start, udc->fifo);
2332
2333         platform_set_drvdata(pdev, udc);
2334
2335         /* Make sure we start from a clean slate */
2336         ret = clk_prepare_enable(pclk);
2337         if (ret) {
2338                 dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n");
2339                 return ret;
2340         }
2341
2342         usba_writel(udc, CTRL, USBA_DISABLE_MASK);
2343         clk_disable_unprepare(pclk);
2344
2345         if (pdev->dev.of_node)
2346                 udc->usba_ep = atmel_udc_of_init(pdev, udc);
2347         else
2348                 udc->usba_ep = usba_udc_pdata(pdev, udc);
2349
2350         toggle_bias(udc, 0);
2351
2352         if (IS_ERR(udc->usba_ep))
2353                 return PTR_ERR(udc->usba_ep);
2354
2355         ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0,
2356                                 "atmel_usba_udc", udc);
2357         if (ret) {
2358                 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
2359                         irq, ret);
2360                 return ret;
2361         }
2362         udc->irq = irq;
2363
2364         if (gpio_is_valid(udc->vbus_pin)) {
2365                 if (!devm_gpio_request(&pdev->dev, udc->vbus_pin, "atmel_usba_udc")) {
2366                         irq_set_status_flags(gpio_to_irq(udc->vbus_pin),
2367                                         IRQ_NOAUTOEN);
2368                         ret = devm_request_threaded_irq(&pdev->dev,
2369                                         gpio_to_irq(udc->vbus_pin), NULL,
2370                                         usba_vbus_irq_thread, USBA_VBUS_IRQFLAGS,
2371                                         "atmel_usba_udc", udc);
2372                         if (ret) {
2373                                 udc->vbus_pin = -ENODEV;
2374                                 dev_warn(&udc->pdev->dev,
2375                                          "failed to request vbus irq; "
2376                                          "assuming always on\n");
2377                         }
2378                 } else {
2379                         /* gpio_request fail so use -EINVAL for gpio_is_valid */
2380                         udc->vbus_pin = -EINVAL;
2381                 }
2382         }
2383
2384         ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2385         if (ret)
2386                 return ret;
2387         device_init_wakeup(&pdev->dev, 1);
2388
2389         usba_init_debugfs(udc);
2390         for (i = 1; i < udc->num_ep; i++)
2391                 usba_ep_init_debugfs(udc, &udc->usba_ep[i]);
2392
2393         return 0;
2394 }
2395
2396 static int usba_udc_remove(struct platform_device *pdev)
2397 {
2398         struct usba_udc *udc;
2399         int i;
2400
2401         udc = platform_get_drvdata(pdev);
2402
2403         device_init_wakeup(&pdev->dev, 0);
2404         usb_del_gadget_udc(&udc->gadget);
2405
2406         for (i = 1; i < udc->num_ep; i++)
2407                 usba_ep_cleanup_debugfs(&udc->usba_ep[i]);
2408         usba_cleanup_debugfs(udc);
2409
2410         return 0;
2411 }
2412
2413 #ifdef CONFIG_PM_SLEEP
2414 static int usba_udc_suspend(struct device *dev)
2415 {
2416         struct usba_udc *udc = dev_get_drvdata(dev);
2417
2418         /* Not started */
2419         if (!udc->driver)
2420                 return 0;
2421
2422         mutex_lock(&udc->vbus_mutex);
2423
2424         if (!device_may_wakeup(dev)) {
2425                 usba_stop(udc);
2426                 goto out;
2427         }
2428
2429         /*
2430          * Device may wake up. We stay clocked if we failed
2431          * to request vbus irq, assuming always on.
2432          */
2433         if (gpio_is_valid(udc->vbus_pin)) {
2434                 usba_stop(udc);
2435                 enable_irq_wake(gpio_to_irq(udc->vbus_pin));
2436         }
2437
2438 out:
2439         mutex_unlock(&udc->vbus_mutex);
2440         return 0;
2441 }
2442
2443 static int usba_udc_resume(struct device *dev)
2444 {
2445         struct usba_udc *udc = dev_get_drvdata(dev);
2446
2447         /* Not started */
2448         if (!udc->driver)
2449                 return 0;
2450
2451         if (device_may_wakeup(dev) && gpio_is_valid(udc->vbus_pin))
2452                 disable_irq_wake(gpio_to_irq(udc->vbus_pin));
2453
2454         /* If Vbus is present, enable the controller and wait for reset */
2455         mutex_lock(&udc->vbus_mutex);
2456         udc->vbus_prev = vbus_is_present(udc);
2457         if (udc->vbus_prev)
2458                 usba_start(udc);
2459         mutex_unlock(&udc->vbus_mutex);
2460
2461         return 0;
2462 }
2463 #endif
2464
2465 static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume);
2466
2467 static struct platform_driver udc_driver = {
2468         .remove         = usba_udc_remove,
2469         .driver         = {
2470                 .name           = "atmel_usba_udc",
2471                 .pm             = &usba_udc_pm_ops,
2472                 .of_match_table = of_match_ptr(atmel_udc_dt_ids),
2473         },
2474 };
2475
2476 module_platform_driver_probe(udc_driver, usba_udc_probe);
2477
2478 MODULE_DESCRIPTION("Atmel USBA UDC driver");
2479 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2480 MODULE_LICENSE("GPL");
2481 MODULE_ALIAS("platform:atmel_usba_udc");