drivers/usb/gadget/udc/bdc/bdc_core.c

   1 /*
   2  * bdc_core.c - BRCM BDC USB3.0 device controller core operations
   3  *
   4  * Copyright (C) 2014 Broadcom Corporation
   5  *
   6  * Author: Ashwini Pahuja
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License as published by the
  10  * Free Software Foundation; either version 2 of the License, or (at your
  11  * option) any later version.
  12  *
  13  */
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/slab.h>
  17 #include <linux/spinlock.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/ioport.h>
  21 #include <linux/io.h>
  22 #include <linux/list.h>
  23 #include <linux/delay.h>
  24 #include <linux/dma-mapping.h>
  25 #include <linux/dmapool.h>
  26 #include <linux/of.h>
  27 #include <linux/phy/phy.h>
  28 #include <linux/moduleparam.h>
  29 #include <linux/usb/ch9.h>
  30 #include <linux/usb/gadget.h>
  31 #include <linux/clk.h>
  32
  33 #include "bdc.h"
  34 #include "bdc_dbg.h"
  35
  36 /* Poll till controller status is not OIP */
  37 static int poll_oip(struct bdc *bdc, int usec)
  38 {
  39         u32 status;
  40         /* Poll till STS!= OIP */
  41         while (usec) {
  42                 status = bdc_readl(bdc->regs, BDC_BDCSC);
  43                 if (BDC_CSTS(status) != BDC_OIP) {
  44                         dev_dbg(bdc->dev,
  45                                 "poll_oip complete status=%d",
  46                                 BDC_CSTS(status));
  47                         return 0;
  48                 }
  49                 udelay(10);
  50                 usec -= 10;
  51         }
  52         dev_err(bdc->dev, "Err: operation timedout BDCSC: 0x%08x\n", status);
  53
  54         return -ETIMEDOUT;
  55 }
  56
  57 /* Stop the BDC controller */
  58 int bdc_stop(struct bdc *bdc)
  59 {
  60         int ret;
  61         u32 temp;
  62
  63         dev_dbg(bdc->dev, "%s ()\n\n", __func__);
  64         temp = bdc_readl(bdc->regs, BDC_BDCSC);
  65         /* Check if BDC is already halted */
  66         if (BDC_CSTS(temp) == BDC_HLT) {
  67                 dev_vdbg(bdc->dev, "BDC already halted\n");
  68                 return 0;
  69         }
  70         temp &= ~BDC_COP_MASK;
  71         temp |= BDC_COS|BDC_COP_STP;
  72         bdc_writel(bdc->regs, BDC_BDCSC, temp);
  73
  74         ret = poll_oip(bdc, BDC_COP_TIMEOUT);
  75         if (ret)
  76                 dev_err(bdc->dev, "bdc stop operation failed");
  77
  78         return ret;
  79 }
  80
  81 /* Issue a reset to BDC controller */
  82 int bdc_reset(struct bdc *bdc)
  83 {
  84         u32 temp;
  85         int ret;
  86
  87         dev_dbg(bdc->dev, "%s ()\n", __func__);
  88         /* First halt the controller */
  89         ret = bdc_stop(bdc);
  90         if (ret)
  91                 return ret;
  92
  93         temp = bdc_readl(bdc->regs, BDC_BDCSC);
  94         temp &= ~BDC_COP_MASK;
  95         temp |= BDC_COS|BDC_COP_RST;
  96         bdc_writel(bdc->regs, BDC_BDCSC, temp);
  97         ret = poll_oip(bdc, BDC_COP_TIMEOUT);
  98         if (ret)
  99                 dev_err(bdc->dev, "bdc reset operation failed");
 100
 101         return ret;
 102 }
 103
 104 /* Run the BDC controller */
 105 int bdc_run(struct bdc *bdc)
 106 {
 107         u32 temp;
 108         int ret;
 109
 110         dev_dbg(bdc->dev, "%s ()\n", __func__);
 111         temp = bdc_readl(bdc->regs, BDC_BDCSC);
 112         /* if BDC is already in running state then do not do anything */
 113         if (BDC_CSTS(temp) == BDC_NOR) {
 114                 dev_warn(bdc->dev, "bdc is already in running state\n");
 115                 return 0;
 116         }
 117         temp &= ~BDC_COP_MASK;
 118         temp |= BDC_COP_RUN;
 119         temp |= BDC_COS;
 120         bdc_writel(bdc->regs, BDC_BDCSC, temp);
 121         ret = poll_oip(bdc, BDC_COP_TIMEOUT);
 122         if (ret) {
 123                 dev_err(bdc->dev, "bdc run operation failed:%d", ret);
 124                 return ret;
 125         }
 126         temp = bdc_readl(bdc->regs, BDC_BDCSC);
 127         if (BDC_CSTS(temp) != BDC_NOR) {
 128                 dev_err(bdc->dev, "bdc not in normal mode after RUN op :%d\n",
 129                                                                 BDC_CSTS(temp));
 130                 return -ESHUTDOWN;
 131         }
 132
 133         return 0;
 134 }
 135
 136 /*
 137  * Present the termination to the host, typically called from upstream port
 138  * event with Vbus present =1
 139  */
 140 void bdc_softconn(struct bdc *bdc)
 141 {
 142         u32 uspc;
 143
 144         uspc = bdc_readl(bdc->regs, BDC_USPC);
 145         uspc &= ~BDC_PST_MASK;
 146         uspc |= BDC_LINK_STATE_RX_DET;
 147         uspc |= BDC_SWS;
 148         dev_dbg(bdc->dev, "%s () uspc=%08x\n", __func__, uspc);
 149         bdc_writel(bdc->regs, BDC_USPC, uspc);
 150 }
 151
 152 /* Remove the termination */
 153 void bdc_softdisconn(struct bdc *bdc)
 154 {
 155         u32 uspc;
 156
 157         uspc = bdc_readl(bdc->regs, BDC_USPC);
 158         uspc |= BDC_SDC;
 159         uspc &= ~BDC_SCN;
 160         dev_dbg(bdc->dev, "%s () uspc=%x\n", __func__, uspc);
 161         bdc_writel(bdc->regs, BDC_USPC, uspc);
 162 }
 163
 164 /* Set up the scratchpad buffer array and scratchpad buffers, if needed. */
 165 static int scratchpad_setup(struct bdc *bdc)
 166 {
 167         int sp_buff_size;
 168         u32 low32;
 169         u32 upp32;
 170
 171         sp_buff_size = BDC_SPB(bdc_readl(bdc->regs, BDC_BDCCFG0));
 172         dev_dbg(bdc->dev, "%s() sp_buff_size=%d\n", __func__, sp_buff_size);
 173         if (!sp_buff_size) {
 174                 dev_dbg(bdc->dev, "Scratchpad buffer not needed\n");
 175                 return 0;
 176         }
 177         /* Refer to BDC spec, Table 4 for description of SPB */
 178         sp_buff_size = 1 << (sp_buff_size + 5);
 179         dev_dbg(bdc->dev, "Allocating %d bytes for scratchpad\n", sp_buff_size);
 180         bdc->scratchpad.buff  =  dma_zalloc_coherent(bdc->dev, sp_buff_size,
 181                                         &bdc->scratchpad.sp_dma, GFP_KERNEL);
 182
 183         if (!bdc->scratchpad.buff)
 184                 goto fail;
 185
 186         bdc->sp_buff_size = sp_buff_size;
 187         bdc->scratchpad.size = sp_buff_size;
 188         low32 = lower_32_bits(bdc->scratchpad.sp_dma);
 189         upp32 = upper_32_bits(bdc->scratchpad.sp_dma);
 190         cpu_to_le32s(&low32);
 191         cpu_to_le32s(&upp32);
 192         bdc_writel(bdc->regs, BDC_SPBBAL, low32);
 193         bdc_writel(bdc->regs, BDC_SPBBAH, upp32);
 194         return 0;
 195
 196 fail:
 197         bdc->scratchpad.buff = NULL;
 198
 199         return -ENOMEM;
 200 }
 201
 202 /* Allocate the status report ring */
 203 static int setup_srr(struct bdc *bdc, int interrupter)
 204 {
 205         dev_dbg(bdc->dev, "%s() NUM_SR_ENTRIES:%d\n", __func__, NUM_SR_ENTRIES);
 206         /* Reset the SRR */
 207         bdc_writel(bdc->regs, BDC_SRRINT(0), BDC_SRR_RWS | BDC_SRR_RST);
 208         bdc->srr.dqp_index = 0;
 209         /* allocate the status report descriptors */
 210         bdc->srr.sr_bds = dma_zalloc_coherent(
 211                                         bdc->dev,
 212                                         NUM_SR_ENTRIES * sizeof(struct bdc_bd),
 213                                         &bdc->srr.dma_addr,
 214                                         GFP_KERNEL);
 215         if (!bdc->srr.sr_bds)
 216                 return -ENOMEM;
 217
 218         return 0;
 219 }
 220
 221 /* Initialize the HW regs and internal data structures */
 222 static void bdc_mem_init(struct bdc *bdc, bool reinit)
 223 {
 224         u8 size = 0;
 225         u32 usb2_pm;
 226         u32 low32;
 227         u32 upp32;
 228         u32 temp;
 229
 230         dev_dbg(bdc->dev, "%s ()\n", __func__);
 231         bdc->ep0_state = WAIT_FOR_SETUP;
 232         bdc->dev_addr = 0;
 233         bdc->srr.eqp_index = 0;
 234         bdc->srr.dqp_index = 0;
 235         bdc->zlp_needed = false;
 236         bdc->delayed_status = false;
 237
 238         bdc_writel(bdc->regs, BDC_SPBBAL, bdc->scratchpad.sp_dma);
 239         /* Init the SRR */
 240         temp = BDC_SRR_RWS | BDC_SRR_RST;
 241         /* Reset the SRR */
 242         bdc_writel(bdc->regs, BDC_SRRINT(0), temp);
 243         dev_dbg(bdc->dev, "bdc->srr.sr_bds =%p\n", bdc->srr.sr_bds);
 244         temp = lower_32_bits(bdc->srr.dma_addr);
 245         size = fls(NUM_SR_ENTRIES) - 2;
 246         temp |= size;
 247         dev_dbg(bdc->dev, "SRRBAL[0]=%08x NUM_SR_ENTRIES:%d size:%d\n",
 248                                                 temp, NUM_SR_ENTRIES, size);
 249
 250         low32 = lower_32_bits(temp);
 251         upp32 = upper_32_bits(bdc->srr.dma_addr);
 252         cpu_to_le32s(&low32);
 253         cpu_to_le32s(&upp32);
 254
 255         /* Write the dma addresses into regs*/
 256         bdc_writel(bdc->regs, BDC_SRRBAL(0), low32);
 257         bdc_writel(bdc->regs, BDC_SRRBAH(0), upp32);
 258
 259         temp = bdc_readl(bdc->regs, BDC_SRRINT(0));
 260         temp |= BDC_SRR_IE;
 261         temp &= ~(BDC_SRR_RST | BDC_SRR_RWS);
 262         bdc_writel(bdc->regs, BDC_SRRINT(0), temp);
 263
 264         /* Set the Interrupt Coalescence ~500 usec */
 265         temp = bdc_readl(bdc->regs, BDC_INTCTLS(0));
 266         temp &= ~0xffff;
 267         temp |= INT_CLS;
 268         bdc_writel(bdc->regs, BDC_INTCTLS(0), temp);
 269
 270         usb2_pm = bdc_readl(bdc->regs, BDC_USPPM2);
 271         dev_dbg(bdc->dev, "usb2_pm=%08x", usb2_pm);
 272         /* Enable hardware LPM Enable */
 273         usb2_pm |= BDC_HLE;
 274         bdc_writel(bdc->regs, BDC_USPPM2, usb2_pm);
 275
 276         /* readback for debug */
 277         usb2_pm = bdc_readl(bdc->regs, BDC_USPPM2);
 278         dev_dbg(bdc->dev, "usb2_pm=%08x\n", usb2_pm);
 279
 280         /* Disable any unwanted SR's on SRR */
 281         temp = bdc_readl(bdc->regs, BDC_BDCSC);
 282         /* We don't want Microframe counter wrap SR */
 283         temp |= BDC_MASK_MCW;
 284         bdc_writel(bdc->regs, BDC_BDCSC, temp);
 285
 286         /*
 287          * In some error cases, driver has to reset the entire BDC controller
 288          * in that case reinit is passed as 1
 289          */
 290         if (reinit) {
 291                 int i;
 292                 /* Enable interrupts */
 293                 temp = bdc_readl(bdc->regs, BDC_BDCSC);
 294                 temp |= BDC_GIE;
 295                 bdc_writel(bdc->regs, BDC_BDCSC, temp);
 296                 /* Init scratchpad to 0 */
 297                 memset(bdc->scratchpad.buff, 0, bdc->sp_buff_size);
 298                 /* Initialize SRR to 0 */
 299                 memset(bdc->srr.sr_bds, 0,
 300                                         NUM_SR_ENTRIES * sizeof(struct bdc_bd));
 301                 /* clear ep flags to avoid post disconnect stops/deconfigs */
 302                 for (i = 1; i < bdc->num_eps; ++i)
 303                         bdc->bdc_ep_array[i]->flags = 0;
 304         } else {
 305                 /* One time initiaization only */
 306                 /* Enable status report function pointers */
 307                 bdc->sr_handler[0] = bdc_sr_xsf;
 308                 bdc->sr_handler[1] = bdc_sr_uspc;
 309
 310                 /* EP0 status report function pointers */
 311                 bdc->sr_xsf_ep0[0] = bdc_xsf_ep0_setup_recv;
 312                 bdc->sr_xsf_ep0[1] = bdc_xsf_ep0_data_start;
 313                 bdc->sr_xsf_ep0[2] = bdc_xsf_ep0_status_start;
 314         }
 315 }
 316
 317 /* Free the dynamic memory */
 318 static void bdc_mem_free(struct bdc *bdc)
 319 {
 320         dev_dbg(bdc->dev, "%s\n", __func__);
 321         /* Free SRR */
 322         if (bdc->srr.sr_bds)
 323                 dma_free_coherent(bdc->dev,
 324                                         NUM_SR_ENTRIES * sizeof(struct bdc_bd),
 325                                         bdc->srr.sr_bds, bdc->srr.dma_addr);
 326
 327         /* Free scratchpad */
 328         if (bdc->scratchpad.buff)
 329                 dma_free_coherent(bdc->dev, bdc->sp_buff_size,
 330                                 bdc->scratchpad.buff, bdc->scratchpad.sp_dma);
 331
 332         /* Destroy the dma pools */
 333         dma_pool_destroy(bdc->bd_table_pool);
 334
 335         /* Free the bdc_ep array */
 336         kfree(bdc->bdc_ep_array);
 337
 338         bdc->srr.sr_bds = NULL;
 339         bdc->scratchpad.buff = NULL;
 340         bdc->bd_table_pool = NULL;
 341         bdc->bdc_ep_array = NULL;
 342 }
 343
 344 /*
 345  * bdc reinit gives a controller reset and reinitialize the registers,
 346  * called from disconnect/bus reset scenario's, to ensure proper HW cleanup
 347  */
 348 int bdc_reinit(struct bdc *bdc)
 349 {
 350         int ret;
 351
 352         dev_dbg(bdc->dev, "%s\n", __func__);
 353         ret = bdc_stop(bdc);
 354         if (ret)
 355                 goto out;
 356
 357         ret = bdc_reset(bdc);
 358         if (ret)
 359                 goto out;
 360
 361         /* the reinit flag is 1 */
 362         bdc_mem_init(bdc, true);
 363         ret = bdc_run(bdc);
 364 out:
 365         bdc->reinit = false;
 366
 367         return ret;
 368 }
 369
 370 /* Allocate all the dyanmic memory */
 371 static int bdc_mem_alloc(struct bdc *bdc)
 372 {
 373         u32 page_size;
 374         unsigned int num_ieps, num_oeps;
 375
 376         dev_dbg(bdc->dev,
 377                 "%s() NUM_BDS_PER_TABLE:%d\n", __func__,
 378                 NUM_BDS_PER_TABLE);
 379         page_size = BDC_PGS(bdc_readl(bdc->regs, BDC_BDCCFG0));
 380         /* page size is 2^pgs KB */
 381         page_size = 1 << page_size;
 382         /* KB */
 383         page_size <<= 10;
 384         dev_dbg(bdc->dev, "page_size=%d\n", page_size);
 385
 386         /* Create a pool of bd tables */
 387         bdc->bd_table_pool =
 388             dma_pool_create("BDC BD tables", bdc->dev, NUM_BDS_PER_TABLE * 16,
 389                                                                 16, page_size);
 390
 391         if (!bdc->bd_table_pool)
 392                 goto fail;
 393
 394         if (scratchpad_setup(bdc))
 395                 goto fail;
 396
 397         /* read from regs */
 398         num_ieps = NUM_NCS(bdc_readl(bdc->regs, BDC_FSCNIC));
 399         num_oeps = NUM_NCS(bdc_readl(bdc->regs, BDC_FSCNOC));
 400         /* +2: 1 for ep0 and the other is rsvd i.e. bdc_ep[0] is rsvd */
 401         bdc->num_eps = num_ieps + num_oeps + 2;
 402         dev_dbg(bdc->dev,
 403                 "ieps:%d eops:%d num_eps:%d\n",
 404                 num_ieps, num_oeps, bdc->num_eps);
 405         /* allocate array of ep pointers */
 406         bdc->bdc_ep_array = kcalloc(bdc->num_eps, sizeof(struct bdc_ep *),
 407                                                                 GFP_KERNEL);
 408         if (!bdc->bdc_ep_array)
 409                 goto fail;
 410
 411         dev_dbg(bdc->dev, "Allocating sr report0\n");
 412         if (setup_srr(bdc, 0))
 413                 goto fail;
 414
 415         return 0;
 416 fail:
 417         dev_warn(bdc->dev, "Couldn't initialize memory\n");
 418         bdc_mem_free(bdc);
 419
 420         return -ENOMEM;
 421 }
 422
 423 /* opposite to bdc_hw_init */
 424 static void bdc_hw_exit(struct bdc *bdc)
 425 {
 426         dev_dbg(bdc->dev, "%s ()\n", __func__);
 427         bdc_mem_free(bdc);
 428 }
 429
 430 /* Initialize the bdc HW and memory */
 431 static int bdc_hw_init(struct bdc *bdc)
 432 {
 433         int ret;
 434
 435         dev_dbg(bdc->dev, "%s ()\n", __func__);
 436         ret = bdc_reset(bdc);
 437         if (ret) {
 438                 dev_err(bdc->dev, "err resetting bdc abort bdc init%d\n", ret);
 439                 return ret;
 440         }
 441         ret = bdc_mem_alloc(bdc);
 442         if (ret) {
 443                 dev_err(bdc->dev, "Mem alloc failed, aborting\n");
 444                 return -ENOMEM;
 445         }
 446         bdc_mem_init(bdc, 0);
 447         bdc_dbg_regs(bdc);
 448         dev_dbg(bdc->dev, "HW Init done\n");
 449
 450         return 0;
 451 }
 452
 453 static int bdc_phy_init(struct bdc *bdc)
 454 {
 455         int phy_num;
 456         int ret;
 457
 458         for (phy_num = 0; phy_num < bdc->num_phys; phy_num++) {
 459                 ret = phy_init(bdc->phys[phy_num]);
 460                 if (ret)
 461                         goto err_exit_phy;
 462                 ret = phy_power_on(bdc->phys[phy_num]);
 463                 if (ret) {
 464                         phy_exit(bdc->phys[phy_num]);
 465                         goto err_exit_phy;
 466                 }
 467         }
 468
 469         return 0;
 470
 471 err_exit_phy:
 472         while (--phy_num >= 0) {
 473                 phy_power_off(bdc->phys[phy_num]);
 474                 phy_exit(bdc->phys[phy_num]);
 475         }
 476
 477         return ret;
 478 }
 479
 480 static void bdc_phy_exit(struct bdc *bdc)
 481 {
 482         int phy_num;
 483
 484         for (phy_num = 0; phy_num < bdc->num_phys; phy_num++) {
 485                 phy_power_off(bdc->phys[phy_num]);
 486                 phy_exit(bdc->phys[phy_num]);
 487         }
 488 }
 489
 490 static int bdc_probe(struct platform_device *pdev)
 491 {
 492         struct bdc *bdc;
 493         struct resource *res;
 494         int ret = -ENOMEM;
 495         int irq;
 496         u32 temp;
 497         struct device *dev = &pdev->dev;
 498         struct clk *clk;
 499         int phy_num;
 500
 501         dev_dbg(dev, "%s()\n", __func__);
 502
 503         clk = devm_clk_get(dev, "sw_usbd");
 504         if (IS_ERR(clk)) {
 505                 dev_info(dev, "Clock not found in Device Tree\n");
 506                 clk = NULL;
 507         }
 508
 509         ret = clk_prepare_enable(clk);
 510         if (ret) {
 511                 dev_err(dev, "could not enable clock\n");
 512                 return ret;
 513         }
 514
 515         bdc = devm_kzalloc(dev, sizeof(*bdc), GFP_KERNEL);
 516         if (!bdc)
 517                 return -ENOMEM;
 518
 519         bdc->clk = clk;
 520
 521         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 522         bdc->regs = devm_ioremap_resource(dev, res);
 523         if (IS_ERR(bdc->regs)) {
 524                 dev_err(dev, "ioremap error\n");
 525                 return -ENOMEM;
 526         }
 527         irq = platform_get_irq(pdev, 0);
 528         if (irq < 0) {
 529                 dev_err(dev, "platform_get_irq failed:%d\n", irq);
 530                 return irq;
 531         }
 532         spin_lock_init(&bdc->lock);
 533         platform_set_drvdata(pdev, bdc);
 534         bdc->irq = irq;
 535         bdc->dev = dev;
 536         dev_dbg(dev, "bdc->regs: %p irq=%d\n", bdc->regs, bdc->irq);
 537
 538         bdc->num_phys = of_count_phandle_with_args(dev->of_node,
 539                                                 "phys", "#phy-cells");
 540         if (bdc->num_phys > 0) {
 541                 bdc->phys = devm_kcalloc(dev, bdc->num_phys,
 542                                         sizeof(struct phy *), GFP_KERNEL);
 543                 if (!bdc->phys)
 544                         return -ENOMEM;
 545         } else {
 546                 bdc->num_phys = 0;
 547         }
 548         dev_info(dev, "Using %d phy(s)\n", bdc->num_phys);
 549
 550         for (phy_num = 0; phy_num < bdc->num_phys; phy_num++) {
 551                 bdc->phys[phy_num] = devm_of_phy_get_by_index(
 552                         dev, dev->of_node, phy_num);
 553                 if (IS_ERR(bdc->phys[phy_num])) {
 554                         ret = PTR_ERR(bdc->phys[phy_num]);
 555                         dev_err(bdc->dev,
 556                                 "BDC phy specified but not found:%d\n", ret);
 557                         return ret;
 558                 }
 559         }
 560
 561         ret = bdc_phy_init(bdc);
 562         if (ret) {
 563                 dev_err(bdc->dev, "BDC phy init failure:%d\n", ret);
 564                 return ret;
 565         }
 566
 567         temp = bdc_readl(bdc->regs, BDC_BDCCAP1);
 568         if ((temp & BDC_P64) &&
 569                         !dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))) {
 570                 dev_dbg(dev, "Using 64-bit address\n");
 571         } else {
 572                 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
 573                 if (ret) {
 574                         dev_err(dev,
 575                                 "No suitable DMA config available, abort\n");
 576                         ret = -ENOTSUPP;
 577                         goto phycleanup;
 578                 }
 579                 dev_dbg(dev, "Using 32-bit address\n");
 580         }
 581         ret = bdc_hw_init(bdc);
 582         if (ret) {
 583                 dev_err(dev, "BDC init failure:%d\n", ret);
 584                 goto phycleanup;
 585         }
 586         ret = bdc_udc_init(bdc);
 587         if (ret) {
 588                 dev_err(dev, "BDC Gadget init failure:%d\n", ret);
 589                 goto cleanup;
 590         }
 591         return 0;
 592
 593 cleanup:
 594         bdc_hw_exit(bdc);
 595 phycleanup:
 596         bdc_phy_exit(bdc);
 597         return ret;
 598 }
 599
 600 static int bdc_remove(struct platform_device *pdev)
 601 {
 602         struct bdc *bdc;
 603
 604         bdc  = platform_get_drvdata(pdev);
 605         dev_dbg(bdc->dev, "%s ()\n", __func__);
 606         bdc_udc_exit(bdc);
 607         bdc_hw_exit(bdc);
 608         bdc_phy_exit(bdc);
 609         clk_disable_unprepare(bdc->clk);
 610         return 0;
 611 }
 612
 613 #ifdef CONFIG_PM_SLEEP
 614 static int bdc_suspend(struct device *dev)
 615 {
 616         struct bdc *bdc = dev_get_drvdata(dev);
 617         int ret;
 618
 619         /* Halt the controller */
 620         ret = bdc_stop(bdc);
 621         if (!ret)
 622                 clk_disable_unprepare(bdc->clk);
 623
 624         return ret;
 625 }
 626
 627 static int bdc_resume(struct device *dev)
 628 {
 629         struct bdc *bdc = dev_get_drvdata(dev);
 630         int ret;
 631
 632         ret = clk_prepare_enable(bdc->clk);
 633         if (ret) {
 634                 dev_err(bdc->dev, "err enabling the clock\n");
 635                 return ret;
 636         }
 637         ret = bdc_reinit(bdc);
 638         if (ret) {
 639                 dev_err(bdc->dev, "err in bdc reinit\n");
 640                 return ret;
 641         }
 642
 643         return 0;
 644 }
 645
 646 #endif /* CONFIG_PM_SLEEP */
 647
 648 static SIMPLE_DEV_PM_OPS(bdc_pm_ops, bdc_suspend,
 649                 bdc_resume);
 650
 651 static const struct of_device_id bdc_of_match[] = {
 652         { .compatible = "brcm,bdc-v0.16" },
 653         { .compatible = "brcm,bdc" },
 654         { /* sentinel */ }
 655 };
 656
 657 static struct platform_driver bdc_driver = {
 658         .driver         = {
 659                 .name   = BRCM_BDC_NAME,
 660                 .owner  = THIS_MODULE,
 661                 .pm = &bdc_pm_ops,
 662                 .of_match_table = bdc_of_match,
 663         },
 664         .probe          = bdc_probe,
 665         .remove         = bdc_remove,
 666 };
 667
 668 module_platform_driver(bdc_driver);
 669 MODULE_AUTHOR("Ashwini Pahuja <ashwini.linux@gmail.com>");
 670 MODULE_LICENSE("GPL");
 671 MODULE_DESCRIPTION(BRCM_BDC_DESC);