drivers/usb/gadget/udc/s3c2410_udc.c

   1 /*
   2  * linux/drivers/usb/gadget/s3c2410_udc.c
   3  *
   4  * Samsung S3C24xx series on-chip full speed USB device controllers
   5  *
   6  * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
   7  *      Additional cleanups by Ben Dooks <ben-linux@fluff.org>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  */
  14
  15 #define pr_fmt(fmt) "s3c2410_udc: " fmt
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/delay.h>
  20 #include <linux/ioport.h>
  21 #include <linux/sched.h>
  22 #include <linux/slab.h>
  23 #include <linux/errno.h>
  24 #include <linux/init.h>
  25 #include <linux/timer.h>
  26 #include <linux/list.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/clk.h>
  30 #include <linux/gpio.h>
  31 #include <linux/prefetch.h>
  32 #include <linux/io.h>
  33
  34 #include <linux/debugfs.h>
  35 #include <linux/seq_file.h>
  36
  37 #include <linux/usb.h>
  38 #include <linux/usb/gadget.h>
  39
  40 #include <asm/byteorder.h>
  41 #include <asm/irq.h>
  42 #include <asm/unaligned.h>
  43 #include <mach/irqs.h>
  44
  45 #include <mach/hardware.h>
  46
  47 #include <plat/regs-udc.h>
  48 #include <linux/platform_data/usb-s3c2410_udc.h>
  49
  50
  51 #include "s3c2410_udc.h"
  52
  53 #define DRIVER_DESC     "S3C2410 USB Device Controller Gadget"
  54 #define DRIVER_VERSION  "29 Apr 2007"
  55 #define DRIVER_AUTHOR   "Herbert Pötzl <herbert@13thfloor.at>, " \
  56                         "Arnaud Patard <arnaud.patard@rtp-net.org>"
  57
  58 static const char               gadget_name[] = "s3c2410_udc";
  59 static const char               driver_desc[] = DRIVER_DESC;
  60
  61 static struct s3c2410_udc       *the_controller;
  62 static struct clk               *udc_clock;
  63 static struct clk               *usb_bus_clock;
  64 static void __iomem             *base_addr;
  65 static u64                      rsrc_start;
  66 static u64                      rsrc_len;
  67 static struct dentry            *s3c2410_udc_debugfs_root;
  68
  69 static inline u32 udc_read(u32 reg)
  70 {
  71         return readb(base_addr + reg);
  72 }
  73
  74 static inline void udc_write(u32 value, u32 reg)
  75 {
  76         writeb(value, base_addr + reg);
  77 }
  78
  79 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
  80 {
  81         writeb(value, base + reg);
  82 }
  83
  84 static struct s3c2410_udc_mach_info *udc_info;
  85
  86 /*************************** DEBUG FUNCTION ***************************/
  87 #define DEBUG_NORMAL    1
  88 #define DEBUG_VERBOSE   2
  89
  90 #ifdef CONFIG_USB_S3C2410_DEBUG
  91 #define USB_S3C2410_DEBUG_LEVEL 0
  92
  93 static uint32_t s3c2410_ticks = 0;
  94
  95 __printf(2, 3)
  96 static void dprintk(int level, const char *fmt, ...)
  97 {
  98         static long prevticks;
  99         static int invocation;
 100         struct va_format vaf;
 101         va_list args;
 102
 103         if (level > USB_S3C2410_DEBUG_LEVEL)
 104                 return;
 105
 106         va_start(args, fmt);
 107
 108         vaf.fmt = fmt;
 109         vaf.va = &args;
 110
 111         if (s3c2410_ticks != prevticks) {
 112                 prevticks = s3c2410_ticks;
 113                 invocation = 0;
 114         }
 115
 116         pr_debug("%1lu.%02d USB: %pV", prevticks, invocation++, &vaf);
 117
 118         va_end(args);
 119 }
 120 #else
 121 __printf(2, 3)
 122 static void dprintk(int level, const char *fmt, ...)
 123 {
 124 }
 125 #endif
 126
 127 static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
 128 {
 129         u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg;
 130         u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
 131         u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2;
 132         u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2;
 133
 134         addr_reg       = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
 135         pwr_reg        = udc_read(S3C2410_UDC_PWR_REG);
 136         ep_int_reg     = udc_read(S3C2410_UDC_EP_INT_REG);
 137         usb_int_reg    = udc_read(S3C2410_UDC_USB_INT_REG);
 138         ep_int_en_reg  = udc_read(S3C2410_UDC_EP_INT_EN_REG);
 139         usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
 140         udc_write(0, S3C2410_UDC_INDEX_REG);
 141         ep0_csr        = udc_read(S3C2410_UDC_IN_CSR1_REG);
 142         udc_write(1, S3C2410_UDC_INDEX_REG);
 143         ep1_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 144         ep1_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 145         ep1_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 146         ep1_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 147         udc_write(2, S3C2410_UDC_INDEX_REG);
 148         ep2_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 149         ep2_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 150         ep2_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 151         ep2_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 152
 153         seq_printf(m, "FUNC_ADDR_REG  : 0x%04X\n"
 154                  "PWR_REG        : 0x%04X\n"
 155                  "EP_INT_REG     : 0x%04X\n"
 156                  "USB_INT_REG    : 0x%04X\n"
 157                  "EP_INT_EN_REG  : 0x%04X\n"
 158                  "USB_INT_EN_REG : 0x%04X\n"
 159                  "EP0_CSR        : 0x%04X\n"
 160                  "EP1_I_CSR1     : 0x%04X\n"
 161                  "EP1_I_CSR2     : 0x%04X\n"
 162                  "EP1_O_CSR1     : 0x%04X\n"
 163                  "EP1_O_CSR2     : 0x%04X\n"
 164                  "EP2_I_CSR1     : 0x%04X\n"
 165                  "EP2_I_CSR2     : 0x%04X\n"
 166                  "EP2_O_CSR1     : 0x%04X\n"
 167                  "EP2_O_CSR2     : 0x%04X\n",
 168                         addr_reg, pwr_reg, ep_int_reg, usb_int_reg,
 169                         ep_int_en_reg, usb_int_en_reg, ep0_csr,
 170                         ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2,
 171                         ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2
 172                 );
 173
 174         return 0;
 175 }
 176
 177 static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
 178                                          struct file *file)
 179 {
 180         return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
 181 }
 182
 183 static const struct file_operations s3c2410_udc_debugfs_fops = {
 184         .open           = s3c2410_udc_debugfs_fops_open,
 185         .read           = seq_read,
 186         .llseek         = seq_lseek,
 187         .release        = single_release,
 188         .owner          = THIS_MODULE,
 189 };
 190
 191 /* io macros */
 192
 193 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
 194 {
 195         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 196         udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
 197                         S3C2410_UDC_EP0_CSR_REG);
 198 }
 199
 200 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
 201 {
 202         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 203         writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
 204 }
 205
 206 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
 207 {
 208         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 209         udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
 210 }
 211
 212 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
 213 {
 214         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 215         udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
 216 }
 217
 218 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
 219 {
 220         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 221         udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
 222 }
 223
 224 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
 225 {
 226         udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 227         udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
 228 }
 229
 230 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
 231 {
 232         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 233
 234         udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
 235                                 | S3C2410_UDC_EP0_CSR_DE),
 236                         S3C2410_UDC_EP0_CSR_REG);
 237 }
 238
 239 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
 240 {
 241         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 242         udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
 243                         | S3C2410_UDC_EP0_CSR_DE),
 244                 S3C2410_UDC_EP0_CSR_REG);
 245 }
 246
 247 /*------------------------- I/O ----------------------------------*/
 248
 249 /*
 250  *      s3c2410_udc_done
 251  */
 252 static void s3c2410_udc_done(struct s3c2410_ep *ep,
 253                 struct s3c2410_request *req, int status)
 254 {
 255         unsigned halted = ep->halted;
 256
 257         list_del_init(&req->queue);
 258
 259         if (likely(req->req.status == -EINPROGRESS))
 260                 req->req.status = status;
 261         else
 262                 status = req->req.status;
 263
 264         ep->halted = 1;
 265         usb_gadget_giveback_request(&ep->ep, &req->req);
 266         ep->halted = halted;
 267 }
 268
 269 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
 270                 struct s3c2410_ep *ep, int status)
 271 {
 272         while (!list_empty(&ep->queue)) {
 273                 struct s3c2410_request *req;
 274                 req = list_entry(ep->queue.next, struct s3c2410_request,
 275                                 queue);
 276                 s3c2410_udc_done(ep, req, status);
 277         }
 278 }
 279
 280 static inline int s3c2410_udc_fifo_count_out(void)
 281 {
 282         int tmp;
 283
 284         tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
 285         tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
 286         return tmp;
 287 }
 288
 289 /*
 290  *      s3c2410_udc_write_packet
 291  */
 292 static inline int s3c2410_udc_write_packet(int fifo,
 293                 struct s3c2410_request *req,
 294                 unsigned max)
 295 {
 296         unsigned len = min(req->req.length - req->req.actual, max);
 297         u8 *buf = req->req.buf + req->req.actual;
 298
 299         prefetch(buf);
 300
 301         dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
 302                 req->req.actual, req->req.length, len, req->req.actual + len);
 303
 304         req->req.actual += len;
 305
 306         udelay(5);
 307         writesb(base_addr + fifo, buf, len);
 308         return len;
 309 }
 310
 311 /*
 312  *      s3c2410_udc_write_fifo
 313  *
 314  * return:  0 = still running, 1 = completed, negative = errno
 315  */
 316 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
 317                 struct s3c2410_request *req)
 318 {
 319         unsigned        count;
 320         int             is_last;
 321         u32             idx;
 322         int             fifo_reg;
 323         u32             ep_csr;
 324
 325         idx = ep->bEndpointAddress & 0x7F;
 326         switch (idx) {
 327         default:
 328                 idx = 0;
 329         case 0:
 330                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 331                 break;
 332         case 1:
 333                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 334                 break;
 335         case 2:
 336                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 337                 break;
 338         case 3:
 339                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 340                 break;
 341         case 4:
 342                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 343                 break;
 344         }
 345
 346         count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
 347
 348         /* last packet is often short (sometimes a zlp) */
 349         if (count != ep->ep.maxpacket)
 350                 is_last = 1;
 351         else if (req->req.length != req->req.actual || req->req.zero)
 352                 is_last = 0;
 353         else
 354                 is_last = 2;
 355
 356         /* Only ep0 debug messages are interesting */
 357         if (idx == 0)
 358                 dprintk(DEBUG_NORMAL,
 359                         "Written ep%d %d.%d of %d b [last %d,z %d]\n",
 360                         idx, count, req->req.actual, req->req.length,
 361                         is_last, req->req.zero);
 362
 363         if (is_last) {
 364                 /* The order is important. It prevents sending 2 packets
 365                  * at the same time */
 366
 367                 if (idx == 0) {
 368                         /* Reset signal => no need to say 'data sent' */
 369                         if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 370                                         & S3C2410_UDC_USBINT_RESET))
 371                                 s3c2410_udc_set_ep0_de_in(base_addr);
 372                         ep->dev->ep0state = EP0_IDLE;
 373                 } else {
 374                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 375                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 376                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 377                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 378                                         S3C2410_UDC_IN_CSR1_REG);
 379                 }
 380
 381                 s3c2410_udc_done(ep, req, 0);
 382                 is_last = 1;
 383         } else {
 384                 if (idx == 0) {
 385                         /* Reset signal => no need to say 'data sent' */
 386                         if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 387                                         & S3C2410_UDC_USBINT_RESET))
 388                                 s3c2410_udc_set_ep0_ipr(base_addr);
 389                 } else {
 390                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 391                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 392                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 393                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 394                                         S3C2410_UDC_IN_CSR1_REG);
 395                 }
 396         }
 397
 398         return is_last;
 399 }
 400
 401 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
 402                 struct s3c2410_request *req, unsigned avail)
 403 {
 404         unsigned len;
 405
 406         len = min(req->req.length - req->req.actual, avail);
 407         req->req.actual += len;
 408
 409         readsb(fifo + base_addr, buf, len);
 410         return len;
 411 }
 412
 413 /*
 414  * return:  0 = still running, 1 = queue empty, negative = errno
 415  */
 416 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
 417                                  struct s3c2410_request *req)
 418 {
 419         u8              *buf;
 420         u32             ep_csr;
 421         unsigned        bufferspace;
 422         int             is_last = 1;
 423         unsigned        avail;
 424         int             fifo_count = 0;
 425         u32             idx;
 426         int             fifo_reg;
 427
 428         idx = ep->bEndpointAddress & 0x7F;
 429
 430         switch (idx) {
 431         default:
 432                 idx = 0;
 433         case 0:
 434                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 435                 break;
 436         case 1:
 437                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 438                 break;
 439         case 2:
 440                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 441                 break;
 442         case 3:
 443                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 444                 break;
 445         case 4:
 446                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 447                 break;
 448         }
 449
 450         if (!req->req.length)
 451                 return 1;
 452
 453         buf = req->req.buf + req->req.actual;
 454         bufferspace = req->req.length - req->req.actual;
 455         if (!bufferspace) {
 456                 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
 457                 return -1;
 458         }
 459
 460         udc_write(idx, S3C2410_UDC_INDEX_REG);
 461
 462         fifo_count = s3c2410_udc_fifo_count_out();
 463         dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
 464
 465         if (fifo_count > ep->ep.maxpacket)
 466                 avail = ep->ep.maxpacket;
 467         else
 468                 avail = fifo_count;
 469
 470         fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
 471
 472         /* checking this with ep0 is not accurate as we already
 473          * read a control request
 474          **/
 475         if (idx != 0 && fifo_count < ep->ep.maxpacket) {
 476                 is_last = 1;
 477                 /* overflowed this request?  flush extra data */
 478                 if (fifo_count != avail)
 479                         req->req.status = -EOVERFLOW;
 480         } else {
 481                 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
 482         }
 483
 484         udc_write(idx, S3C2410_UDC_INDEX_REG);
 485         fifo_count = s3c2410_udc_fifo_count_out();
 486
 487         /* Only ep0 debug messages are interesting */
 488         if (idx == 0)
 489                 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
 490                         __func__, fifo_count, is_last);
 491
 492         if (is_last) {
 493                 if (idx == 0) {
 494                         s3c2410_udc_set_ep0_de_out(base_addr);
 495                         ep->dev->ep0state = EP0_IDLE;
 496                 } else {
 497                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 498                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 499                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 500                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 501                                         S3C2410_UDC_OUT_CSR1_REG);
 502                 }
 503
 504                 s3c2410_udc_done(ep, req, 0);
 505         } else {
 506                 if (idx == 0) {
 507                         s3c2410_udc_clear_ep0_opr(base_addr);
 508                 } else {
 509                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 510                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 511                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 512                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 513                                         S3C2410_UDC_OUT_CSR1_REG);
 514                 }
 515         }
 516
 517         return is_last;
 518 }
 519
 520 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
 521 {
 522         unsigned char *outbuf = (unsigned char *)crq;
 523         int bytes_read = 0;
 524
 525         udc_write(0, S3C2410_UDC_INDEX_REG);
 526
 527         bytes_read = s3c2410_udc_fifo_count_out();
 528
 529         dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
 530
 531         if (bytes_read > sizeof(struct usb_ctrlrequest))
 532                 bytes_read = sizeof(struct usb_ctrlrequest);
 533
 534         readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
 535
 536         dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
 537                 bytes_read, crq->bRequest, crq->bRequestType,
 538                 crq->wValue, crq->wIndex, crq->wLength);
 539
 540         return bytes_read;
 541 }
 542
 543 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
 544                 struct usb_ctrlrequest *crq)
 545 {
 546         u16 status = 0;
 547         u8 ep_num = crq->wIndex & 0x7F;
 548         u8 is_in = crq->wIndex & USB_DIR_IN;
 549
 550         switch (crq->bRequestType & USB_RECIP_MASK) {
 551         case USB_RECIP_INTERFACE:
 552                 break;
 553
 554         case USB_RECIP_DEVICE:
 555                 status = dev->devstatus;
 556                 break;
 557
 558         case USB_RECIP_ENDPOINT:
 559                 if (ep_num > 4 || crq->wLength > 2)
 560                         return 1;
 561
 562                 if (ep_num == 0) {
 563                         udc_write(0, S3C2410_UDC_INDEX_REG);
 564                         status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 565                         status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
 566                 } else {
 567                         udc_write(ep_num, S3C2410_UDC_INDEX_REG);
 568                         if (is_in) {
 569                                 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 570                                 status = status & S3C2410_UDC_ICSR1_SENDSTL;
 571                         } else {
 572                                 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 573                                 status = status & S3C2410_UDC_OCSR1_SENDSTL;
 574                         }
 575                 }
 576
 577                 status = status ? 1 : 0;
 578                 break;
 579
 580         default:
 581                 return 1;
 582         }
 583
 584         /* Seems to be needed to get it working. ouch :( */
 585         udelay(5);
 586         udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
 587         udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
 588         s3c2410_udc_set_ep0_de_in(base_addr);
 589
 590         return 0;
 591 }
 592 /*------------------------- usb state machine -------------------------------*/
 593 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
 594
 595 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
 596                                         struct s3c2410_ep *ep,
 597                                         struct usb_ctrlrequest *crq,
 598                                         u32 ep0csr)
 599 {
 600         int len, ret, tmp;
 601
 602         /* start control request? */
 603         if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
 604                 return;
 605
 606         s3c2410_udc_nuke(dev, ep, -EPROTO);
 607
 608         len = s3c2410_udc_read_fifo_crq(crq);
 609         if (len != sizeof(*crq)) {
 610                 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
 611                         " wanted %d bytes got %d. Stalling out...\n",
 612                         sizeof(*crq), len);
 613                 s3c2410_udc_set_ep0_ss(base_addr);
 614                 return;
 615         }
 616
 617         dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
 618                 crq->bRequest, crq->bRequestType, crq->wLength);
 619
 620         /* cope with automagic for some standard requests. */
 621         dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
 622                 == USB_TYPE_STANDARD;
 623         dev->req_config = 0;
 624         dev->req_pending = 1;
 625
 626         switch (crq->bRequest) {
 627         case USB_REQ_SET_CONFIGURATION:
 628                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n");
 629
 630                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 631                         dev->req_config = 1;
 632                         s3c2410_udc_set_ep0_de_out(base_addr);
 633                 }
 634                 break;
 635
 636         case USB_REQ_SET_INTERFACE:
 637                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n");
 638
 639                 if (crq->bRequestType == USB_RECIP_INTERFACE) {
 640                         dev->req_config = 1;
 641                         s3c2410_udc_set_ep0_de_out(base_addr);
 642                 }
 643                 break;
 644
 645         case USB_REQ_SET_ADDRESS:
 646                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n");
 647
 648                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 649                         tmp = crq->wValue & 0x7F;
 650                         dev->address = tmp;
 651                         udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
 652                                         S3C2410_UDC_FUNC_ADDR_REG);
 653                         s3c2410_udc_set_ep0_de_out(base_addr);
 654                         return;
 655                 }
 656                 break;
 657
 658         case USB_REQ_GET_STATUS:
 659                 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n");
 660                 s3c2410_udc_clear_ep0_opr(base_addr);
 661
 662                 if (dev->req_std) {
 663                         if (!s3c2410_udc_get_status(dev, crq))
 664                                 return;
 665                 }
 666                 break;
 667
 668         case USB_REQ_CLEAR_FEATURE:
 669                 s3c2410_udc_clear_ep0_opr(base_addr);
 670
 671                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 672                         break;
 673
 674                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 675                         break;
 676
 677                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
 678                 s3c2410_udc_set_ep0_de_out(base_addr);
 679                 return;
 680
 681         case USB_REQ_SET_FEATURE:
 682                 s3c2410_udc_clear_ep0_opr(base_addr);
 683
 684                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 685                         break;
 686
 687                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 688                         break;
 689
 690                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
 691                 s3c2410_udc_set_ep0_de_out(base_addr);
 692                 return;
 693
 694         default:
 695                 s3c2410_udc_clear_ep0_opr(base_addr);
 696                 break;
 697         }
 698
 699         if (crq->bRequestType & USB_DIR_IN)
 700                 dev->ep0state = EP0_IN_DATA_PHASE;
 701         else
 702                 dev->ep0state = EP0_OUT_DATA_PHASE;
 703
 704         if (!dev->driver)
 705                 return;
 706
 707         /* deliver the request to the gadget driver */
 708         ret = dev->driver->setup(&dev->gadget, crq);
 709         if (ret < 0) {
 710                 if (dev->req_config) {
 711                         dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
 712                                 crq->bRequest, ret);
 713                         return;
 714                 }
 715
 716                 if (ret == -EOPNOTSUPP)
 717                         dprintk(DEBUG_NORMAL, "Operation not supported\n");
 718                 else
 719                         dprintk(DEBUG_NORMAL,
 720                                 "dev->driver->setup failed. (%d)\n", ret);
 721
 722                 udelay(5);
 723                 s3c2410_udc_set_ep0_ss(base_addr);
 724                 s3c2410_udc_set_ep0_de_out(base_addr);
 725                 dev->ep0state = EP0_IDLE;
 726                 /* deferred i/o == no response yet */
 727         } else if (dev->req_pending) {
 728                 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
 729                 dev->req_pending = 0;
 730         }
 731
 732         dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
 733 }
 734
 735 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
 736 {
 737         u32                     ep0csr;
 738         struct s3c2410_ep       *ep = &dev->ep[0];
 739         struct s3c2410_request  *req;
 740         struct usb_ctrlrequest  crq;
 741
 742         if (list_empty(&ep->queue))
 743                 req = NULL;
 744         else
 745                 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
 746
 747         /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
 748          * S3C2410_UDC_EP0_CSR_REG when index is zero */
 749
 750         udc_write(0, S3C2410_UDC_INDEX_REG);
 751         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 752
 753         dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
 754                 ep0csr, ep0states[dev->ep0state]);
 755
 756         /* clear stall status */
 757         if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
 758                 s3c2410_udc_nuke(dev, ep, -EPIPE);
 759                 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
 760                 s3c2410_udc_clear_ep0_sst(base_addr);
 761                 dev->ep0state = EP0_IDLE;
 762                 return;
 763         }
 764
 765         /* clear setup end */
 766         if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
 767                 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
 768                 s3c2410_udc_nuke(dev, ep, 0);
 769                 s3c2410_udc_clear_ep0_se(base_addr);
 770                 dev->ep0state = EP0_IDLE;
 771         }
 772
 773         switch (dev->ep0state) {
 774         case EP0_IDLE:
 775                 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
 776                 break;
 777
 778         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
 779                 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
 780                 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req)
 781                         s3c2410_udc_write_fifo(ep, req);
 782                 break;
 783
 784         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
 785                 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
 786                 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req)
 787                         s3c2410_udc_read_fifo(ep, req);
 788                 break;
 789
 790         case EP0_END_XFER:
 791                 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
 792                 dev->ep0state = EP0_IDLE;
 793                 break;
 794
 795         case EP0_STALL:
 796                 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
 797                 dev->ep0state = EP0_IDLE;
 798                 break;
 799         }
 800 }
 801
 802 /*
 803  *      handle_ep - Manage I/O endpoints
 804  */
 805
 806 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
 807 {
 808         struct s3c2410_request  *req;
 809         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
 810         u32                     ep_csr1;
 811         u32                     idx;
 812
 813         if (likely(!list_empty(&ep->queue)))
 814                 req = list_entry(ep->queue.next,
 815                                 struct s3c2410_request, queue);
 816         else
 817                 req = NULL;
 818
 819         idx = ep->bEndpointAddress & 0x7F;
 820
 821         if (is_in) {
 822                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 823                 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
 824                 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
 825                         idx, ep_csr1, req ? 1 : 0);
 826
 827                 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
 828                         dprintk(DEBUG_VERBOSE, "st\n");
 829                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 830                         udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
 831                                         S3C2410_UDC_IN_CSR1_REG);
 832                         return;
 833                 }
 834
 835                 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req)
 836                         s3c2410_udc_write_fifo(ep, req);
 837         } else {
 838                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 839                 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 840                 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
 841
 842                 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
 843                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 844                         udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
 845                                         S3C2410_UDC_OUT_CSR1_REG);
 846                         return;
 847                 }
 848
 849                 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req)
 850                         s3c2410_udc_read_fifo(ep, req);
 851         }
 852 }
 853
 854 #include <mach/regs-irq.h>
 855
 856 /*
 857  *      s3c2410_udc_irq - interrupt handler
 858  */
 859 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
 860 {
 861         struct s3c2410_udc *dev = _dev;
 862         int usb_status;
 863         int usbd_status;
 864         int pwr_reg;
 865         int ep0csr;
 866         int i;
 867         u32 idx, idx2;
 868         unsigned long flags;
 869
 870         spin_lock_irqsave(&dev->lock, flags);
 871
 872         /* Driver connected ? */
 873         if (!dev->driver) {
 874                 /* Clear interrupts */
 875                 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
 876                                 S3C2410_UDC_USB_INT_REG);
 877                 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
 878                                 S3C2410_UDC_EP_INT_REG);
 879         }
 880
 881         /* Save index */
 882         idx = udc_read(S3C2410_UDC_INDEX_REG);
 883
 884         /* Read status registers */
 885         usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
 886         usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
 887         pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
 888
 889         udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 890         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 891
 892         dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
 893                 usb_status, usbd_status, pwr_reg, ep0csr);
 894
 895         /*
 896          * Now, handle interrupts. There's two types :
 897          * - Reset, Resume, Suspend coming -> usb_int_reg
 898          * - EP -> ep_int_reg
 899          */
 900
 901         /* RESET */
 902         if (usb_status & S3C2410_UDC_USBINT_RESET) {
 903                 /* two kind of reset :
 904                  * - reset start -> pwr reg = 8
 905                  * - reset end   -> pwr reg = 0
 906                  **/
 907                 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
 908                         ep0csr, pwr_reg);
 909
 910                 dev->gadget.speed = USB_SPEED_UNKNOWN;
 911                 udc_write(0x00, S3C2410_UDC_INDEX_REG);
 912                 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
 913                                 S3C2410_UDC_MAXP_REG);
 914                 dev->address = 0;
 915
 916                 dev->ep0state = EP0_IDLE;
 917                 dev->gadget.speed = USB_SPEED_FULL;
 918
 919                 /* clear interrupt */
 920                 udc_write(S3C2410_UDC_USBINT_RESET,
 921                                 S3C2410_UDC_USB_INT_REG);
 922
 923                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 924                 spin_unlock_irqrestore(&dev->lock, flags);
 925                 return IRQ_HANDLED;
 926         }
 927
 928         /* RESUME */
 929         if (usb_status & S3C2410_UDC_USBINT_RESUME) {
 930                 dprintk(DEBUG_NORMAL, "USB resume\n");
 931
 932                 /* clear interrupt */
 933                 udc_write(S3C2410_UDC_USBINT_RESUME,
 934                                 S3C2410_UDC_USB_INT_REG);
 935
 936                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 937                                 && dev->driver
 938                                 && dev->driver->resume)
 939                         dev->driver->resume(&dev->gadget);
 940         }
 941
 942         /* SUSPEND */
 943         if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
 944                 dprintk(DEBUG_NORMAL, "USB suspend\n");
 945
 946                 /* clear interrupt */
 947                 udc_write(S3C2410_UDC_USBINT_SUSPEND,
 948                                 S3C2410_UDC_USB_INT_REG);
 949
 950                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 951                                 && dev->driver
 952                                 && dev->driver->suspend)
 953                         dev->driver->suspend(&dev->gadget);
 954
 955                 dev->ep0state = EP0_IDLE;
 956         }
 957
 958         /* EP */
 959         /* control traffic */
 960         /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
 961          * generate an interrupt
 962          */
 963         if (usbd_status & S3C2410_UDC_INT_EP0) {
 964                 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
 965                 /* Clear the interrupt bit by setting it to 1 */
 966                 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
 967                 s3c2410_udc_handle_ep0(dev);
 968         }
 969
 970         /* endpoint data transfers */
 971         for (i = 1; i < S3C2410_ENDPOINTS; i++) {
 972                 u32 tmp = 1 << i;
 973                 if (usbd_status & tmp) {
 974                         dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
 975
 976                         /* Clear the interrupt bit by setting it to 1 */
 977                         udc_write(tmp, S3C2410_UDC_EP_INT_REG);
 978                         s3c2410_udc_handle_ep(&dev->ep[i]);
 979                 }
 980         }
 981
 982         /* what else causes this interrupt? a receive! who is it? */
 983         if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
 984                 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
 985                         idx2 = udc_read(S3C2410_UDC_INDEX_REG);
 986                         udc_write(i, S3C2410_UDC_INDEX_REG);
 987
 988                         if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
 989                                 s3c2410_udc_handle_ep(&dev->ep[i]);
 990
 991                         /* restore index */
 992                         udc_write(idx2, S3C2410_UDC_INDEX_REG);
 993                 }
 994         }
 995
 996         dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
 997
 998         /* Restore old index */
 999         udc_write(idx, S3C2410_UDC_INDEX_REG);
1000
1001         spin_unlock_irqrestore(&dev->lock, flags);
1002
1003         return IRQ_HANDLED;
1004 }
1005 /*------------------------- s3c2410_ep_ops ----------------------------------*/
1006
1007 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1008 {
1009         return container_of(ep, struct s3c2410_ep, ep);
1010 }
1011
1012 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1013 {
1014         return container_of(gadget, struct s3c2410_udc, gadget);
1015 }
1016
1017 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1018 {
1019         return container_of(req, struct s3c2410_request, req);
1020 }
1021
1022 /*
1023  *      s3c2410_udc_ep_enable
1024  */
1025 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1026                                  const struct usb_endpoint_descriptor *desc)
1027 {
1028         struct s3c2410_udc      *dev;
1029         struct s3c2410_ep       *ep;
1030         u32                     max, tmp;
1031         unsigned long           flags;
1032         u32                     csr1, csr2;
1033         u32                     int_en_reg;
1034
1035         ep = to_s3c2410_ep(_ep);
1036
1037         if (!_ep || !desc
1038                         || _ep->name == ep0name
1039                         || desc->bDescriptorType != USB_DT_ENDPOINT)
1040                 return -EINVAL;
1041
1042         dev = ep->dev;
1043         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1044                 return -ESHUTDOWN;
1045
1046         max = usb_endpoint_maxp(desc) & 0x1fff;
1047
1048         local_irq_save(flags);
1049         _ep->maxpacket = max & 0x7ff;
1050         ep->ep.desc = desc;
1051         ep->halted = 0;
1052         ep->bEndpointAddress = desc->bEndpointAddress;
1053
1054         /* set max packet */
1055         udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1056         udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1057
1058         /* set type, direction, address; reset fifo counters */
1059         if (desc->bEndpointAddress & USB_DIR_IN) {
1060                 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1061                 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1062
1063                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1064                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1065                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1066                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1067         } else {
1068                 /* don't flush in fifo or it will cause endpoint interrupt */
1069                 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1070                 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1071
1072                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1073                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1074                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1075                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1076
1077                 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1078                 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1079
1080                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1081                 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1082                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1083                 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1084         }
1085
1086         /* enable irqs */
1087         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1088         udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1089
1090         /* print some debug message */
1091         tmp = desc->bEndpointAddress;
1092         dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1093                  _ep->name, ep->num, tmp,
1094                  desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1095
1096         local_irq_restore(flags);
1097         s3c2410_udc_set_halt(_ep, 0);
1098
1099         return 0;
1100 }
1101
1102 /*
1103  * s3c2410_udc_ep_disable
1104  */
1105 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1106 {
1107         struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1108         unsigned long flags;
1109         u32 int_en_reg;
1110
1111         if (!_ep || !ep->ep.desc) {
1112                 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1113                         _ep ? ep->ep.name : NULL);
1114                 return -EINVAL;
1115         }
1116
1117         local_irq_save(flags);
1118
1119         dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1120
1121         ep->ep.desc = NULL;
1122         ep->halted = 1;
1123
1124         s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN);
1125
1126         /* disable irqs */
1127         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1128         udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1129
1130         local_irq_restore(flags);
1131
1132         dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1133
1134         return 0;
1135 }
1136
1137 /*
1138  * s3c2410_udc_alloc_request
1139  */
1140 static struct usb_request *
1141 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1142 {
1143         struct s3c2410_request *req;
1144
1145         dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags);
1146
1147         if (!_ep)
1148                 return NULL;
1149
1150         req = kzalloc(sizeof(struct s3c2410_request), mem_flags);
1151         if (!req)
1152                 return NULL;
1153
1154         INIT_LIST_HEAD(&req->queue);
1155         return &req->req;
1156 }
1157
1158 /*
1159  * s3c2410_udc_free_request
1160  */
1161 static void
1162 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1163 {
1164         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1165         struct s3c2410_request  *req = to_s3c2410_req(_req);
1166
1167         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1168
1169         if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name))
1170                 return;
1171
1172         WARN_ON(!list_empty(&req->queue));
1173         kfree(req);
1174 }
1175
1176 /*
1177  *      s3c2410_udc_queue
1178  */
1179 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1180                 gfp_t gfp_flags)
1181 {
1182         struct s3c2410_request  *req = to_s3c2410_req(_req);
1183         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1184         struct s3c2410_udc      *dev;
1185         u32                     ep_csr = 0;
1186         int                     fifo_count = 0;
1187         unsigned long           flags;
1188
1189         if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1190                 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1191                 return -EINVAL;
1192         }
1193
1194         dev = ep->dev;
1195         if (unlikely(!dev->driver
1196                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1197                 return -ESHUTDOWN;
1198         }
1199
1200         local_irq_save(flags);
1201
1202         if (unlikely(!_req || !_req->complete
1203                         || !_req->buf || !list_empty(&req->queue))) {
1204                 if (!_req)
1205                         dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1206                 else {
1207                         dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1208                                 __func__, !_req->complete, !_req->buf,
1209                                 !list_empty(&req->queue));
1210                 }
1211
1212                 local_irq_restore(flags);
1213                 return -EINVAL;
1214         }
1215
1216         _req->status = -EINPROGRESS;
1217         _req->actual = 0;
1218
1219         dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1220                  __func__, ep->bEndpointAddress, _req->length);
1221
1222         if (ep->bEndpointAddress) {
1223                 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1224
1225                 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1226                                 ? S3C2410_UDC_IN_CSR1_REG
1227                                 : S3C2410_UDC_OUT_CSR1_REG);
1228                 fifo_count = s3c2410_udc_fifo_count_out();
1229         } else {
1230                 udc_write(0, S3C2410_UDC_INDEX_REG);
1231                 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1232                 fifo_count = s3c2410_udc_fifo_count_out();
1233         }
1234
1235         /* kickstart this i/o queue? */
1236         if (list_empty(&ep->queue) && !ep->halted) {
1237                 if (ep->bEndpointAddress == 0 /* ep0 */) {
1238                         switch (dev->ep0state) {
1239                         case EP0_IN_DATA_PHASE:
1240                                 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1241                                                 && s3c2410_udc_write_fifo(ep,
1242                                                         req)) {
1243                                         dev->ep0state = EP0_IDLE;
1244                                         req = NULL;
1245                                 }
1246                                 break;
1247
1248                         case EP0_OUT_DATA_PHASE:
1249                                 if ((!_req->length)
1250                                         || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1251                                                 && s3c2410_udc_read_fifo(ep,
1252                                                         req))) {
1253                                         dev->ep0state = EP0_IDLE;
1254                                         req = NULL;
1255                                 }
1256                                 break;
1257
1258                         default:
1259                                 local_irq_restore(flags);
1260                                 return -EL2HLT;
1261                         }
1262                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1263                                 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1264                                 && s3c2410_udc_write_fifo(ep, req)) {
1265                         req = NULL;
1266                 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1267                                 && fifo_count
1268                                 && s3c2410_udc_read_fifo(ep, req)) {
1269                         req = NULL;
1270                 }
1271         }
1272
1273         /* pio or dma irq handler advances the queue. */
1274         if (likely(req))
1275                 list_add_tail(&req->queue, &ep->queue);
1276
1277         local_irq_restore(flags);
1278
1279         dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1280         return 0;
1281 }
1282
1283 /*
1284  *      s3c2410_udc_dequeue
1285  */
1286 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1287 {
1288         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1289         struct s3c2410_udc      *udc;
1290         int                     retval = -EINVAL;
1291         unsigned long           flags;
1292         struct s3c2410_request  *req = NULL;
1293
1294         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1295
1296         if (!the_controller->driver)
1297                 return -ESHUTDOWN;
1298
1299         if (!_ep || !_req)
1300                 return retval;
1301
1302         udc = to_s3c2410_udc(ep->gadget);
1303
1304         local_irq_save(flags);
1305
1306         list_for_each_entry(req, &ep->queue, queue) {
1307                 if (&req->req == _req) {
1308                         list_del_init(&req->queue);
1309                         _req->status = -ECONNRESET;
1310                         retval = 0;
1311                         break;
1312                 }
1313         }
1314
1315         if (retval == 0) {
1316                 dprintk(DEBUG_VERBOSE,
1317                         "dequeued req %p from %s, len %d buf %p\n",
1318                         req, _ep->name, _req->length, _req->buf);
1319
1320                 s3c2410_udc_done(ep, req, -ECONNRESET);
1321         }
1322
1323         local_irq_restore(flags);
1324         return retval;
1325 }
1326
1327 /*
1328  * s3c2410_udc_set_halt
1329  */
1330 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1331 {
1332         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1333         u32                     ep_csr = 0;
1334         unsigned long           flags;
1335         u32                     idx;
1336
1337         if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1338                 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1339                 return -EINVAL;
1340         }
1341
1342         local_irq_save(flags);
1343
1344         idx = ep->bEndpointAddress & 0x7F;
1345
1346         if (idx == 0) {
1347                 s3c2410_udc_set_ep0_ss(base_addr);
1348                 s3c2410_udc_set_ep0_de_out(base_addr);
1349         } else {
1350                 udc_write(idx, S3C2410_UDC_INDEX_REG);
1351                 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1352                                 ? S3C2410_UDC_IN_CSR1_REG
1353                                 : S3C2410_UDC_OUT_CSR1_REG);
1354
1355                 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1356                         if (value)
1357                                 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1358                                         S3C2410_UDC_IN_CSR1_REG);
1359                         else {
1360                                 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1361                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1362                                 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1363                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1364                         }
1365                 } else {
1366                         if (value)
1367                                 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1368                                         S3C2410_UDC_OUT_CSR1_REG);
1369                         else {
1370                                 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1371                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1372                                 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1373                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1374                         }
1375                 }
1376         }
1377
1378         ep->halted = value ? 1 : 0;
1379         local_irq_restore(flags);
1380
1381         return 0;
1382 }
1383
1384 static const struct usb_ep_ops s3c2410_ep_ops = {
1385         .enable         = s3c2410_udc_ep_enable,
1386         .disable        = s3c2410_udc_ep_disable,
1387
1388         .alloc_request  = s3c2410_udc_alloc_request,
1389         .free_request   = s3c2410_udc_free_request,
1390
1391         .queue          = s3c2410_udc_queue,
1392         .dequeue        = s3c2410_udc_dequeue,
1393
1394         .set_halt       = s3c2410_udc_set_halt,
1395 };
1396
1397 /*------------------------- usb_gadget_ops ----------------------------------*/
1398
1399 /*
1400  *      s3c2410_udc_get_frame
1401  */
1402 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1403 {
1404         int tmp;
1405
1406         dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1407
1408         tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1409         tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1410         return tmp;
1411 }
1412
1413 /*
1414  *      s3c2410_udc_wakeup
1415  */
1416 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1417 {
1418         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1419         return 0;
1420 }
1421
1422 /*
1423  *      s3c2410_udc_set_selfpowered
1424  */
1425 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1426 {
1427         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1428
1429         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1430
1431         gadget->is_selfpowered = (value != 0);
1432         if (value)
1433                 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1434         else
1435                 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1436
1437         return 0;
1438 }
1439
1440 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1441 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1442
1443 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1444 {
1445         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1446
1447         if (udc_info && (udc_info->udc_command ||
1448                 gpio_is_valid(udc_info->pullup_pin))) {
1449
1450                 if (is_on)
1451                         s3c2410_udc_enable(udc);
1452                 else {
1453                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1454                                 if (udc->driver && udc->driver->disconnect)
1455                                         udc->driver->disconnect(&udc->gadget);
1456
1457                         }
1458                         s3c2410_udc_disable(udc);
1459                 }
1460         } else {
1461                 return -EOPNOTSUPP;
1462         }
1463
1464         return 0;
1465 }
1466
1467 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1468 {
1469         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1470
1471         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1472
1473         udc->vbus = (is_active != 0);
1474         s3c2410_udc_set_pullup(udc, is_active);
1475         return 0;
1476 }
1477
1478 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1479 {
1480         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1481
1482         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1483
1484         s3c2410_udc_set_pullup(udc, is_on);
1485         return 0;
1486 }
1487
1488 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1489 {
1490         struct s3c2410_udc      *dev = _dev;
1491         unsigned int            value;
1492
1493         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1494
1495         value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1496         if (udc_info->vbus_pin_inverted)
1497                 value = !value;
1498
1499         if (value != dev->vbus)
1500                 s3c2410_udc_vbus_session(&dev->gadget, value);
1501
1502         return IRQ_HANDLED;
1503 }
1504
1505 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1506 {
1507         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1508
1509         if (udc_info && udc_info->vbus_draw) {
1510                 udc_info->vbus_draw(ma);
1511                 return 0;
1512         }
1513
1514         return -ENOTSUPP;
1515 }
1516
1517 static int s3c2410_udc_start(struct usb_gadget *g,
1518                 struct usb_gadget_driver *driver);
1519 static int s3c2410_udc_stop(struct usb_gadget *g);
1520
1521 static const struct usb_gadget_ops s3c2410_ops = {
1522         .get_frame              = s3c2410_udc_get_frame,
1523         .wakeup                 = s3c2410_udc_wakeup,
1524         .set_selfpowered        = s3c2410_udc_set_selfpowered,
1525         .pullup                 = s3c2410_udc_pullup,
1526         .vbus_session           = s3c2410_udc_vbus_session,
1527         .vbus_draw              = s3c2410_vbus_draw,
1528         .udc_start              = s3c2410_udc_start,
1529         .udc_stop               = s3c2410_udc_stop,
1530 };
1531
1532 static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1533 {
1534         if (!udc_info)
1535                 return;
1536
1537         if (udc_info->udc_command) {
1538                 udc_info->udc_command(cmd);
1539         } else if (gpio_is_valid(udc_info->pullup_pin)) {
1540                 int value;
1541
1542                 switch (cmd) {
1543                 case S3C2410_UDC_P_ENABLE:
1544                         value = 1;
1545                         break;
1546                 case S3C2410_UDC_P_DISABLE:
1547                         value = 0;
1548                         break;
1549                 default:
1550                         return;
1551                 }
1552                 value ^= udc_info->pullup_pin_inverted;
1553
1554                 gpio_set_value(udc_info->pullup_pin, value);
1555         }
1556 }
1557
1558 /*------------------------- gadget driver handling---------------------------*/
1559 /*
1560  * s3c2410_udc_disable
1561  */
1562 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1563 {
1564         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1565
1566         /* Disable all interrupts */
1567         udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1568         udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1569
1570         /* Clear the interrupt registers */
1571         udc_write(S3C2410_UDC_USBINT_RESET
1572                                 | S3C2410_UDC_USBINT_RESUME
1573                                 | S3C2410_UDC_USBINT_SUSPEND,
1574                         S3C2410_UDC_USB_INT_REG);
1575
1576         udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1577
1578         /* Good bye, cruel world */
1579         s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1580
1581         /* Set speed to unknown */
1582         dev->gadget.speed = USB_SPEED_UNKNOWN;
1583 }
1584
1585 /*
1586  * s3c2410_udc_reinit
1587  */
1588 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1589 {
1590         u32 i;
1591
1592         /* device/ep0 records init */
1593         INIT_LIST_HEAD(&dev->gadget.ep_list);
1594         INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1595         dev->ep0state = EP0_IDLE;
1596
1597         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1598                 struct s3c2410_ep *ep = &dev->ep[i];
1599
1600                 if (i != 0)
1601                         list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1602
1603                 ep->dev = dev;
1604                 ep->ep.desc = NULL;
1605                 ep->halted = 0;
1606                 INIT_LIST_HEAD(&ep->queue);
1607                 usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket);
1608         }
1609 }
1610
1611 /*
1612  * s3c2410_udc_enable
1613  */
1614 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1615 {
1616         int i;
1617
1618         dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1619
1620         /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1621         dev->gadget.speed = USB_SPEED_FULL;
1622
1623         /* Set MAXP for all endpoints */
1624         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1625                 udc_write(i, S3C2410_UDC_INDEX_REG);
1626                 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1627                                 S3C2410_UDC_MAXP_REG);
1628         }
1629
1630         /* Set default power state */
1631         udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1632
1633         /* Enable reset and suspend interrupt interrupts */
1634         udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1635                         S3C2410_UDC_USB_INT_EN_REG);
1636
1637         /* Enable ep0 interrupt */
1638         udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1639
1640         /* time to say "hello, world" */
1641         s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1642 }
1643
1644 static int s3c2410_udc_start(struct usb_gadget *g,
1645                 struct usb_gadget_driver *driver)
1646 {
1647         struct s3c2410_udc *udc = to_s3c2410(g);
1648
1649         dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1650
1651         /* Hook the driver */
1652         udc->driver = driver;
1653
1654         /* Enable udc */
1655         s3c2410_udc_enable(udc);
1656
1657         return 0;
1658 }
1659
1660 static int s3c2410_udc_stop(struct usb_gadget *g)
1661 {
1662         struct s3c2410_udc *udc = to_s3c2410(g);
1663
1664         udc->driver = NULL;
1665
1666         /* Disable udc */
1667         s3c2410_udc_disable(udc);
1668
1669         return 0;
1670 }
1671
1672 /*---------------------------------------------------------------------------*/
1673 static struct s3c2410_udc memory = {
1674         .gadget = {
1675                 .ops            = &s3c2410_ops,
1676                 .ep0            = &memory.ep[0].ep,
1677                 .name           = gadget_name,
1678                 .dev = {
1679                         .init_name      = "gadget",
1680                 },
1681         },
1682
1683         /* control endpoint */
1684         .ep[0] = {
1685                 .num            = 0,
1686                 .ep = {
1687                         .name           = ep0name,
1688                         .ops            = &s3c2410_ep_ops,
1689                         .maxpacket      = EP0_FIFO_SIZE,
1690                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL,
1691                                                 USB_EP_CAPS_DIR_ALL),
1692                 },
1693                 .dev            = &memory,
1694         },
1695
1696         /* first group of endpoints */
1697         .ep[1] = {
1698                 .num            = 1,
1699                 .ep = {
1700                         .name           = "ep1-bulk",
1701                         .ops            = &s3c2410_ep_ops,
1702                         .maxpacket      = EP_FIFO_SIZE,
1703                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1704                                                 USB_EP_CAPS_DIR_ALL),
1705                 },
1706                 .dev            = &memory,
1707                 .fifo_size      = EP_FIFO_SIZE,
1708                 .bEndpointAddress = 1,
1709                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1710         },
1711         .ep[2] = {
1712                 .num            = 2,
1713                 .ep = {
1714                         .name           = "ep2-bulk",
1715                         .ops            = &s3c2410_ep_ops,
1716                         .maxpacket      = EP_FIFO_SIZE,
1717                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1718                                                 USB_EP_CAPS_DIR_ALL),
1719                 },
1720                 .dev            = &memory,
1721                 .fifo_size      = EP_FIFO_SIZE,
1722                 .bEndpointAddress = 2,
1723                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1724         },
1725         .ep[3] = {
1726                 .num            = 3,
1727                 .ep = {
1728                         .name           = "ep3-bulk",
1729                         .ops            = &s3c2410_ep_ops,
1730                         .maxpacket      = EP_FIFO_SIZE,
1731                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1732                                                 USB_EP_CAPS_DIR_ALL),
1733                 },
1734                 .dev            = &memory,
1735                 .fifo_size      = EP_FIFO_SIZE,
1736                 .bEndpointAddress = 3,
1737                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1738         },
1739         .ep[4] = {
1740                 .num            = 4,
1741                 .ep = {
1742                         .name           = "ep4-bulk",
1743                         .ops            = &s3c2410_ep_ops,
1744                         .maxpacket      = EP_FIFO_SIZE,
1745                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1746                                                 USB_EP_CAPS_DIR_ALL),
1747                 },
1748                 .dev            = &memory,
1749                 .fifo_size      = EP_FIFO_SIZE,
1750                 .bEndpointAddress = 4,
1751                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1752         }
1753
1754 };
1755
1756 /*
1757  *      probe - binds to the platform device
1758  */
1759 static int s3c2410_udc_probe(struct platform_device *pdev)
1760 {
1761         struct s3c2410_udc *udc = &memory;
1762         struct device *dev = &pdev->dev;
1763         int retval;
1764         int irq;
1765
1766         dev_dbg(dev, "%s()\n", __func__);
1767
1768         usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1769         if (IS_ERR(usb_bus_clock)) {
1770                 dev_err(dev, "failed to get usb bus clock source\n");
1771                 return PTR_ERR(usb_bus_clock);
1772         }
1773
1774         clk_prepare_enable(usb_bus_clock);
1775
1776         udc_clock = clk_get(NULL, "usb-device");
1777         if (IS_ERR(udc_clock)) {
1778                 dev_err(dev, "failed to get udc clock source\n");
1779                 return PTR_ERR(udc_clock);
1780         }
1781
1782         clk_prepare_enable(udc_clock);
1783
1784         mdelay(10);
1785
1786         dev_dbg(dev, "got and enabled clocks\n");
1787
1788         if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1789                 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1790                 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1791                 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1792                 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1793                 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1794         }
1795
1796         spin_lock_init(&udc->lock);
1797         udc_info = dev_get_platdata(&pdev->dev);
1798
1799         rsrc_start = S3C2410_PA_USBDEV;
1800         rsrc_len   = S3C24XX_SZ_USBDEV;
1801
1802         if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1803                 return -EBUSY;
1804
1805         base_addr = ioremap(rsrc_start, rsrc_len);
1806         if (!base_addr) {
1807                 retval = -ENOMEM;
1808                 goto err_mem;
1809         }
1810
1811         the_controller = udc;
1812         platform_set_drvdata(pdev, udc);
1813
1814         s3c2410_udc_disable(udc);
1815         s3c2410_udc_reinit(udc);
1816
1817         /* irq setup after old hardware state is cleaned up */
1818         retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1819                              0, gadget_name, udc);
1820
1821         if (retval != 0) {
1822                 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1823                 retval = -EBUSY;
1824                 goto err_map;
1825         }
1826
1827         dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1828
1829         if (udc_info && udc_info->vbus_pin > 0) {
1830                 retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1831                 if (retval < 0) {
1832                         dev_err(dev, "cannot claim vbus pin\n");
1833                         goto err_int;
1834                 }
1835
1836                 irq = gpio_to_irq(udc_info->vbus_pin);
1837                 if (irq < 0) {
1838                         dev_err(dev, "no irq for gpio vbus pin\n");
1839                         retval = irq;
1840                         goto err_gpio_claim;
1841                 }
1842
1843                 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1844                                      IRQF_TRIGGER_RISING
1845                                      | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1846                                      gadget_name, udc);
1847
1848                 if (retval != 0) {
1849                         dev_err(dev, "can't get vbus irq %d, err %d\n",
1850                                 irq, retval);
1851                         retval = -EBUSY;
1852                         goto err_gpio_claim;
1853                 }
1854
1855                 dev_dbg(dev, "got irq %i\n", irq);
1856         } else {
1857                 udc->vbus = 1;
1858         }
1859
1860         if (udc_info && !udc_info->udc_command &&
1861                 gpio_is_valid(udc_info->pullup_pin)) {
1862
1863                 retval = gpio_request_one(udc_info->pullup_pin,
1864                                 udc_info->vbus_pin_inverted ?
1865                                 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1866                                 "udc pullup");
1867                 if (retval)
1868                         goto err_vbus_irq;
1869         }
1870
1871         retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1872         if (retval)
1873                 goto err_add_udc;
1874
1875         if (s3c2410_udc_debugfs_root) {
1876                 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1877                                 s3c2410_udc_debugfs_root,
1878                                 udc, &s3c2410_udc_debugfs_fops);
1879                 if (!udc->regs_info)
1880                         dev_warn(dev, "debugfs file creation failed\n");
1881         }
1882
1883         dev_dbg(dev, "probe ok\n");
1884
1885         return 0;
1886
1887 err_add_udc:
1888         if (udc_info && !udc_info->udc_command &&
1889                         gpio_is_valid(udc_info->pullup_pin))
1890                 gpio_free(udc_info->pullup_pin);
1891 err_vbus_irq:
1892         if (udc_info && udc_info->vbus_pin > 0)
1893                 free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1894 err_gpio_claim:
1895         if (udc_info && udc_info->vbus_pin > 0)
1896                 gpio_free(udc_info->vbus_pin);
1897 err_int:
1898         free_irq(IRQ_USBD, udc);
1899 err_map:
1900         iounmap(base_addr);
1901 err_mem:
1902         release_mem_region(rsrc_start, rsrc_len);
1903
1904         return retval;
1905 }
1906
1907 /*
1908  *      s3c2410_udc_remove
1909  */
1910 static int s3c2410_udc_remove(struct platform_device *pdev)
1911 {
1912         struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1913         unsigned int irq;
1914
1915         dev_dbg(&pdev->dev, "%s()\n", __func__);
1916
1917         if (udc->driver)
1918                 return -EBUSY;
1919
1920         usb_del_gadget_udc(&udc->gadget);
1921         debugfs_remove(udc->regs_info);
1922
1923         if (udc_info && !udc_info->udc_command &&
1924                 gpio_is_valid(udc_info->pullup_pin))
1925                 gpio_free(udc_info->pullup_pin);
1926
1927         if (udc_info && udc_info->vbus_pin > 0) {
1928                 irq = gpio_to_irq(udc_info->vbus_pin);
1929                 free_irq(irq, udc);
1930         }
1931
1932         free_irq(IRQ_USBD, udc);
1933
1934         iounmap(base_addr);
1935         release_mem_region(rsrc_start, rsrc_len);
1936
1937         if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1938                 clk_disable_unprepare(udc_clock);
1939                 clk_put(udc_clock);
1940                 udc_clock = NULL;
1941         }
1942
1943         if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1944                 clk_disable_unprepare(usb_bus_clock);
1945                 clk_put(usb_bus_clock);
1946                 usb_bus_clock = NULL;
1947         }
1948
1949         dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1950         return 0;
1951 }
1952
1953 #ifdef CONFIG_PM
1954 static int
1955 s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1956 {
1957         s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1958
1959         return 0;
1960 }
1961
1962 static int s3c2410_udc_resume(struct platform_device *pdev)
1963 {
1964         s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1965
1966         return 0;
1967 }
1968 #else
1969 #define s3c2410_udc_suspend     NULL
1970 #define s3c2410_udc_resume      NULL
1971 #endif
1972
1973 static const struct platform_device_id s3c_udc_ids[] = {
1974         { "s3c2410-usbgadget", },
1975         { "s3c2440-usbgadget", },
1976         { }
1977 };
1978 MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
1979
1980 static struct platform_driver udc_driver_24x0 = {
1981         .driver         = {
1982                 .name   = "s3c24x0-usbgadget",
1983         },
1984         .probe          = s3c2410_udc_probe,
1985         .remove         = s3c2410_udc_remove,
1986         .suspend        = s3c2410_udc_suspend,
1987         .resume         = s3c2410_udc_resume,
1988         .id_table       = s3c_udc_ids,
1989 };
1990
1991 static int __init udc_init(void)
1992 {
1993         int retval;
1994
1995         dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION);
1996
1997         s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
1998         if (IS_ERR(s3c2410_udc_debugfs_root)) {
1999                 pr_err("%s: debugfs dir creation failed %ld\n",
2000                         gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2001                 s3c2410_udc_debugfs_root = NULL;
2002         }
2003
2004         retval = platform_driver_register(&udc_driver_24x0);
2005         if (retval)
2006                 goto err;
2007
2008         return 0;
2009
2010 err:
2011         debugfs_remove(s3c2410_udc_debugfs_root);
2012         return retval;
2013 }
2014
2015 static void __exit udc_exit(void)
2016 {
2017         platform_driver_unregister(&udc_driver_24x0);
2018         debugfs_remove(s3c2410_udc_debugfs_root);
2019 }
2020
2021 module_init(udc_init);
2022 module_exit(udc_exit);
2023
2024 MODULE_AUTHOR(DRIVER_AUTHOR);
2025 MODULE_DESCRIPTION(DRIVER_DESC);
2026 MODULE_VERSION(DRIVER_VERSION);
2027 MODULE_LICENSE("GPL");