drivers/usb/gadget/udc/s3c2410_udc.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * linux/drivers/usb/gadget/s3c2410_udc.c
   4  *
   5  * Samsung S3C24xx series on-chip full speed USB device controllers
   6  *
   7  * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
   8  *      Additional cleanups by Ben Dooks <ben-linux@fluff.org>
   9  */
  10
  11 #define pr_fmt(fmt) "s3c2410_udc: " fmt
  12
  13 #include <linux/module.h>
  14 #include <linux/kernel.h>
  15 #include <linux/delay.h>
  16 #include <linux/ioport.h>
  17 #include <linux/sched.h>
  18 #include <linux/slab.h>
  19 #include <linux/errno.h>
  20 #include <linux/init.h>
  21 #include <linux/timer.h>
  22 #include <linux/list.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/clk.h>
  26 #include <linux/gpio.h>
  27 #include <linux/prefetch.h>
  28 #include <linux/io.h>
  29
  30 #include <linux/debugfs.h>
  31 #include <linux/seq_file.h>
  32
  33 #include <linux/usb.h>
  34 #include <linux/usb/gadget.h>
  35
  36 #include <asm/byteorder.h>
  37 #include <asm/irq.h>
  38 #include <asm/unaligned.h>
  39 #include <mach/irqs.h>
  40
  41 #include <mach/hardware.h>
  42
  43 #include <plat/regs-udc.h>
  44 #include <linux/platform_data/usb-s3c2410_udc.h>
  45
  46
  47 #include "s3c2410_udc.h"
  48
  49 #define DRIVER_DESC     "S3C2410 USB Device Controller Gadget"
  50 #define DRIVER_AUTHOR   "Herbert Pötzl <herbert@13thfloor.at>, " \
  51                         "Arnaud Patard <arnaud.patard@rtp-net.org>"
  52
  53 static const char               gadget_name[] = "s3c2410_udc";
  54 static const char               driver_desc[] = DRIVER_DESC;
  55
  56 static struct s3c2410_udc       *the_controller;
  57 static struct clk               *udc_clock;
  58 static struct clk               *usb_bus_clock;
  59 static void __iomem             *base_addr;
  60 static u64                      rsrc_start;
  61 static u64                      rsrc_len;
  62 static struct dentry            *s3c2410_udc_debugfs_root;
  63
  64 static inline u32 udc_read(u32 reg)
  65 {
  66         return readb(base_addr + reg);
  67 }
  68
  69 static inline void udc_write(u32 value, u32 reg)
  70 {
  71         writeb(value, base_addr + reg);
  72 }
  73
  74 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
  75 {
  76         writeb(value, base + reg);
  77 }
  78
  79 static struct s3c2410_udc_mach_info *udc_info;
  80
  81 /*************************** DEBUG FUNCTION ***************************/
  82 #define DEBUG_NORMAL    1
  83 #define DEBUG_VERBOSE   2
  84
  85 #ifdef CONFIG_USB_S3C2410_DEBUG
  86 #define USB_S3C2410_DEBUG_LEVEL 0
  87
  88 static uint32_t s3c2410_ticks = 0;
  89
  90 __printf(2, 3)
  91 static void dprintk(int level, const char *fmt, ...)
  92 {
  93         static long prevticks;
  94         static int invocation;
  95         struct va_format vaf;
  96         va_list args;
  97
  98         if (level > USB_S3C2410_DEBUG_LEVEL)
  99                 return;
 100
 101         va_start(args, fmt);
 102
 103         vaf.fmt = fmt;
 104         vaf.va = &args;
 105
 106         if (s3c2410_ticks != prevticks) {
 107                 prevticks = s3c2410_ticks;
 108                 invocation = 0;
 109         }
 110
 111         pr_debug("%1lu.%02d USB: %pV", prevticks, invocation++, &vaf);
 112
 113         va_end(args);
 114 }
 115 #else
 116 __printf(2, 3)
 117 static void dprintk(int level, const char *fmt, ...)
 118 {
 119 }
 120 #endif
 121
 122 static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
 123 {
 124         u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg;
 125         u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
 126         u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2;
 127         u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2;
 128
 129         addr_reg       = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
 130         pwr_reg        = udc_read(S3C2410_UDC_PWR_REG);
 131         ep_int_reg     = udc_read(S3C2410_UDC_EP_INT_REG);
 132         usb_int_reg    = udc_read(S3C2410_UDC_USB_INT_REG);
 133         ep_int_en_reg  = udc_read(S3C2410_UDC_EP_INT_EN_REG);
 134         usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
 135         udc_write(0, S3C2410_UDC_INDEX_REG);
 136         ep0_csr        = udc_read(S3C2410_UDC_IN_CSR1_REG);
 137         udc_write(1, S3C2410_UDC_INDEX_REG);
 138         ep1_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 139         ep1_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 140         ep1_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 141         ep1_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 142         udc_write(2, S3C2410_UDC_INDEX_REG);
 143         ep2_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 144         ep2_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 145         ep2_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 146         ep2_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 147
 148         seq_printf(m, "FUNC_ADDR_REG  : 0x%04X\n"
 149                  "PWR_REG        : 0x%04X\n"
 150                  "EP_INT_REG     : 0x%04X\n"
 151                  "USB_INT_REG    : 0x%04X\n"
 152                  "EP_INT_EN_REG  : 0x%04X\n"
 153                  "USB_INT_EN_REG : 0x%04X\n"
 154                  "EP0_CSR        : 0x%04X\n"
 155                  "EP1_I_CSR1     : 0x%04X\n"
 156                  "EP1_I_CSR2     : 0x%04X\n"
 157                  "EP1_O_CSR1     : 0x%04X\n"
 158                  "EP1_O_CSR2     : 0x%04X\n"
 159                  "EP2_I_CSR1     : 0x%04X\n"
 160                  "EP2_I_CSR2     : 0x%04X\n"
 161                  "EP2_O_CSR1     : 0x%04X\n"
 162                  "EP2_O_CSR2     : 0x%04X\n",
 163                         addr_reg, pwr_reg, ep_int_reg, usb_int_reg,
 164                         ep_int_en_reg, usb_int_en_reg, ep0_csr,
 165                         ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2,
 166                         ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2
 167                 );
 168
 169         return 0;
 170 }
 171
 172 static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
 173                                          struct file *file)
 174 {
 175         return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
 176 }
 177
 178 static const struct file_operations s3c2410_udc_debugfs_fops = {
 179         .open           = s3c2410_udc_debugfs_fops_open,
 180         .read           = seq_read,
 181         .llseek         = seq_lseek,
 182         .release        = single_release,
 183         .owner          = THIS_MODULE,
 184 };
 185
 186 /* io macros */
 187
 188 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
 189 {
 190         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 191         udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
 192                         S3C2410_UDC_EP0_CSR_REG);
 193 }
 194
 195 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
 196 {
 197         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 198         writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
 199 }
 200
 201 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
 202 {
 203         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 204         udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
 205 }
 206
 207 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
 208 {
 209         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 210         udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
 211 }
 212
 213 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
 214 {
 215         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 216         udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
 217 }
 218
 219 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
 220 {
 221         udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 222         udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
 223 }
 224
 225 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
 226 {
 227         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 228
 229         udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
 230                                 | S3C2410_UDC_EP0_CSR_DE),
 231                         S3C2410_UDC_EP0_CSR_REG);
 232 }
 233
 234 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
 235 {
 236         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 237         udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
 238                         | S3C2410_UDC_EP0_CSR_DE),
 239                 S3C2410_UDC_EP0_CSR_REG);
 240 }
 241
 242 /*------------------------- I/O ----------------------------------*/
 243
 244 /*
 245  *      s3c2410_udc_done
 246  */
 247 static void s3c2410_udc_done(struct s3c2410_ep *ep,
 248                 struct s3c2410_request *req, int status)
 249 {
 250         unsigned halted = ep->halted;
 251
 252         list_del_init(&req->queue);
 253
 254         if (likely(req->req.status == -EINPROGRESS))
 255                 req->req.status = status;
 256         else
 257                 status = req->req.status;
 258
 259         ep->halted = 1;
 260         usb_gadget_giveback_request(&ep->ep, &req->req);
 261         ep->halted = halted;
 262 }
 263
 264 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
 265                 struct s3c2410_ep *ep, int status)
 266 {
 267         while (!list_empty(&ep->queue)) {
 268                 struct s3c2410_request *req;
 269                 req = list_entry(ep->queue.next, struct s3c2410_request,
 270                                 queue);
 271                 s3c2410_udc_done(ep, req, status);
 272         }
 273 }
 274
 275 static inline int s3c2410_udc_fifo_count_out(void)
 276 {
 277         int tmp;
 278
 279         tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
 280         tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
 281         return tmp;
 282 }
 283
 284 /*
 285  *      s3c2410_udc_write_packet
 286  */
 287 static inline int s3c2410_udc_write_packet(int fifo,
 288                 struct s3c2410_request *req,
 289                 unsigned max)
 290 {
 291         unsigned len = min(req->req.length - req->req.actual, max);
 292         u8 *buf = req->req.buf + req->req.actual;
 293
 294         prefetch(buf);
 295
 296         dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
 297                 req->req.actual, req->req.length, len, req->req.actual + len);
 298
 299         req->req.actual += len;
 300
 301         udelay(5);
 302         writesb(base_addr + fifo, buf, len);
 303         return len;
 304 }
 305
 306 /*
 307  *      s3c2410_udc_write_fifo
 308  *
 309  * return:  0 = still running, 1 = completed, negative = errno
 310  */
 311 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
 312                 struct s3c2410_request *req)
 313 {
 314         unsigned        count;
 315         int             is_last;
 316         u32             idx;
 317         int             fifo_reg;
 318         u32             ep_csr;
 319
 320         idx = ep->bEndpointAddress & 0x7F;
 321         switch (idx) {
 322         default:
 323                 idx = 0;
 324         case 0:
 325                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 326                 break;
 327         case 1:
 328                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 329                 break;
 330         case 2:
 331                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 332                 break;
 333         case 3:
 334                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 335                 break;
 336         case 4:
 337                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 338                 break;
 339         }
 340
 341         count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
 342
 343         /* last packet is often short (sometimes a zlp) */
 344         if (count != ep->ep.maxpacket)
 345                 is_last = 1;
 346         else if (req->req.length != req->req.actual || req->req.zero)
 347                 is_last = 0;
 348         else
 349                 is_last = 2;
 350
 351         /* Only ep0 debug messages are interesting */
 352         if (idx == 0)
 353                 dprintk(DEBUG_NORMAL,
 354                         "Written ep%d %d.%d of %d b [last %d,z %d]\n",
 355                         idx, count, req->req.actual, req->req.length,
 356                         is_last, req->req.zero);
 357
 358         if (is_last) {
 359                 /* The order is important. It prevents sending 2 packets
 360                  * at the same time */
 361
 362                 if (idx == 0) {
 363                         /* Reset signal => no need to say 'data sent' */
 364                         if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 365                                         & S3C2410_UDC_USBINT_RESET))
 366                                 s3c2410_udc_set_ep0_de_in(base_addr);
 367                         ep->dev->ep0state = EP0_IDLE;
 368                 } else {
 369                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 370                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 371                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 372                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 373                                         S3C2410_UDC_IN_CSR1_REG);
 374                 }
 375
 376                 s3c2410_udc_done(ep, req, 0);
 377                 is_last = 1;
 378         } else {
 379                 if (idx == 0) {
 380                         /* Reset signal => no need to say 'data sent' */
 381                         if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 382                                         & S3C2410_UDC_USBINT_RESET))
 383                                 s3c2410_udc_set_ep0_ipr(base_addr);
 384                 } else {
 385                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 386                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 387                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 388                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 389                                         S3C2410_UDC_IN_CSR1_REG);
 390                 }
 391         }
 392
 393         return is_last;
 394 }
 395
 396 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
 397                 struct s3c2410_request *req, unsigned avail)
 398 {
 399         unsigned len;
 400
 401         len = min(req->req.length - req->req.actual, avail);
 402         req->req.actual += len;
 403
 404         readsb(fifo + base_addr, buf, len);
 405         return len;
 406 }
 407
 408 /*
 409  * return:  0 = still running, 1 = queue empty, negative = errno
 410  */
 411 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
 412                                  struct s3c2410_request *req)
 413 {
 414         u8              *buf;
 415         u32             ep_csr;
 416         unsigned        bufferspace;
 417         int             is_last = 1;
 418         unsigned        avail;
 419         int             fifo_count = 0;
 420         u32             idx;
 421         int             fifo_reg;
 422
 423         idx = ep->bEndpointAddress & 0x7F;
 424
 425         switch (idx) {
 426         default:
 427                 idx = 0;
 428         case 0:
 429                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 430                 break;
 431         case 1:
 432                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 433                 break;
 434         case 2:
 435                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 436                 break;
 437         case 3:
 438                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 439                 break;
 440         case 4:
 441                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 442                 break;
 443         }
 444
 445         if (!req->req.length)
 446                 return 1;
 447
 448         buf = req->req.buf + req->req.actual;
 449         bufferspace = req->req.length - req->req.actual;
 450         if (!bufferspace) {
 451                 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
 452                 return -1;
 453         }
 454
 455         udc_write(idx, S3C2410_UDC_INDEX_REG);
 456
 457         fifo_count = s3c2410_udc_fifo_count_out();
 458         dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
 459
 460         if (fifo_count > ep->ep.maxpacket)
 461                 avail = ep->ep.maxpacket;
 462         else
 463                 avail = fifo_count;
 464
 465         fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
 466
 467         /* checking this with ep0 is not accurate as we already
 468          * read a control request
 469          **/
 470         if (idx != 0 && fifo_count < ep->ep.maxpacket) {
 471                 is_last = 1;
 472                 /* overflowed this request?  flush extra data */
 473                 if (fifo_count != avail)
 474                         req->req.status = -EOVERFLOW;
 475         } else {
 476                 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
 477         }
 478
 479         udc_write(idx, S3C2410_UDC_INDEX_REG);
 480         fifo_count = s3c2410_udc_fifo_count_out();
 481
 482         /* Only ep0 debug messages are interesting */
 483         if (idx == 0)
 484                 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
 485                         __func__, fifo_count, is_last);
 486
 487         if (is_last) {
 488                 if (idx == 0) {
 489                         s3c2410_udc_set_ep0_de_out(base_addr);
 490                         ep->dev->ep0state = EP0_IDLE;
 491                 } else {
 492                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 493                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 494                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 495                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 496                                         S3C2410_UDC_OUT_CSR1_REG);
 497                 }
 498
 499                 s3c2410_udc_done(ep, req, 0);
 500         } else {
 501                 if (idx == 0) {
 502                         s3c2410_udc_clear_ep0_opr(base_addr);
 503                 } else {
 504                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 505                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 506                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 507                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 508                                         S3C2410_UDC_OUT_CSR1_REG);
 509                 }
 510         }
 511
 512         return is_last;
 513 }
 514
 515 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
 516 {
 517         unsigned char *outbuf = (unsigned char *)crq;
 518         int bytes_read = 0;
 519
 520         udc_write(0, S3C2410_UDC_INDEX_REG);
 521
 522         bytes_read = s3c2410_udc_fifo_count_out();
 523
 524         dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
 525
 526         if (bytes_read > sizeof(struct usb_ctrlrequest))
 527                 bytes_read = sizeof(struct usb_ctrlrequest);
 528
 529         readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
 530
 531         dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
 532                 bytes_read, crq->bRequest, crq->bRequestType,
 533                 crq->wValue, crq->wIndex, crq->wLength);
 534
 535         return bytes_read;
 536 }
 537
 538 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
 539                 struct usb_ctrlrequest *crq)
 540 {
 541         u16 status = 0;
 542         u8 ep_num = crq->wIndex & 0x7F;
 543         u8 is_in = crq->wIndex & USB_DIR_IN;
 544
 545         switch (crq->bRequestType & USB_RECIP_MASK) {
 546         case USB_RECIP_INTERFACE:
 547                 break;
 548
 549         case USB_RECIP_DEVICE:
 550                 status = dev->devstatus;
 551                 break;
 552
 553         case USB_RECIP_ENDPOINT:
 554                 if (ep_num > 4 || crq->wLength > 2)
 555                         return 1;
 556
 557                 if (ep_num == 0) {
 558                         udc_write(0, S3C2410_UDC_INDEX_REG);
 559                         status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 560                         status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
 561                 } else {
 562                         udc_write(ep_num, S3C2410_UDC_INDEX_REG);
 563                         if (is_in) {
 564                                 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 565                                 status = status & S3C2410_UDC_ICSR1_SENDSTL;
 566                         } else {
 567                                 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 568                                 status = status & S3C2410_UDC_OCSR1_SENDSTL;
 569                         }
 570                 }
 571
 572                 status = status ? 1 : 0;
 573                 break;
 574
 575         default:
 576                 return 1;
 577         }
 578
 579         /* Seems to be needed to get it working. ouch :( */
 580         udelay(5);
 581         udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
 582         udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
 583         s3c2410_udc_set_ep0_de_in(base_addr);
 584
 585         return 0;
 586 }
 587 /*------------------------- usb state machine -------------------------------*/
 588 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
 589
 590 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
 591                                         struct s3c2410_ep *ep,
 592                                         struct usb_ctrlrequest *crq,
 593                                         u32 ep0csr)
 594 {
 595         int len, ret, tmp;
 596
 597         /* start control request? */
 598         if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
 599                 return;
 600
 601         s3c2410_udc_nuke(dev, ep, -EPROTO);
 602
 603         len = s3c2410_udc_read_fifo_crq(crq);
 604         if (len != sizeof(*crq)) {
 605                 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
 606                         " wanted %d bytes got %d. Stalling out...\n",
 607                         sizeof(*crq), len);
 608                 s3c2410_udc_set_ep0_ss(base_addr);
 609                 return;
 610         }
 611
 612         dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
 613                 crq->bRequest, crq->bRequestType, crq->wLength);
 614
 615         /* cope with automagic for some standard requests. */
 616         dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
 617                 == USB_TYPE_STANDARD;
 618         dev->req_config = 0;
 619         dev->req_pending = 1;
 620
 621         switch (crq->bRequest) {
 622         case USB_REQ_SET_CONFIGURATION:
 623                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n");
 624
 625                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 626                         dev->req_config = 1;
 627                         s3c2410_udc_set_ep0_de_out(base_addr);
 628                 }
 629                 break;
 630
 631         case USB_REQ_SET_INTERFACE:
 632                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n");
 633
 634                 if (crq->bRequestType == USB_RECIP_INTERFACE) {
 635                         dev->req_config = 1;
 636                         s3c2410_udc_set_ep0_de_out(base_addr);
 637                 }
 638                 break;
 639
 640         case USB_REQ_SET_ADDRESS:
 641                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n");
 642
 643                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 644                         tmp = crq->wValue & 0x7F;
 645                         dev->address = tmp;
 646                         udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
 647                                         S3C2410_UDC_FUNC_ADDR_REG);
 648                         s3c2410_udc_set_ep0_de_out(base_addr);
 649                         return;
 650                 }
 651                 break;
 652
 653         case USB_REQ_GET_STATUS:
 654                 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n");
 655                 s3c2410_udc_clear_ep0_opr(base_addr);
 656
 657                 if (dev->req_std) {
 658                         if (!s3c2410_udc_get_status(dev, crq))
 659                                 return;
 660                 }
 661                 break;
 662
 663         case USB_REQ_CLEAR_FEATURE:
 664                 s3c2410_udc_clear_ep0_opr(base_addr);
 665
 666                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 667                         break;
 668
 669                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 670                         break;
 671
 672                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
 673                 s3c2410_udc_set_ep0_de_out(base_addr);
 674                 return;
 675
 676         case USB_REQ_SET_FEATURE:
 677                 s3c2410_udc_clear_ep0_opr(base_addr);
 678
 679                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 680                         break;
 681
 682                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 683                         break;
 684
 685                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
 686                 s3c2410_udc_set_ep0_de_out(base_addr);
 687                 return;
 688
 689         default:
 690                 s3c2410_udc_clear_ep0_opr(base_addr);
 691                 break;
 692         }
 693
 694         if (crq->bRequestType & USB_DIR_IN)
 695                 dev->ep0state = EP0_IN_DATA_PHASE;
 696         else
 697                 dev->ep0state = EP0_OUT_DATA_PHASE;
 698
 699         if (!dev->driver)
 700                 return;
 701
 702         /* deliver the request to the gadget driver */
 703         ret = dev->driver->setup(&dev->gadget, crq);
 704         if (ret < 0) {
 705                 if (dev->req_config) {
 706                         dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
 707                                 crq->bRequest, ret);
 708                         return;
 709                 }
 710
 711                 if (ret == -EOPNOTSUPP)
 712                         dprintk(DEBUG_NORMAL, "Operation not supported\n");
 713                 else
 714                         dprintk(DEBUG_NORMAL,
 715                                 "dev->driver->setup failed. (%d)\n", ret);
 716
 717                 udelay(5);
 718                 s3c2410_udc_set_ep0_ss(base_addr);
 719                 s3c2410_udc_set_ep0_de_out(base_addr);
 720                 dev->ep0state = EP0_IDLE;
 721                 /* deferred i/o == no response yet */
 722         } else if (dev->req_pending) {
 723                 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
 724                 dev->req_pending = 0;
 725         }
 726
 727         dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
 728 }
 729
 730 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
 731 {
 732         u32                     ep0csr;
 733         struct s3c2410_ep       *ep = &dev->ep[0];
 734         struct s3c2410_request  *req;
 735         struct usb_ctrlrequest  crq;
 736
 737         if (list_empty(&ep->queue))
 738                 req = NULL;
 739         else
 740                 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
 741
 742         /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
 743          * S3C2410_UDC_EP0_CSR_REG when index is zero */
 744
 745         udc_write(0, S3C2410_UDC_INDEX_REG);
 746         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 747
 748         dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
 749                 ep0csr, ep0states[dev->ep0state]);
 750
 751         /* clear stall status */
 752         if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
 753                 s3c2410_udc_nuke(dev, ep, -EPIPE);
 754                 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
 755                 s3c2410_udc_clear_ep0_sst(base_addr);
 756                 dev->ep0state = EP0_IDLE;
 757                 return;
 758         }
 759
 760         /* clear setup end */
 761         if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
 762                 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
 763                 s3c2410_udc_nuke(dev, ep, 0);
 764                 s3c2410_udc_clear_ep0_se(base_addr);
 765                 dev->ep0state = EP0_IDLE;
 766         }
 767
 768         switch (dev->ep0state) {
 769         case EP0_IDLE:
 770                 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
 771                 break;
 772
 773         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
 774                 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
 775                 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req)
 776                         s3c2410_udc_write_fifo(ep, req);
 777                 break;
 778
 779         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
 780                 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
 781                 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req)
 782                         s3c2410_udc_read_fifo(ep, req);
 783                 break;
 784
 785         case EP0_END_XFER:
 786                 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
 787                 dev->ep0state = EP0_IDLE;
 788                 break;
 789
 790         case EP0_STALL:
 791                 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
 792                 dev->ep0state = EP0_IDLE;
 793                 break;
 794         }
 795 }
 796
 797 /*
 798  *      handle_ep - Manage I/O endpoints
 799  */
 800
 801 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
 802 {
 803         struct s3c2410_request  *req;
 804         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
 805         u32                     ep_csr1;
 806         u32                     idx;
 807
 808         if (likely(!list_empty(&ep->queue)))
 809                 req = list_entry(ep->queue.next,
 810                                 struct s3c2410_request, queue);
 811         else
 812                 req = NULL;
 813
 814         idx = ep->bEndpointAddress & 0x7F;
 815
 816         if (is_in) {
 817                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 818                 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
 819                 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
 820                         idx, ep_csr1, req ? 1 : 0);
 821
 822                 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
 823                         dprintk(DEBUG_VERBOSE, "st\n");
 824                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 825                         udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
 826                                         S3C2410_UDC_IN_CSR1_REG);
 827                         return;
 828                 }
 829
 830                 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req)
 831                         s3c2410_udc_write_fifo(ep, req);
 832         } else {
 833                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 834                 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 835                 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
 836
 837                 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
 838                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 839                         udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
 840                                         S3C2410_UDC_OUT_CSR1_REG);
 841                         return;
 842                 }
 843
 844                 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req)
 845                         s3c2410_udc_read_fifo(ep, req);
 846         }
 847 }
 848
 849 #include <mach/regs-irq.h>
 850
 851 /*
 852  *      s3c2410_udc_irq - interrupt handler
 853  */
 854 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
 855 {
 856         struct s3c2410_udc *dev = _dev;
 857         int usb_status;
 858         int usbd_status;
 859         int pwr_reg;
 860         int ep0csr;
 861         int i;
 862         u32 idx, idx2;
 863         unsigned long flags;
 864
 865         spin_lock_irqsave(&dev->lock, flags);
 866
 867         /* Driver connected ? */
 868         if (!dev->driver) {
 869                 /* Clear interrupts */
 870                 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
 871                                 S3C2410_UDC_USB_INT_REG);
 872                 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
 873                                 S3C2410_UDC_EP_INT_REG);
 874         }
 875
 876         /* Save index */
 877         idx = udc_read(S3C2410_UDC_INDEX_REG);
 878
 879         /* Read status registers */
 880         usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
 881         usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
 882         pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
 883
 884         udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 885         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 886
 887         dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
 888                 usb_status, usbd_status, pwr_reg, ep0csr);
 889
 890         /*
 891          * Now, handle interrupts. There's two types :
 892          * - Reset, Resume, Suspend coming -> usb_int_reg
 893          * - EP -> ep_int_reg
 894          */
 895
 896         /* RESET */
 897         if (usb_status & S3C2410_UDC_USBINT_RESET) {
 898                 /* two kind of reset :
 899                  * - reset start -> pwr reg = 8
 900                  * - reset end   -> pwr reg = 0
 901                  **/
 902                 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
 903                         ep0csr, pwr_reg);
 904
 905                 dev->gadget.speed = USB_SPEED_UNKNOWN;
 906                 udc_write(0x00, S3C2410_UDC_INDEX_REG);
 907                 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
 908                                 S3C2410_UDC_MAXP_REG);
 909                 dev->address = 0;
 910
 911                 dev->ep0state = EP0_IDLE;
 912                 dev->gadget.speed = USB_SPEED_FULL;
 913
 914                 /* clear interrupt */
 915                 udc_write(S3C2410_UDC_USBINT_RESET,
 916                                 S3C2410_UDC_USB_INT_REG);
 917
 918                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 919                 spin_unlock_irqrestore(&dev->lock, flags);
 920                 return IRQ_HANDLED;
 921         }
 922
 923         /* RESUME */
 924         if (usb_status & S3C2410_UDC_USBINT_RESUME) {
 925                 dprintk(DEBUG_NORMAL, "USB resume\n");
 926
 927                 /* clear interrupt */
 928                 udc_write(S3C2410_UDC_USBINT_RESUME,
 929                                 S3C2410_UDC_USB_INT_REG);
 930
 931                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 932                                 && dev->driver
 933                                 && dev->driver->resume)
 934                         dev->driver->resume(&dev->gadget);
 935         }
 936
 937         /* SUSPEND */
 938         if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
 939                 dprintk(DEBUG_NORMAL, "USB suspend\n");
 940
 941                 /* clear interrupt */
 942                 udc_write(S3C2410_UDC_USBINT_SUSPEND,
 943                                 S3C2410_UDC_USB_INT_REG);
 944
 945                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 946                                 && dev->driver
 947                                 && dev->driver->suspend)
 948                         dev->driver->suspend(&dev->gadget);
 949
 950                 dev->ep0state = EP0_IDLE;
 951         }
 952
 953         /* EP */
 954         /* control traffic */
 955         /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
 956          * generate an interrupt
 957          */
 958         if (usbd_status & S3C2410_UDC_INT_EP0) {
 959                 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
 960                 /* Clear the interrupt bit by setting it to 1 */
 961                 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
 962                 s3c2410_udc_handle_ep0(dev);
 963         }
 964
 965         /* endpoint data transfers */
 966         for (i = 1; i < S3C2410_ENDPOINTS; i++) {
 967                 u32 tmp = 1 << i;
 968                 if (usbd_status & tmp) {
 969                         dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
 970
 971                         /* Clear the interrupt bit by setting it to 1 */
 972                         udc_write(tmp, S3C2410_UDC_EP_INT_REG);
 973                         s3c2410_udc_handle_ep(&dev->ep[i]);
 974                 }
 975         }
 976
 977         /* what else causes this interrupt? a receive! who is it? */
 978         if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
 979                 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
 980                         idx2 = udc_read(S3C2410_UDC_INDEX_REG);
 981                         udc_write(i, S3C2410_UDC_INDEX_REG);
 982
 983                         if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
 984                                 s3c2410_udc_handle_ep(&dev->ep[i]);
 985
 986                         /* restore index */
 987                         udc_write(idx2, S3C2410_UDC_INDEX_REG);
 988                 }
 989         }
 990
 991         dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
 992
 993         /* Restore old index */
 994         udc_write(idx, S3C2410_UDC_INDEX_REG);
 995
 996         spin_unlock_irqrestore(&dev->lock, flags);
 997
 998         return IRQ_HANDLED;
 999 }
1000 /*------------------------- s3c2410_ep_ops ----------------------------------*/
1001
1002 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1003 {
1004         return container_of(ep, struct s3c2410_ep, ep);
1005 }
1006
1007 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1008 {
1009         return container_of(gadget, struct s3c2410_udc, gadget);
1010 }
1011
1012 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1013 {
1014         return container_of(req, struct s3c2410_request, req);
1015 }
1016
1017 /*
1018  *      s3c2410_udc_ep_enable
1019  */
1020 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1021                                  const struct usb_endpoint_descriptor *desc)
1022 {
1023         struct s3c2410_udc      *dev;
1024         struct s3c2410_ep       *ep;
1025         u32                     max, tmp;
1026         unsigned long           flags;
1027         u32                     csr1, csr2;
1028         u32                     int_en_reg;
1029
1030         ep = to_s3c2410_ep(_ep);
1031
1032         if (!_ep || !desc
1033                         || _ep->name == ep0name
1034                         || desc->bDescriptorType != USB_DT_ENDPOINT)
1035                 return -EINVAL;
1036
1037         dev = ep->dev;
1038         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1039                 return -ESHUTDOWN;
1040
1041         max = usb_endpoint_maxp(desc);
1042
1043         local_irq_save(flags);
1044         _ep->maxpacket = max;
1045         ep->ep.desc = desc;
1046         ep->halted = 0;
1047         ep->bEndpointAddress = desc->bEndpointAddress;
1048
1049         /* set max packet */
1050         udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1051         udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1052
1053         /* set type, direction, address; reset fifo counters */
1054         if (desc->bEndpointAddress & USB_DIR_IN) {
1055                 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1056                 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1057
1058                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1059                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1060                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1061                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1062         } else {
1063                 /* don't flush in fifo or it will cause endpoint interrupt */
1064                 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1065                 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1066
1067                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1068                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1069                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1070                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1071
1072                 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1073                 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1074
1075                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1076                 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1077                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1078                 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1079         }
1080
1081         /* enable irqs */
1082         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1083         udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1084
1085         /* print some debug message */
1086         tmp = desc->bEndpointAddress;
1087         dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1088                  _ep->name, ep->num, tmp,
1089                  desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1090
1091         local_irq_restore(flags);
1092         s3c2410_udc_set_halt(_ep, 0);
1093
1094         return 0;
1095 }
1096
1097 /*
1098  * s3c2410_udc_ep_disable
1099  */
1100 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1101 {
1102         struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1103         unsigned long flags;
1104         u32 int_en_reg;
1105
1106         if (!_ep || !ep->ep.desc) {
1107                 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1108                         _ep ? ep->ep.name : NULL);
1109                 return -EINVAL;
1110         }
1111
1112         local_irq_save(flags);
1113
1114         dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1115
1116         ep->ep.desc = NULL;
1117         ep->halted = 1;
1118
1119         s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN);
1120
1121         /* disable irqs */
1122         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1123         udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1124
1125         local_irq_restore(flags);
1126
1127         dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1128
1129         return 0;
1130 }
1131
1132 /*
1133  * s3c2410_udc_alloc_request
1134  */
1135 static struct usb_request *
1136 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1137 {
1138         struct s3c2410_request *req;
1139
1140         dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags);
1141
1142         if (!_ep)
1143                 return NULL;
1144
1145         req = kzalloc(sizeof(struct s3c2410_request), mem_flags);
1146         if (!req)
1147                 return NULL;
1148
1149         INIT_LIST_HEAD(&req->queue);
1150         return &req->req;
1151 }
1152
1153 /*
1154  * s3c2410_udc_free_request
1155  */
1156 static void
1157 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1158 {
1159         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1160         struct s3c2410_request  *req = to_s3c2410_req(_req);
1161
1162         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1163
1164         if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name))
1165                 return;
1166
1167         WARN_ON(!list_empty(&req->queue));
1168         kfree(req);
1169 }
1170
1171 /*
1172  *      s3c2410_udc_queue
1173  */
1174 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1175                 gfp_t gfp_flags)
1176 {
1177         struct s3c2410_request  *req = to_s3c2410_req(_req);
1178         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1179         struct s3c2410_udc      *dev;
1180         u32                     ep_csr = 0;
1181         int                     fifo_count = 0;
1182         unsigned long           flags;
1183
1184         if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1185                 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1186                 return -EINVAL;
1187         }
1188
1189         dev = ep->dev;
1190         if (unlikely(!dev->driver
1191                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1192                 return -ESHUTDOWN;
1193         }
1194
1195         local_irq_save(flags);
1196
1197         if (unlikely(!_req || !_req->complete
1198                         || !_req->buf || !list_empty(&req->queue))) {
1199                 if (!_req)
1200                         dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1201                 else {
1202                         dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1203                                 __func__, !_req->complete, !_req->buf,
1204                                 !list_empty(&req->queue));
1205                 }
1206
1207                 local_irq_restore(flags);
1208                 return -EINVAL;
1209         }
1210
1211         _req->status = -EINPROGRESS;
1212         _req->actual = 0;
1213
1214         dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1215                  __func__, ep->bEndpointAddress, _req->length);
1216
1217         if (ep->bEndpointAddress) {
1218                 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1219
1220                 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1221                                 ? S3C2410_UDC_IN_CSR1_REG
1222                                 : S3C2410_UDC_OUT_CSR1_REG);
1223                 fifo_count = s3c2410_udc_fifo_count_out();
1224         } else {
1225                 udc_write(0, S3C2410_UDC_INDEX_REG);
1226                 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1227                 fifo_count = s3c2410_udc_fifo_count_out();
1228         }
1229
1230         /* kickstart this i/o queue? */
1231         if (list_empty(&ep->queue) && !ep->halted) {
1232                 if (ep->bEndpointAddress == 0 /* ep0 */) {
1233                         switch (dev->ep0state) {
1234                         case EP0_IN_DATA_PHASE:
1235                                 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1236                                                 && s3c2410_udc_write_fifo(ep,
1237                                                         req)) {
1238                                         dev->ep0state = EP0_IDLE;
1239                                         req = NULL;
1240                                 }
1241                                 break;
1242
1243                         case EP0_OUT_DATA_PHASE:
1244                                 if ((!_req->length)
1245                                         || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1246                                                 && s3c2410_udc_read_fifo(ep,
1247                                                         req))) {
1248                                         dev->ep0state = EP0_IDLE;
1249                                         req = NULL;
1250                                 }
1251                                 break;
1252
1253                         default:
1254                                 local_irq_restore(flags);
1255                                 return -EL2HLT;
1256                         }
1257                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1258                                 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1259                                 && s3c2410_udc_write_fifo(ep, req)) {
1260                         req = NULL;
1261                 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1262                                 && fifo_count
1263                                 && s3c2410_udc_read_fifo(ep, req)) {
1264                         req = NULL;
1265                 }
1266         }
1267
1268         /* pio or dma irq handler advances the queue. */
1269         if (likely(req))
1270                 list_add_tail(&req->queue, &ep->queue);
1271
1272         local_irq_restore(flags);
1273
1274         dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1275         return 0;
1276 }
1277
1278 /*
1279  *      s3c2410_udc_dequeue
1280  */
1281 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1282 {
1283         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1284         struct s3c2410_udc      *udc;
1285         int                     retval = -EINVAL;
1286         unsigned long           flags;
1287         struct s3c2410_request  *req = NULL;
1288
1289         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1290
1291         if (!the_controller->driver)
1292                 return -ESHUTDOWN;
1293
1294         if (!_ep || !_req)
1295                 return retval;
1296
1297         udc = to_s3c2410_udc(ep->gadget);
1298
1299         local_irq_save(flags);
1300
1301         list_for_each_entry(req, &ep->queue, queue) {
1302                 if (&req->req == _req) {
1303                         list_del_init(&req->queue);
1304                         _req->status = -ECONNRESET;
1305                         retval = 0;
1306                         break;
1307                 }
1308         }
1309
1310         if (retval == 0) {
1311                 dprintk(DEBUG_VERBOSE,
1312                         "dequeued req %p from %s, len %d buf %p\n",
1313                         req, _ep->name, _req->length, _req->buf);
1314
1315                 s3c2410_udc_done(ep, req, -ECONNRESET);
1316         }
1317
1318         local_irq_restore(flags);
1319         return retval;
1320 }
1321
1322 /*
1323  * s3c2410_udc_set_halt
1324  */
1325 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1326 {
1327         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1328         u32                     ep_csr = 0;
1329         unsigned long           flags;
1330         u32                     idx;
1331
1332         if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1333                 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1334                 return -EINVAL;
1335         }
1336
1337         local_irq_save(flags);
1338
1339         idx = ep->bEndpointAddress & 0x7F;
1340
1341         if (idx == 0) {
1342                 s3c2410_udc_set_ep0_ss(base_addr);
1343                 s3c2410_udc_set_ep0_de_out(base_addr);
1344         } else {
1345                 udc_write(idx, S3C2410_UDC_INDEX_REG);
1346                 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1347                                 ? S3C2410_UDC_IN_CSR1_REG
1348                                 : S3C2410_UDC_OUT_CSR1_REG);
1349
1350                 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1351                         if (value)
1352                                 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1353                                         S3C2410_UDC_IN_CSR1_REG);
1354                         else {
1355                                 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1356                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1357                                 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1358                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1359                         }
1360                 } else {
1361                         if (value)
1362                                 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1363                                         S3C2410_UDC_OUT_CSR1_REG);
1364                         else {
1365                                 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1366                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1367                                 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1368                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1369                         }
1370                 }
1371         }
1372
1373         ep->halted = value ? 1 : 0;
1374         local_irq_restore(flags);
1375
1376         return 0;
1377 }
1378
1379 static const struct usb_ep_ops s3c2410_ep_ops = {
1380         .enable         = s3c2410_udc_ep_enable,
1381         .disable        = s3c2410_udc_ep_disable,
1382
1383         .alloc_request  = s3c2410_udc_alloc_request,
1384         .free_request   = s3c2410_udc_free_request,
1385
1386         .queue          = s3c2410_udc_queue,
1387         .dequeue        = s3c2410_udc_dequeue,
1388
1389         .set_halt       = s3c2410_udc_set_halt,
1390 };
1391
1392 /*------------------------- usb_gadget_ops ----------------------------------*/
1393
1394 /*
1395  *      s3c2410_udc_get_frame
1396  */
1397 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1398 {
1399         int tmp;
1400
1401         dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1402
1403         tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1404         tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1405         return tmp;
1406 }
1407
1408 /*
1409  *      s3c2410_udc_wakeup
1410  */
1411 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1412 {
1413         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1414         return 0;
1415 }
1416
1417 /*
1418  *      s3c2410_udc_set_selfpowered
1419  */
1420 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1421 {
1422         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1423
1424         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1425
1426         gadget->is_selfpowered = (value != 0);
1427         if (value)
1428                 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1429         else
1430                 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1431
1432         return 0;
1433 }
1434
1435 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1436 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1437
1438 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1439 {
1440         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1441
1442         if (udc_info && (udc_info->udc_command ||
1443                 gpio_is_valid(udc_info->pullup_pin))) {
1444
1445                 if (is_on)
1446                         s3c2410_udc_enable(udc);
1447                 else {
1448                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1449                                 if (udc->driver && udc->driver->disconnect)
1450                                         udc->driver->disconnect(&udc->gadget);
1451
1452                         }
1453                         s3c2410_udc_disable(udc);
1454                 }
1455         } else {
1456                 return -EOPNOTSUPP;
1457         }
1458
1459         return 0;
1460 }
1461
1462 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1463 {
1464         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1465
1466         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1467
1468         udc->vbus = (is_active != 0);
1469         s3c2410_udc_set_pullup(udc, is_active);
1470         return 0;
1471 }
1472
1473 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1474 {
1475         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1476
1477         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1478
1479         s3c2410_udc_set_pullup(udc, is_on);
1480         return 0;
1481 }
1482
1483 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1484 {
1485         struct s3c2410_udc      *dev = _dev;
1486         unsigned int            value;
1487
1488         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1489
1490         value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1491         if (udc_info->vbus_pin_inverted)
1492                 value = !value;
1493
1494         if (value != dev->vbus)
1495                 s3c2410_udc_vbus_session(&dev->gadget, value);
1496
1497         return IRQ_HANDLED;
1498 }
1499
1500 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1501 {
1502         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1503
1504         if (udc_info && udc_info->vbus_draw) {
1505                 udc_info->vbus_draw(ma);
1506                 return 0;
1507         }
1508
1509         return -ENOTSUPP;
1510 }
1511
1512 static int s3c2410_udc_start(struct usb_gadget *g,
1513                 struct usb_gadget_driver *driver);
1514 static int s3c2410_udc_stop(struct usb_gadget *g);
1515
1516 static const struct usb_gadget_ops s3c2410_ops = {
1517         .get_frame              = s3c2410_udc_get_frame,
1518         .wakeup                 = s3c2410_udc_wakeup,
1519         .set_selfpowered        = s3c2410_udc_set_selfpowered,
1520         .pullup                 = s3c2410_udc_pullup,
1521         .vbus_session           = s3c2410_udc_vbus_session,
1522         .vbus_draw              = s3c2410_vbus_draw,
1523         .udc_start              = s3c2410_udc_start,
1524         .udc_stop               = s3c2410_udc_stop,
1525 };
1526
1527 static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1528 {
1529         if (!udc_info)
1530                 return;
1531
1532         if (udc_info->udc_command) {
1533                 udc_info->udc_command(cmd);
1534         } else if (gpio_is_valid(udc_info->pullup_pin)) {
1535                 int value;
1536
1537                 switch (cmd) {
1538                 case S3C2410_UDC_P_ENABLE:
1539                         value = 1;
1540                         break;
1541                 case S3C2410_UDC_P_DISABLE:
1542                         value = 0;
1543                         break;
1544                 default:
1545                         return;
1546                 }
1547                 value ^= udc_info->pullup_pin_inverted;
1548
1549                 gpio_set_value(udc_info->pullup_pin, value);
1550         }
1551 }
1552
1553 /*------------------------- gadget driver handling---------------------------*/
1554 /*
1555  * s3c2410_udc_disable
1556  */
1557 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1558 {
1559         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1560
1561         /* Disable all interrupts */
1562         udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1563         udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1564
1565         /* Clear the interrupt registers */
1566         udc_write(S3C2410_UDC_USBINT_RESET
1567                                 | S3C2410_UDC_USBINT_RESUME
1568                                 | S3C2410_UDC_USBINT_SUSPEND,
1569                         S3C2410_UDC_USB_INT_REG);
1570
1571         udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1572
1573         /* Good bye, cruel world */
1574         s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1575
1576         /* Set speed to unknown */
1577         dev->gadget.speed = USB_SPEED_UNKNOWN;
1578 }
1579
1580 /*
1581  * s3c2410_udc_reinit
1582  */
1583 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1584 {
1585         u32 i;
1586
1587         /* device/ep0 records init */
1588         INIT_LIST_HEAD(&dev->gadget.ep_list);
1589         INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1590         dev->ep0state = EP0_IDLE;
1591
1592         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1593                 struct s3c2410_ep *ep = &dev->ep[i];
1594
1595                 if (i != 0)
1596                         list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1597
1598                 ep->dev = dev;
1599                 ep->ep.desc = NULL;
1600                 ep->halted = 0;
1601                 INIT_LIST_HEAD(&ep->queue);
1602                 usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket);
1603         }
1604 }
1605
1606 /*
1607  * s3c2410_udc_enable
1608  */
1609 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1610 {
1611         int i;
1612
1613         dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1614
1615         /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1616         dev->gadget.speed = USB_SPEED_FULL;
1617
1618         /* Set MAXP for all endpoints */
1619         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1620                 udc_write(i, S3C2410_UDC_INDEX_REG);
1621                 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1622                                 S3C2410_UDC_MAXP_REG);
1623         }
1624
1625         /* Set default power state */
1626         udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1627
1628         /* Enable reset and suspend interrupt interrupts */
1629         udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1630                         S3C2410_UDC_USB_INT_EN_REG);
1631
1632         /* Enable ep0 interrupt */
1633         udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1634
1635         /* time to say "hello, world" */
1636         s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1637 }
1638
1639 static int s3c2410_udc_start(struct usb_gadget *g,
1640                 struct usb_gadget_driver *driver)
1641 {
1642         struct s3c2410_udc *udc = to_s3c2410(g);
1643
1644         dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1645
1646         /* Hook the driver */
1647         udc->driver = driver;
1648
1649         /* Enable udc */
1650         s3c2410_udc_enable(udc);
1651
1652         return 0;
1653 }
1654
1655 static int s3c2410_udc_stop(struct usb_gadget *g)
1656 {
1657         struct s3c2410_udc *udc = to_s3c2410(g);
1658
1659         udc->driver = NULL;
1660
1661         /* Disable udc */
1662         s3c2410_udc_disable(udc);
1663
1664         return 0;
1665 }
1666
1667 /*---------------------------------------------------------------------------*/
1668 static struct s3c2410_udc memory = {
1669         .gadget = {
1670                 .ops            = &s3c2410_ops,
1671                 .ep0            = &memory.ep[0].ep,
1672                 .name           = gadget_name,
1673                 .dev = {
1674                         .init_name      = "gadget",
1675                 },
1676         },
1677
1678         /* control endpoint */
1679         .ep[0] = {
1680                 .num            = 0,
1681                 .ep = {
1682                         .name           = ep0name,
1683                         .ops            = &s3c2410_ep_ops,
1684                         .maxpacket      = EP0_FIFO_SIZE,
1685                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL,
1686                                                 USB_EP_CAPS_DIR_ALL),
1687                 },
1688                 .dev            = &memory,
1689         },
1690
1691         /* first group of endpoints */
1692         .ep[1] = {
1693                 .num            = 1,
1694                 .ep = {
1695                         .name           = "ep1-bulk",
1696                         .ops            = &s3c2410_ep_ops,
1697                         .maxpacket      = EP_FIFO_SIZE,
1698                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1699                                                 USB_EP_CAPS_DIR_ALL),
1700                 },
1701                 .dev            = &memory,
1702                 .fifo_size      = EP_FIFO_SIZE,
1703                 .bEndpointAddress = 1,
1704                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1705         },
1706         .ep[2] = {
1707                 .num            = 2,
1708                 .ep = {
1709                         .name           = "ep2-bulk",
1710                         .ops            = &s3c2410_ep_ops,
1711                         .maxpacket      = EP_FIFO_SIZE,
1712                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1713                                                 USB_EP_CAPS_DIR_ALL),
1714                 },
1715                 .dev            = &memory,
1716                 .fifo_size      = EP_FIFO_SIZE,
1717                 .bEndpointAddress = 2,
1718                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1719         },
1720         .ep[3] = {
1721                 .num            = 3,
1722                 .ep = {
1723                         .name           = "ep3-bulk",
1724                         .ops            = &s3c2410_ep_ops,
1725                         .maxpacket      = EP_FIFO_SIZE,
1726                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1727                                                 USB_EP_CAPS_DIR_ALL),
1728                 },
1729                 .dev            = &memory,
1730                 .fifo_size      = EP_FIFO_SIZE,
1731                 .bEndpointAddress = 3,
1732                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1733         },
1734         .ep[4] = {
1735                 .num            = 4,
1736                 .ep = {
1737                         .name           = "ep4-bulk",
1738                         .ops            = &s3c2410_ep_ops,
1739                         .maxpacket      = EP_FIFO_SIZE,
1740                         .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1741                                                 USB_EP_CAPS_DIR_ALL),
1742                 },
1743                 .dev            = &memory,
1744                 .fifo_size      = EP_FIFO_SIZE,
1745                 .bEndpointAddress = 4,
1746                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1747         }
1748
1749 };
1750
1751 /*
1752  *      probe - binds to the platform device
1753  */
1754 static int s3c2410_udc_probe(struct platform_device *pdev)
1755 {
1756         struct s3c2410_udc *udc = &memory;
1757         struct device *dev = &pdev->dev;
1758         int retval;
1759         int irq;
1760
1761         dev_dbg(dev, "%s()\n", __func__);
1762
1763         usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1764         if (IS_ERR(usb_bus_clock)) {
1765                 dev_err(dev, "failed to get usb bus clock source\n");
1766                 return PTR_ERR(usb_bus_clock);
1767         }
1768
1769         clk_prepare_enable(usb_bus_clock);
1770
1771         udc_clock = clk_get(NULL, "usb-device");
1772         if (IS_ERR(udc_clock)) {
1773                 dev_err(dev, "failed to get udc clock source\n");
1774                 return PTR_ERR(udc_clock);
1775         }
1776
1777         clk_prepare_enable(udc_clock);
1778
1779         mdelay(10);
1780
1781         dev_dbg(dev, "got and enabled clocks\n");
1782
1783         if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1784                 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1785                 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1786                 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1787                 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1788                 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1789         }
1790
1791         spin_lock_init(&udc->lock);
1792         udc_info = dev_get_platdata(&pdev->dev);
1793
1794         rsrc_start = S3C2410_PA_USBDEV;
1795         rsrc_len   = S3C24XX_SZ_USBDEV;
1796
1797         if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1798                 return -EBUSY;
1799
1800         base_addr = ioremap(rsrc_start, rsrc_len);
1801         if (!base_addr) {
1802                 retval = -ENOMEM;
1803                 goto err_mem;
1804         }
1805
1806         the_controller = udc;
1807         platform_set_drvdata(pdev, udc);
1808
1809         s3c2410_udc_disable(udc);
1810         s3c2410_udc_reinit(udc);
1811
1812         /* irq setup after old hardware state is cleaned up */
1813         retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1814                              0, gadget_name, udc);
1815
1816         if (retval != 0) {
1817                 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1818                 retval = -EBUSY;
1819                 goto err_map;
1820         }
1821
1822         dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1823
1824         if (udc_info && udc_info->vbus_pin > 0) {
1825                 retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1826                 if (retval < 0) {
1827                         dev_err(dev, "cannot claim vbus pin\n");
1828                         goto err_int;
1829                 }
1830
1831                 irq = gpio_to_irq(udc_info->vbus_pin);
1832                 if (irq < 0) {
1833                         dev_err(dev, "no irq for gpio vbus pin\n");
1834                         retval = irq;
1835                         goto err_gpio_claim;
1836                 }
1837
1838                 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1839                                      IRQF_TRIGGER_RISING
1840                                      | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1841                                      gadget_name, udc);
1842
1843                 if (retval != 0) {
1844                         dev_err(dev, "can't get vbus irq %d, err %d\n",
1845                                 irq, retval);
1846                         retval = -EBUSY;
1847                         goto err_gpio_claim;
1848                 }
1849
1850                 dev_dbg(dev, "got irq %i\n", irq);
1851         } else {
1852                 udc->vbus = 1;
1853         }
1854
1855         if (udc_info && !udc_info->udc_command &&
1856                 gpio_is_valid(udc_info->pullup_pin)) {
1857
1858                 retval = gpio_request_one(udc_info->pullup_pin,
1859                                 udc_info->vbus_pin_inverted ?
1860                                 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1861                                 "udc pullup");
1862                 if (retval)
1863                         goto err_vbus_irq;
1864         }
1865
1866         retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1867         if (retval)
1868                 goto err_add_udc;
1869
1870         udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1871                                              s3c2410_udc_debugfs_root, udc,
1872                                              &s3c2410_udc_debugfs_fops);
1873
1874         dev_dbg(dev, "probe ok\n");
1875
1876         return 0;
1877
1878 err_add_udc:
1879         if (udc_info && !udc_info->udc_command &&
1880                         gpio_is_valid(udc_info->pullup_pin))
1881                 gpio_free(udc_info->pullup_pin);
1882 err_vbus_irq:
1883         if (udc_info && udc_info->vbus_pin > 0)
1884                 free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1885 err_gpio_claim:
1886         if (udc_info && udc_info->vbus_pin > 0)
1887                 gpio_free(udc_info->vbus_pin);
1888 err_int:
1889         free_irq(IRQ_USBD, udc);
1890 err_map:
1891         iounmap(base_addr);
1892 err_mem:
1893         release_mem_region(rsrc_start, rsrc_len);
1894
1895         return retval;
1896 }
1897
1898 /*
1899  *      s3c2410_udc_remove
1900  */
1901 static int s3c2410_udc_remove(struct platform_device *pdev)
1902 {
1903         struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1904         unsigned int irq;
1905
1906         dev_dbg(&pdev->dev, "%s()\n", __func__);
1907
1908         if (udc->driver)
1909                 return -EBUSY;
1910
1911         usb_del_gadget_udc(&udc->gadget);
1912         debugfs_remove(udc->regs_info);
1913
1914         if (udc_info && !udc_info->udc_command &&
1915                 gpio_is_valid(udc_info->pullup_pin))
1916                 gpio_free(udc_info->pullup_pin);
1917
1918         if (udc_info && udc_info->vbus_pin > 0) {
1919                 irq = gpio_to_irq(udc_info->vbus_pin);
1920                 free_irq(irq, udc);
1921         }
1922
1923         free_irq(IRQ_USBD, udc);
1924
1925         iounmap(base_addr);
1926         release_mem_region(rsrc_start, rsrc_len);
1927
1928         if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1929                 clk_disable_unprepare(udc_clock);
1930                 clk_put(udc_clock);
1931                 udc_clock = NULL;
1932         }
1933
1934         if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1935                 clk_disable_unprepare(usb_bus_clock);
1936                 clk_put(usb_bus_clock);
1937                 usb_bus_clock = NULL;
1938         }
1939
1940         dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1941         return 0;
1942 }
1943
1944 #ifdef CONFIG_PM
1945 static int
1946 s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1947 {
1948         s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1949
1950         return 0;
1951 }
1952
1953 static int s3c2410_udc_resume(struct platform_device *pdev)
1954 {
1955         s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1956
1957         return 0;
1958 }
1959 #else
1960 #define s3c2410_udc_suspend     NULL
1961 #define s3c2410_udc_resume      NULL
1962 #endif
1963
1964 static const struct platform_device_id s3c_udc_ids[] = {
1965         { "s3c2410-usbgadget", },
1966         { "s3c2440-usbgadget", },
1967         { }
1968 };
1969 MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
1970
1971 static struct platform_driver udc_driver_24x0 = {
1972         .driver         = {
1973                 .name   = "s3c24x0-usbgadget",
1974         },
1975         .probe          = s3c2410_udc_probe,
1976         .remove         = s3c2410_udc_remove,
1977         .suspend        = s3c2410_udc_suspend,
1978         .resume         = s3c2410_udc_resume,
1979         .id_table       = s3c_udc_ids,
1980 };
1981
1982 static int __init udc_init(void)
1983 {
1984         int retval;
1985
1986         dprintk(DEBUG_NORMAL, "%s\n", gadget_name);
1987
1988         s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
1989
1990         retval = platform_driver_register(&udc_driver_24x0);
1991         if (retval)
1992                 goto err;
1993
1994         return 0;
1995
1996 err:
1997         debugfs_remove(s3c2410_udc_debugfs_root);
1998         return retval;
1999 }
2000
2001 static void __exit udc_exit(void)
2002 {
2003         platform_driver_unregister(&udc_driver_24x0);
2004         debugfs_remove_recursive(s3c2410_udc_debugfs_root);
2005 }
2006
2007 module_init(udc_init);
2008 module_exit(udc_exit);
2009
2010 MODULE_AUTHOR(DRIVER_AUTHOR);
2011 MODULE_DESCRIPTION(DRIVER_DESC);
2012 MODULE_LICENSE("GPL");