drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Enhanced Host Controller Interface (EHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * Copyright (c) 2000-2004 by David Brownell
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License as published by the
  10  * Free Software Foundation; either version 2 of the License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/dmapool.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/hrtimer.h>
  34 #include <linux/list.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/usb.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/usb/otg.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/dma-mapping.h>
  41 #include <linux/debugfs.h>
  42 #include <linux/slab.h>
  43
  44 #include <asm/byteorder.h>
  45 #include <asm/io.h>
  46 #include <asm/irq.h>
  47 #include <asm/unaligned.h>
  48
  49 #if defined(CONFIG_PPC_PS3)
  50 #include <asm/firmware.h>
  51 #endif
  52
  53 /*-------------------------------------------------------------------------*/
  54
  55 /*
  56  * EHCI hc_driver implementation ... experimental, incomplete.
  57  * Based on the final 1.0 register interface specification.
  58  *
  59  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  60  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  61  * Next comes "CardBay", using USB 2.0 signals.
  62  *
  63  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  64  * Special thanks to Intel and VIA for providing host controllers to
  65  * test this driver on, and Cypress (including In-System Design) for
  66  * providing early devices for those host controllers to talk to!
  67  */
  68
  69 #define DRIVER_AUTHOR "David Brownell"
  70 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  71
  72 static const char       hcd_name [] = "ehci_hcd";
  73
  74
  75 #undef EHCI_URB_TRACE
  76
  77 /* magic numbers that can affect system performance */
  78 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  79 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  80 #define EHCI_TUNE_RL_TT         0
  81 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  82 #define EHCI_TUNE_MULT_TT       1
  83 /*
  84  * Some drivers think it's safe to schedule isochronous transfers more than
  85  * 256 ms into the future (partly as a result of an old bug in the scheduling
  86  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  87  * length of 512 frames instead of 256.
  88  */
  89 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  90
  91 /* Initial IRQ latency:  faster than hw default */
  92 static int log2_irq_thresh = 0;         // 0 to 6
  93 module_param (log2_irq_thresh, int, S_IRUGO);
  94 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  95
  96 /* initial park setting:  slower than hw default */
  97 static unsigned park = 0;
  98 module_param (park, uint, S_IRUGO);
  99 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
 100
 101 /* for flakey hardware, ignore overcurrent indicators */
 102 static bool ignore_oc = 0;
 103 module_param (ignore_oc, bool, S_IRUGO);
 104 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 105
 106 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 107
 108 /*-------------------------------------------------------------------------*/
 109
 110 #include "ehci.h"
 111 #include "pci-quirks.h"
 112
 113 static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
 114                 struct ehci_tt *tt);
 115
 116 /*
 117  * The MosChip MCS9990 controller updates its microframe counter
 118  * a little before the frame counter, and occasionally we will read
 119  * the invalid intermediate value.  Avoid problems by checking the
 120  * microframe number (the low-order 3 bits); if they are 0 then
 121  * re-read the register to get the correct value.
 122  */
 123 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
 124 {
 125         unsigned uf;
 126
 127         uf = ehci_readl(ehci, &ehci->regs->frame_index);
 128         if (unlikely((uf & 7) == 0))
 129                 uf = ehci_readl(ehci, &ehci->regs->frame_index);
 130         return uf;
 131 }
 132
 133 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
 134 {
 135         if (ehci->frame_index_bug)
 136                 return ehci_moschip_read_frame_index(ehci);
 137         return ehci_readl(ehci, &ehci->regs->frame_index);
 138 }
 139
 140 #include "ehci-dbg.c"
 141
 142 /*-------------------------------------------------------------------------*/
 143
 144 /*
 145  * ehci_handshake - spin reading hc until handshake completes or fails
 146  * @ptr: address of hc register to be read
 147  * @mask: bits to look at in result of read
 148  * @done: value of those bits when handshake succeeds
 149  * @usec: timeout in microseconds
 150  *
 151  * Returns negative errno, or zero on success
 152  *
 153  * Success happens when the "mask" bits have the specified value (hardware
 154  * handshake done).  There are two failure modes:  "usec" have passed (major
 155  * hardware flakeout), or the register reads as all-ones (hardware removed).
 156  *
 157  * That last failure should_only happen in cases like physical cardbus eject
 158  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 159  * bridge shutdown:  shutting down the bridge before the devices using it.
 160  */
 161 int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
 162                    u32 mask, u32 done, int usec)
 163 {
 164         u32     result;
 165
 166         do {
 167                 result = ehci_readl(ehci, ptr);
 168                 if (result == ~(u32)0)          /* card removed */
 169                         return -ENODEV;
 170                 result &= mask;
 171                 if (result == done)
 172                         return 0;
 173                 udelay (1);
 174                 usec--;
 175         } while (usec > 0);
 176         return -ETIMEDOUT;
 177 }
 178 EXPORT_SYMBOL_GPL(ehci_handshake);
 179
 180 /* check TDI/ARC silicon is in host mode */
 181 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 182 {
 183         u32             tmp;
 184
 185         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 186         return (tmp & 3) == USBMODE_CM_HC;
 187 }
 188
 189 /*
 190  * Force HC to halt state from unknown (EHCI spec section 2.3).
 191  * Must be called with interrupts enabled and the lock not held.
 192  */
 193 static int ehci_halt (struct ehci_hcd *ehci)
 194 {
 195         u32     temp;
 196
 197         spin_lock_irq(&ehci->lock);
 198
 199         /* disable any irqs left enabled by previous code */
 200         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 201
 202         if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
 203                 spin_unlock_irq(&ehci->lock);
 204                 return 0;
 205         }
 206
 207         /*
 208          * This routine gets called during probe before ehci->command
 209          * has been initialized, so we can't rely on its value.
 210          */
 211         ehci->command &= ~CMD_RUN;
 212         temp = ehci_readl(ehci, &ehci->regs->command);
 213         temp &= ~(CMD_RUN | CMD_IAAD);
 214         ehci_writel(ehci, temp, &ehci->regs->command);
 215
 216         spin_unlock_irq(&ehci->lock);
 217         synchronize_irq(ehci_to_hcd(ehci)->irq);
 218
 219         return ehci_handshake(ehci, &ehci->regs->status,
 220                           STS_HALT, STS_HALT, 16 * 125);
 221 }
 222
 223 /* put TDI/ARC silicon into EHCI mode */
 224 static void tdi_reset (struct ehci_hcd *ehci)
 225 {
 226         u32             tmp;
 227
 228         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 229         tmp |= USBMODE_CM_HC;
 230         /* The default byte access to MMR space is LE after
 231          * controller reset. Set the required endian mode
 232          * for transfer buffers to match the host microprocessor
 233          */
 234         if (ehci_big_endian_mmio(ehci))
 235                 tmp |= USBMODE_BE;
 236         ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 237 }
 238
 239 /*
 240  * Reset a non-running (STS_HALT == 1) controller.
 241  * Must be called with interrupts enabled and the lock not held.
 242  */
 243 int ehci_reset(struct ehci_hcd *ehci)
 244 {
 245         int     retval;
 246         u32     command = ehci_readl(ehci, &ehci->regs->command);
 247
 248         /* If the EHCI debug controller is active, special care must be
 249          * taken before and after a host controller reset */
 250         if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
 251                 ehci->debug = NULL;
 252
 253         command |= CMD_RESET;
 254         dbg_cmd (ehci, "reset", command);
 255         ehci_writel(ehci, command, &ehci->regs->command);
 256         ehci->rh_state = EHCI_RH_HALTED;
 257         ehci->next_statechange = jiffies;
 258         retval = ehci_handshake(ehci, &ehci->regs->command,
 259                             CMD_RESET, 0, 250 * 1000);
 260
 261         if (ehci->has_hostpc) {
 262                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 263                                 &ehci->regs->usbmode_ex);
 264                 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
 265         }
 266         if (retval)
 267                 return retval;
 268
 269         if (ehci_is_TDI(ehci))
 270                 tdi_reset (ehci);
 271
 272         if (ehci->debug)
 273                 dbgp_external_startup(ehci_to_hcd(ehci));
 274
 275         ehci->port_c_suspend = ehci->suspended_ports =
 276                         ehci->resuming_ports = 0;
 277         return retval;
 278 }
 279 EXPORT_SYMBOL_GPL(ehci_reset);
 280
 281 /*
 282  * Idle the controller (turn off the schedules).
 283  * Must be called with interrupts enabled and the lock not held.
 284  */
 285 static void ehci_quiesce (struct ehci_hcd *ehci)
 286 {
 287         u32     temp;
 288
 289         if (ehci->rh_state != EHCI_RH_RUNNING)
 290                 return;
 291
 292         /* wait for any schedule enables/disables to take effect */
 293         temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
 294         ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
 295                         16 * 125);
 296
 297         /* then disable anything that's still active */
 298         spin_lock_irq(&ehci->lock);
 299         ehci->command &= ~(CMD_ASE | CMD_PSE);
 300         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 301         spin_unlock_irq(&ehci->lock);
 302
 303         /* hardware can take 16 microframes to turn off ... */
 304         ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
 305                         16 * 125);
 306 }
 307
 308 /*-------------------------------------------------------------------------*/
 309
 310 static void end_unlink_async(struct ehci_hcd *ehci);
 311 static void unlink_empty_async(struct ehci_hcd *ehci);
 312 static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
 313 static void ehci_work(struct ehci_hcd *ehci);
 314 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 315 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 316 static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable);
 317
 318 #include "ehci-timer.c"
 319 #include "ehci-hub.c"
 320 #include "ehci-mem.c"
 321 #include "ehci-q.c"
 322 #include "ehci-sched.c"
 323 #include "ehci-sysfs.c"
 324
 325 /*-------------------------------------------------------------------------*/
 326
 327 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 328  * The firmware seems to think that powering off is a wakeup event!
 329  * This routine turns off remote wakeup and everything else, on all ports.
 330  */
 331 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 332 {
 333         int     port = HCS_N_PORTS(ehci->hcs_params);
 334
 335         while (port--) {
 336                 spin_unlock_irq(&ehci->lock);
 337                 ehci_port_power(ehci, port, false);
 338                 spin_lock_irq(&ehci->lock);
 339                 ehci_writel(ehci, PORT_RWC_BITS,
 340                                 &ehci->regs->port_status[port]);
 341         }
 342 }
 343
 344 /*
 345  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 346  * Must be called with interrupts enabled and the lock not held.
 347  */
 348 static void ehci_silence_controller(struct ehci_hcd *ehci)
 349 {
 350         ehci_halt(ehci);
 351
 352         spin_lock_irq(&ehci->lock);
 353         ehci->rh_state = EHCI_RH_HALTED;
 354         ehci_turn_off_all_ports(ehci);
 355
 356         /* make BIOS/etc use companion controller during reboot */
 357         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 358
 359         /* unblock posted writes */
 360         ehci_readl(ehci, &ehci->regs->configured_flag);
 361         spin_unlock_irq(&ehci->lock);
 362 }
 363
 364 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 365  * This forcibly disables dma and IRQs, helping kexec and other cases
 366  * where the next system software may expect clean state.
 367  */
 368 static void ehci_shutdown(struct usb_hcd *hcd)
 369 {
 370         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 371
 372         spin_lock_irq(&ehci->lock);
 373         ehci->shutdown = true;
 374         ehci->rh_state = EHCI_RH_STOPPING;
 375         ehci->enabled_hrtimer_events = 0;
 376         spin_unlock_irq(&ehci->lock);
 377
 378         ehci_silence_controller(ehci);
 379
 380         hrtimer_cancel(&ehci->hrtimer);
 381 }
 382
 383 /*-------------------------------------------------------------------------*/
 384
 385 /*
 386  * ehci_work is called from some interrupts, timers, and so on.
 387  * it calls driver completion functions, after dropping ehci->lock.
 388  */
 389 static void ehci_work (struct ehci_hcd *ehci)
 390 {
 391         /* another CPU may drop ehci->lock during a schedule scan while
 392          * it reports urb completions.  this flag guards against bogus
 393          * attempts at re-entrant schedule scanning.
 394          */
 395         if (ehci->scanning) {
 396                 ehci->need_rescan = true;
 397                 return;
 398         }
 399         ehci->scanning = true;
 400
 401  rescan:
 402         ehci->need_rescan = false;
 403         if (ehci->async_count)
 404                 scan_async(ehci);
 405         if (ehci->intr_count > 0)
 406                 scan_intr(ehci);
 407         if (ehci->isoc_count > 0)
 408                 scan_isoc(ehci);
 409         if (ehci->need_rescan)
 410                 goto rescan;
 411         ehci->scanning = false;
 412
 413         /* the IO watchdog guards against hardware or driver bugs that
 414          * misplace IRQs, and should let us run completely without IRQs.
 415          * such lossage has been observed on both VT6202 and VT8235.
 416          */
 417         turn_on_io_watchdog(ehci);
 418 }
 419
 420 /*
 421  * Called when the ehci_hcd module is removed.
 422  */
 423 static void ehci_stop (struct usb_hcd *hcd)
 424 {
 425         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 426
 427         ehci_dbg (ehci, "stop\n");
 428
 429         /* no more interrupts ... */
 430
 431         spin_lock_irq(&ehci->lock);
 432         ehci->enabled_hrtimer_events = 0;
 433         spin_unlock_irq(&ehci->lock);
 434
 435         ehci_quiesce(ehci);
 436         ehci_silence_controller(ehci);
 437         ehci_reset (ehci);
 438
 439         hrtimer_cancel(&ehci->hrtimer);
 440         remove_sysfs_files(ehci);
 441         remove_debug_files (ehci);
 442
 443         /* root hub is shut down separately (first, when possible) */
 444         spin_lock_irq (&ehci->lock);
 445         end_free_itds(ehci);
 446         spin_unlock_irq (&ehci->lock);
 447         ehci_mem_cleanup (ehci);
 448
 449         if (ehci->amd_pll_fix == 1)
 450                 usb_amd_dev_put();
 451
 452         dbg_status (ehci, "ehci_stop completed",
 453                     ehci_readl(ehci, &ehci->regs->status));
 454 }
 455
 456 /* one-time init, only for memory state */
 457 static int ehci_init(struct usb_hcd *hcd)
 458 {
 459         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 460         u32                     temp;
 461         int                     retval;
 462         u32                     hcc_params;
 463         struct ehci_qh_hw       *hw;
 464
 465         spin_lock_init(&ehci->lock);
 466
 467         /*
 468          * keep io watchdog by default, those good HCDs could turn off it later
 469          */
 470         ehci->need_io_watchdog = 1;
 471
 472         hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 473         ehci->hrtimer.function = ehci_hrtimer_func;
 474         ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
 475
 476         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 477
 478         /*
 479          * by default set standard 80% (== 100 usec/uframe) max periodic
 480          * bandwidth as required by USB 2.0
 481          */
 482         ehci->uframe_periodic_max = 100;
 483
 484         /*
 485          * hw default: 1K periodic list heads, one per frame.
 486          * periodic_size can shrink by USBCMD update if hcc_params allows.
 487          */
 488         ehci->periodic_size = DEFAULT_I_TDPS;
 489         INIT_LIST_HEAD(&ehci->async_unlink);
 490         INIT_LIST_HEAD(&ehci->async_idle);
 491         INIT_LIST_HEAD(&ehci->intr_unlink_wait);
 492         INIT_LIST_HEAD(&ehci->intr_unlink);
 493         INIT_LIST_HEAD(&ehci->intr_qh_list);
 494         INIT_LIST_HEAD(&ehci->cached_itd_list);
 495         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 496         INIT_LIST_HEAD(&ehci->tt_list);
 497
 498         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 499                 /* periodic schedule size can be smaller than default */
 500                 switch (EHCI_TUNE_FLS) {
 501                 case 0: ehci->periodic_size = 1024; break;
 502                 case 1: ehci->periodic_size = 512; break;
 503                 case 2: ehci->periodic_size = 256; break;
 504                 default:        BUG();
 505                 }
 506         }
 507         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 508                 return retval;
 509
 510         /* controllers may cache some of the periodic schedule ... */
 511         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 512                 ehci->i_thresh = 0;
 513         else                                    // N microframes cached
 514                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 515
 516         /*
 517          * dedicate a qh for the async ring head, since we couldn't unlink
 518          * a 'real' qh without stopping the async schedule [4.8].  use it
 519          * as the 'reclamation list head' too.
 520          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 521          * from automatically advancing to the next td after short reads.
 522          */
 523         ehci->async->qh_next.qh = NULL;
 524         hw = ehci->async->hw;
 525         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 526         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 527 #if defined(CONFIG_PPC_PS3)
 528         hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
 529 #endif
 530         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 531         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 532         ehci->async->qh_state = QH_STATE_LINKED;
 533         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 534
 535         /* clear interrupt enables, set irq latency */
 536         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 537                 log2_irq_thresh = 0;
 538         temp = 1 << (16 + log2_irq_thresh);
 539         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 540                 ehci->has_ppcd = 1;
 541                 ehci_dbg(ehci, "enable per-port change event\n");
 542                 temp |= CMD_PPCEE;
 543         }
 544         if (HCC_CANPARK(hcc_params)) {
 545                 /* HW default park == 3, on hardware that supports it (like
 546                  * NVidia and ALI silicon), maximizes throughput on the async
 547                  * schedule by avoiding QH fetches between transfers.
 548                  *
 549                  * With fast usb storage devices and NForce2, "park" seems to
 550                  * make problems:  throughput reduction (!), data errors...
 551                  */
 552                 if (park) {
 553                         park = min(park, (unsigned) 3);
 554                         temp |= CMD_PARK;
 555                         temp |= park << 8;
 556                 }
 557                 ehci_dbg(ehci, "park %d\n", park);
 558         }
 559         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 560                 /* periodic schedule size can be smaller than default */
 561                 temp &= ~(3 << 2);
 562                 temp |= (EHCI_TUNE_FLS << 2);
 563         }
 564         ehci->command = temp;
 565
 566         /* Accept arbitrarily long scatter-gather lists */
 567         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 568                 hcd->self.sg_tablesize = ~0;
 569         return 0;
 570 }
 571
 572 /* start HC running; it's halted, ehci_init() has been run (once) */
 573 static int ehci_run (struct usb_hcd *hcd)
 574 {
 575         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 576         u32                     temp;
 577         u32                     hcc_params;
 578         int                     rc;
 579
 580         hcd->uses_new_polling = 1;
 581
 582         /* EHCI spec section 4.1 */
 583
 584         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 585         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 586
 587         /*
 588          * hcc_params controls whether ehci->regs->segment must (!!!)
 589          * be used; it constrains QH/ITD/SITD and QTD locations.
 590          * pci_pool consistent memory always uses segment zero.
 591          * streaming mappings for I/O buffers, like pci_map_single(),
 592          * can return segments above 4GB, if the device allows.
 593          *
 594          * NOTE:  the dma mask is visible through dev->dma_mask, so
 595          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 596          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 597          * host side drivers though.
 598          */
 599         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 600         if (HCC_64BIT_ADDR(hcc_params)) {
 601                 ehci_writel(ehci, 0, &ehci->regs->segment);
 602 #if 0
 603 // this is deeply broken on almost all architectures
 604                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 605                         ehci_info(ehci, "enabled 64bit DMA\n");
 606 #endif
 607         }
 608
 609
 610         // Philips, Intel, and maybe others need CMD_RUN before the
 611         // root hub will detect new devices (why?); NEC doesn't
 612         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 613         ehci->command |= CMD_RUN;
 614         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 615         dbg_cmd (ehci, "init", ehci->command);
 616
 617         /*
 618          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 619          * are explicitly handed to companion controller(s), so no TT is
 620          * involved with the root hub.  (Except where one is integrated,
 621          * and there's no companion controller unless maybe for USB OTG.)
 622          *
 623          * Turning on the CF flag will transfer ownership of all ports
 624          * from the companions to the EHCI controller.  If any of the
 625          * companions are in the middle of a port reset at the time, it
 626          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 627          * guarantees that no resets are in progress.  After we set CF,
 628          * a short delay lets the hardware catch up; new resets shouldn't
 629          * be started before the port switching actions could complete.
 630          */
 631         down_write(&ehci_cf_port_reset_rwsem);
 632         ehci->rh_state = EHCI_RH_RUNNING;
 633         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 634
 635         /* Wait until HC become operational */
 636         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 637         msleep(5);
 638         rc = ehci_handshake(ehci, &ehci->regs->status, STS_HALT, 0, 100 * 1000);
 639
 640         up_write(&ehci_cf_port_reset_rwsem);
 641
 642         if (rc) {
 643                 ehci_err(ehci, "USB %x.%x, controller refused to start: %d\n",
 644                          ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), rc);
 645                 return rc;
 646         }
 647
 648         ehci->last_periodic_enable = ktime_get_real();
 649
 650         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 651         ehci_info (ehci,
 652                 "USB %x.%x started, EHCI %x.%02x%s\n",
 653                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 654                 temp >> 8, temp & 0xff,
 655                 ignore_oc ? ", overcurrent ignored" : "");
 656
 657         ehci_writel(ehci, INTR_MASK,
 658                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 659
 660         /* GRR this is run-once init(), being done every time the HC starts.
 661          * So long as they're part of class devices, we can't do it init()
 662          * since the class device isn't created that early.
 663          */
 664         create_debug_files(ehci);
 665         create_sysfs_files(ehci);
 666
 667         return 0;
 668 }
 669
 670 int ehci_setup(struct usb_hcd *hcd)
 671 {
 672         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 673         int retval;
 674
 675         ehci->regs = (void __iomem *)ehci->caps +
 676             HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 677         dbg_hcs_params(ehci, "reset");
 678         dbg_hcc_params(ehci, "reset");
 679
 680         /* cache this readonly data; minimize chip reads */
 681         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 682
 683         ehci->sbrn = HCD_USB2;
 684
 685         /* data structure init */
 686         retval = ehci_init(hcd);
 687         if (retval)
 688                 return retval;
 689
 690         retval = ehci_halt(ehci);
 691         if (retval)
 692                 return retval;
 693
 694         ehci_reset(ehci);
 695
 696         return 0;
 697 }
 698 EXPORT_SYMBOL_GPL(ehci_setup);
 699
 700 /*-------------------------------------------------------------------------*/
 701
 702 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 703 {
 704         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 705         u32                     status, masked_status, pcd_status = 0, cmd;
 706         int                     bh;
 707         unsigned long           flags;
 708
 709         /*
 710          * For threadirqs option we use spin_lock_irqsave() variant to prevent
 711          * deadlock with ehci hrtimer callback, because hrtimer callbacks run
 712          * in interrupt context even when threadirqs is specified. We can go
 713          * back to spin_lock() variant when hrtimer callbacks become threaded.
 714          */
 715         spin_lock_irqsave(&ehci->lock, flags);
 716
 717         status = ehci_readl(ehci, &ehci->regs->status);
 718
 719         /* e.g. cardbus physical eject */
 720         if (status == ~(u32) 0) {
 721                 ehci_dbg (ehci, "device removed\n");
 722                 goto dead;
 723         }
 724
 725         /*
 726          * We don't use STS_FLR, but some controllers don't like it to
 727          * remain on, so mask it out along with the other status bits.
 728          */
 729         masked_status = status & (INTR_MASK | STS_FLR);
 730
 731         /* Shared IRQ? */
 732         if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 733                 spin_unlock_irqrestore(&ehci->lock, flags);
 734                 return IRQ_NONE;
 735         }
 736
 737         /* clear (just) interrupts */
 738         ehci_writel(ehci, masked_status, &ehci->regs->status);
 739         cmd = ehci_readl(ehci, &ehci->regs->command);
 740         bh = 0;
 741
 742         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 743         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 744                 if (likely ((status & STS_ERR) == 0))
 745                         COUNT (ehci->stats.normal);
 746                 else
 747                         COUNT (ehci->stats.error);
 748                 bh = 1;
 749         }
 750
 751         /* complete the unlinking of some qh [4.15.2.3] */
 752         if (status & STS_IAA) {
 753
 754                 /* Turn off the IAA watchdog */
 755                 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
 756
 757                 /*
 758                  * Mild optimization: Allow another IAAD to reset the
 759                  * hrtimer, if one occurs before the next expiration.
 760                  * In theory we could always cancel the hrtimer, but
 761                  * tests show that about half the time it will be reset
 762                  * for some other event anyway.
 763                  */
 764                 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
 765                         ++ehci->next_hrtimer_event;
 766
 767                 /* guard against (alleged) silicon errata */
 768                 if (cmd & CMD_IAAD)
 769                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 770                 if (ehci->iaa_in_progress)
 771                         COUNT(ehci->stats.iaa);
 772                 end_unlink_async(ehci);
 773         }
 774
 775         /* remote wakeup [4.3.1] */
 776         if (status & STS_PCD) {
 777                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 778                 u32             ppcd = ~0;
 779
 780                 /* kick root hub later */
 781                 pcd_status = status;
 782
 783                 /* resume root hub? */
 784                 if (ehci->rh_state == EHCI_RH_SUSPENDED)
 785                         usb_hcd_resume_root_hub(hcd);
 786
 787                 /* get per-port change detect bits */
 788                 if (ehci->has_ppcd)
 789                         ppcd = status >> 16;
 790
 791                 while (i--) {
 792                         int pstatus;
 793
 794                         /* leverage per-port change bits feature */
 795                         if (!(ppcd & (1 << i)))
 796                                 continue;
 797                         pstatus = ehci_readl(ehci,
 798                                          &ehci->regs->port_status[i]);
 799
 800                         if (pstatus & PORT_OWNER)
 801                                 continue;
 802                         if (!(test_bit(i, &ehci->suspended_ports) &&
 803                                         ((pstatus & PORT_RESUME) ||
 804                                                 !(pstatus & PORT_SUSPEND)) &&
 805                                         (pstatus & PORT_PE) &&
 806                                         ehci->reset_done[i] == 0))
 807                                 continue;
 808
 809                         /* start USB_RESUME_TIMEOUT msec resume signaling from
 810                          * this port, and make hub_wq collect
 811                          * PORT_STAT_C_SUSPEND to stop that signaling.
 812                          */
 813                         ehci->reset_done[i] = jiffies +
 814                                 msecs_to_jiffies(USB_RESUME_TIMEOUT);
 815                         set_bit(i, &ehci->resuming_ports);
 816                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 817                         usb_hcd_start_port_resume(&hcd->self, i);
 818                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 819                 }
 820         }
 821
 822         /* PCI errors [4.15.2.4] */
 823         if (unlikely ((status & STS_FATAL) != 0)) {
 824                 ehci_err(ehci, "fatal error\n");
 825                 dbg_cmd(ehci, "fatal", cmd);
 826                 dbg_status(ehci, "fatal", status);
 827 dead:
 828                 usb_hc_died(hcd);
 829
 830                 /* Don't let the controller do anything more */
 831                 ehci->shutdown = true;
 832                 ehci->rh_state = EHCI_RH_STOPPING;
 833                 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
 834                 ehci_writel(ehci, ehci->command, &ehci->regs->command);
 835                 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 836                 ehci_handle_controller_death(ehci);
 837
 838                 /* Handle completions when the controller stops */
 839                 bh = 0;
 840         }
 841
 842         if (bh)
 843                 ehci_work (ehci);
 844         spin_unlock_irqrestore(&ehci->lock, flags);
 845         if (pcd_status)
 846                 usb_hcd_poll_rh_status(hcd);
 847         return IRQ_HANDLED;
 848 }
 849
 850 /*-------------------------------------------------------------------------*/
 851
 852 /*
 853  * non-error returns are a promise to giveback() the urb later
 854  * we drop ownership so next owner (or urb unlink) can get it
 855  *
 856  * urb + dev is in hcd.self.controller.urb_list
 857  * we're queueing TDs onto software and hardware lists
 858  *
 859  * hcd-specific init for hcpriv hasn't been done yet
 860  *
 861  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 862  * to a (possibly active) QH, and the same QH scanning code.
 863  */
 864 static int ehci_urb_enqueue (
 865         struct usb_hcd  *hcd,
 866         struct urb      *urb,
 867         gfp_t           mem_flags
 868 ) {
 869         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 870         struct list_head        qtd_list;
 871
 872         INIT_LIST_HEAD (&qtd_list);
 873
 874         switch (usb_pipetype (urb->pipe)) {
 875         case PIPE_CONTROL:
 876                 /* qh_completions() code doesn't handle all the fault cases
 877                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 878                  */
 879                 if (urb->transfer_buffer_length > (16 * 1024))
 880                         return -EMSGSIZE;
 881                 /* FALLTHROUGH */
 882         /* case PIPE_BULK: */
 883         default:
 884                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 885                         return -ENOMEM;
 886                 return submit_async(ehci, urb, &qtd_list, mem_flags);
 887
 888         case PIPE_INTERRUPT:
 889                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 890                         return -ENOMEM;
 891                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
 892
 893         case PIPE_ISOCHRONOUS:
 894                 if (urb->dev->speed == USB_SPEED_HIGH)
 895                         return itd_submit (ehci, urb, mem_flags);
 896                 else
 897                         return sitd_submit (ehci, urb, mem_flags);
 898         }
 899 }
 900
 901 /* remove from hardware lists
 902  * completions normally happen asynchronously
 903  */
 904
 905 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 906 {
 907         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 908         struct ehci_qh          *qh;
 909         unsigned long           flags;
 910         int                     rc;
 911
 912         spin_lock_irqsave (&ehci->lock, flags);
 913         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 914         if (rc)
 915                 goto done;
 916
 917         if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
 918                 /*
 919                  * We don't expedite dequeue for isochronous URBs.
 920                  * Just wait until they complete normally or their
 921                  * time slot expires.
 922                  */
 923         } else {
 924                 qh = (struct ehci_qh *) urb->hcpriv;
 925                 qh->exception = 1;
 926                 switch (qh->qh_state) {
 927                 case QH_STATE_LINKED:
 928                         if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
 929                                 start_unlink_intr(ehci, qh);
 930                         else
 931                                 start_unlink_async(ehci, qh);
 932                         break;
 933                 case QH_STATE_COMPLETING:
 934                         qh->dequeue_during_giveback = 1;
 935                         break;
 936                 case QH_STATE_UNLINK:
 937                 case QH_STATE_UNLINK_WAIT:
 938                         /* already started */
 939                         break;
 940                 case QH_STATE_IDLE:
 941                         /* QH might be waiting for a Clear-TT-Buffer */
 942                         qh_completions(ehci, qh);
 943                         break;
 944                 }
 945         }
 946 done:
 947         spin_unlock_irqrestore (&ehci->lock, flags);
 948         return rc;
 949 }
 950
 951 /*-------------------------------------------------------------------------*/
 952
 953 // bulk qh holds the data toggle
 954
 955 static void
 956 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 957 {
 958         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 959         unsigned long           flags;
 960         struct ehci_qh          *qh;
 961
 962         /* ASSERT:  any requests/urbs are being unlinked */
 963         /* ASSERT:  nobody can be submitting urbs for this any more */
 964
 965 rescan:
 966         spin_lock_irqsave (&ehci->lock, flags);
 967         qh = ep->hcpriv;
 968         if (!qh)
 969                 goto done;
 970
 971         /* endpoints can be iso streams.  for now, we don't
 972          * accelerate iso completions ... so spin a while.
 973          */
 974         if (qh->hw == NULL) {
 975                 struct ehci_iso_stream  *stream = ep->hcpriv;
 976
 977                 if (!list_empty(&stream->td_list))
 978                         goto idle_timeout;
 979
 980                 /* BUG_ON(!list_empty(&stream->free_list)); */
 981                 reserve_release_iso_bandwidth(ehci, stream, -1);
 982                 kfree(stream);
 983                 goto done;
 984         }
 985
 986         qh->exception = 1;
 987         switch (qh->qh_state) {
 988         case QH_STATE_LINKED:
 989                 WARN_ON(!list_empty(&qh->qtd_list));
 990                 if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT)
 991                         start_unlink_async(ehci, qh);
 992                 else
 993                         start_unlink_intr(ehci, qh);
 994                 /* FALL THROUGH */
 995         case QH_STATE_COMPLETING:       /* already in unlinking */
 996         case QH_STATE_UNLINK:           /* wait for hw to finish? */
 997         case QH_STATE_UNLINK_WAIT:
 998 idle_timeout:
 999                 spin_unlock_irqrestore (&ehci->lock, flags);
1000                 schedule_timeout_uninterruptible(1);
1001                 goto rescan;
1002         case QH_STATE_IDLE:             /* fully unlinked */
1003                 if (qh->clearing_tt)
1004                         goto idle_timeout;
1005                 if (list_empty (&qh->qtd_list)) {
1006                         if (qh->ps.bw_uperiod)
1007                                 reserve_release_intr_bandwidth(ehci, qh, -1);
1008                         qh_destroy(ehci, qh);
1009                         break;
1010                 }
1011                 /* else FALL THROUGH */
1012         default:
1013                 /* caller was supposed to have unlinked any requests;
1014                  * that's not our job.  just leak this memory.
1015                  */
1016                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1017                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1018                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1019                 break;
1020         }
1021  done:
1022         ep->hcpriv = NULL;
1023         spin_unlock_irqrestore (&ehci->lock, flags);
1024 }
1025
1026 static void
1027 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1028 {
1029         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1030         struct ehci_qh          *qh;
1031         int                     eptype = usb_endpoint_type(&ep->desc);
1032         int                     epnum = usb_endpoint_num(&ep->desc);
1033         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1034         unsigned long           flags;
1035
1036         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1037                 return;
1038
1039         spin_lock_irqsave(&ehci->lock, flags);
1040         qh = ep->hcpriv;
1041
1042         /* For Bulk and Interrupt endpoints we maintain the toggle state
1043          * in the hardware; the toggle bits in udev aren't used at all.
1044          * When an endpoint is reset by usb_clear_halt() we must reset
1045          * the toggle bit in the QH.
1046          */
1047         if (qh) {
1048                 if (!list_empty(&qh->qtd_list)) {
1049                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1050                 } else {
1051                         /* The toggle value in the QH can't be updated
1052                          * while the QH is active.  Unlink it now;
1053                          * re-linking will call qh_refresh().
1054                          */
1055                         usb_settoggle(qh->ps.udev, epnum, is_out, 0);
1056                         qh->exception = 1;
1057                         if (eptype == USB_ENDPOINT_XFER_BULK)
1058                                 start_unlink_async(ehci, qh);
1059                         else
1060                                 start_unlink_intr(ehci, qh);
1061                 }
1062         }
1063         spin_unlock_irqrestore(&ehci->lock, flags);
1064 }
1065
1066 static int ehci_get_frame (struct usb_hcd *hcd)
1067 {
1068         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1069         return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1070 }
1071
1072 /*-------------------------------------------------------------------------*/
1073
1074 /* Device addition and removal */
1075
1076 static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev)
1077 {
1078         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1079
1080         spin_lock_irq(&ehci->lock);
1081         drop_tt(udev);
1082         spin_unlock_irq(&ehci->lock);
1083 }
1084
1085 /*-------------------------------------------------------------------------*/
1086
1087 #ifdef  CONFIG_PM
1088
1089 /* suspend/resume, section 4.3 */
1090
1091 /* These routines handle the generic parts of controller suspend/resume */
1092
1093 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1094 {
1095         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1096
1097         if (time_before(jiffies, ehci->next_statechange))
1098                 msleep(10);
1099
1100         /*
1101          * Root hub was already suspended.  Disable IRQ emission and
1102          * mark HW unaccessible.  The PM and USB cores make sure that
1103          * the root hub is either suspended or stopped.
1104          */
1105         ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1106
1107         spin_lock_irq(&ehci->lock);
1108         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1109         (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1110
1111         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1112         spin_unlock_irq(&ehci->lock);
1113
1114         synchronize_irq(hcd->irq);
1115
1116         /* Check for race with a wakeup request */
1117         if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1118                 ehci_resume(hcd, false);
1119                 return -EBUSY;
1120         }
1121
1122         return 0;
1123 }
1124 EXPORT_SYMBOL_GPL(ehci_suspend);
1125
1126 /* Returns 0 if power was preserved, 1 if power was lost */
1127 int ehci_resume(struct usb_hcd *hcd, bool force_reset)
1128 {
1129         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1130
1131         if (time_before(jiffies, ehci->next_statechange))
1132                 msleep(100);
1133
1134         /* Mark hardware accessible again as we are back to full power by now */
1135         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1136
1137         if (ehci->shutdown)
1138                 return 0;               /* Controller is dead */
1139
1140         /*
1141          * If CF is still set and reset isn't forced
1142          * then we maintained suspend power.
1143          * Just undo the effect of ehci_suspend().
1144          */
1145         if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1146                         !force_reset) {
1147                 int     mask = INTR_MASK;
1148
1149                 ehci_prepare_ports_for_controller_resume(ehci);
1150
1151                 spin_lock_irq(&ehci->lock);
1152                 if (ehci->shutdown)
1153                         goto skip;
1154
1155                 if (!hcd->self.root_hub->do_remote_wakeup)
1156                         mask &= ~STS_PCD;
1157                 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1158                 ehci_readl(ehci, &ehci->regs->intr_enable);
1159  skip:
1160                 spin_unlock_irq(&ehci->lock);
1161                 return 0;
1162         }
1163
1164         /*
1165          * Else reset, to cope with power loss or resume from hibernation
1166          * having let the firmware kick in during reboot.
1167          */
1168         usb_root_hub_lost_power(hcd->self.root_hub);
1169         (void) ehci_halt(ehci);
1170         (void) ehci_reset(ehci);
1171
1172         spin_lock_irq(&ehci->lock);
1173         if (ehci->shutdown)
1174                 goto skip;
1175
1176         ehci_writel(ehci, ehci->command, &ehci->regs->command);
1177         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1178         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1179
1180         ehci->rh_state = EHCI_RH_SUSPENDED;
1181         spin_unlock_irq(&ehci->lock);
1182
1183         return 1;
1184 }
1185 EXPORT_SYMBOL_GPL(ehci_resume);
1186
1187 #endif
1188
1189 /*-------------------------------------------------------------------------*/
1190
1191 /*
1192  * Generic structure: This gets copied for platform drivers so that
1193  * individual entries can be overridden as needed.
1194  */
1195
1196 static const struct hc_driver ehci_hc_driver = {
1197         .description =          hcd_name,
1198         .product_desc =         "EHCI Host Controller",
1199         .hcd_priv_size =        sizeof(struct ehci_hcd),
1200
1201         /*
1202          * generic hardware linkage
1203          */
1204         .irq =                  ehci_irq,
1205         .flags =                HCD_MEMORY | HCD_USB2 | HCD_BH,
1206
1207         /*
1208          * basic lifecycle operations
1209          */
1210         .reset =                ehci_setup,
1211         .start =                ehci_run,
1212         .stop =                 ehci_stop,
1213         .shutdown =             ehci_shutdown,
1214
1215         /*
1216          * managing i/o requests and associated device resources
1217          */
1218         .urb_enqueue =          ehci_urb_enqueue,
1219         .urb_dequeue =          ehci_urb_dequeue,
1220         .endpoint_disable =     ehci_endpoint_disable,
1221         .endpoint_reset =       ehci_endpoint_reset,
1222         .clear_tt_buffer_complete =     ehci_clear_tt_buffer_complete,
1223
1224         /*
1225          * scheduling support
1226          */
1227         .get_frame_number =     ehci_get_frame,
1228
1229         /*
1230          * root hub support
1231          */
1232         .hub_status_data =      ehci_hub_status_data,
1233         .hub_control =          ehci_hub_control,
1234         .bus_suspend =          ehci_bus_suspend,
1235         .bus_resume =           ehci_bus_resume,
1236         .relinquish_port =      ehci_relinquish_port,
1237         .port_handed_over =     ehci_port_handed_over,
1238
1239         /*
1240          * device support
1241          */
1242         .free_dev =             ehci_remove_device,
1243 };
1244
1245 void ehci_init_driver(struct hc_driver *drv,
1246                 const struct ehci_driver_overrides *over)
1247 {
1248         /* Copy the generic table to drv and then apply the overrides */
1249         *drv = ehci_hc_driver;
1250
1251         if (over) {
1252                 drv->hcd_priv_size += over->extra_priv_size;
1253                 if (over->reset)
1254                         drv->reset = over->reset;
1255                 if (over->port_power)
1256                         drv->port_power = over->port_power;
1257         }
1258 }
1259 EXPORT_SYMBOL_GPL(ehci_init_driver);
1260
1261 /*-------------------------------------------------------------------------*/
1262
1263 MODULE_DESCRIPTION(DRIVER_DESC);
1264 MODULE_AUTHOR (DRIVER_AUTHOR);
1265 MODULE_LICENSE ("GPL");
1266
1267 #ifdef CONFIG_USB_EHCI_SH
1268 #include "ehci-sh.c"
1269 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1270 #endif
1271
1272 #ifdef CONFIG_PPC_PS3
1273 #include "ehci-ps3.c"
1274 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1275 #endif
1276
1277 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1278 #include "ehci-ppc-of.c"
1279 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1280 #endif
1281
1282 #ifdef CONFIG_XPS_USB_HCD_XILINX
1283 #include "ehci-xilinx-of.c"
1284 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1285 #endif
1286
1287 #ifdef CONFIG_TILE_USB
1288 #include "ehci-tilegx.c"
1289 #define PLATFORM_DRIVER         ehci_hcd_tilegx_driver
1290 #endif
1291
1292 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1293 #include "ehci-pmcmsp.c"
1294 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1295 #endif
1296
1297 #ifdef CONFIG_SPARC_LEON
1298 #include "ehci-grlib.c"
1299 #define PLATFORM_DRIVER         ehci_grlib_driver
1300 #endif
1301
1302 #ifdef CONFIG_USB_EHCI_MV
1303 #include "ehci-mv.c"
1304 #define        PLATFORM_DRIVER         ehci_mv_driver
1305 #endif
1306
1307 #ifdef CONFIG_MIPS_SEAD3
1308 #include "ehci-sead3.c"
1309 #define PLATFORM_DRIVER         ehci_hcd_sead3_driver
1310 #endif
1311
1312 static int __init ehci_hcd_init(void)
1313 {
1314         int retval = 0;
1315
1316         if (usb_disabled())
1317                 return -ENODEV;
1318
1319         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1320         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1321         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1322                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1323                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1324                                 " before uhci_hcd and ohci_hcd, not after\n");
1325
1326         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1327                  hcd_name,
1328                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1329                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1330
1331 #ifdef CONFIG_DYNAMIC_DEBUG
1332         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1333         if (!ehci_debug_root) {
1334                 retval = -ENOENT;
1335                 goto err_debug;
1336         }
1337 #endif
1338
1339 #ifdef PLATFORM_DRIVER
1340         retval = platform_driver_register(&PLATFORM_DRIVER);
1341         if (retval < 0)
1342                 goto clean0;
1343 #endif
1344
1345 #ifdef PS3_SYSTEM_BUS_DRIVER
1346         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1347         if (retval < 0)
1348                 goto clean2;
1349 #endif
1350
1351 #ifdef OF_PLATFORM_DRIVER
1352         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1353         if (retval < 0)
1354                 goto clean3;
1355 #endif
1356
1357 #ifdef XILINX_OF_PLATFORM_DRIVER
1358         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1359         if (retval < 0)
1360                 goto clean4;
1361 #endif
1362         return retval;
1363
1364 #ifdef XILINX_OF_PLATFORM_DRIVER
1365         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1366 clean4:
1367 #endif
1368 #ifdef OF_PLATFORM_DRIVER
1369         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1370 clean3:
1371 #endif
1372 #ifdef PS3_SYSTEM_BUS_DRIVER
1373         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1374 clean2:
1375 #endif
1376 #ifdef PLATFORM_DRIVER
1377         platform_driver_unregister(&PLATFORM_DRIVER);
1378 clean0:
1379 #endif
1380 #ifdef CONFIG_DYNAMIC_DEBUG
1381         debugfs_remove(ehci_debug_root);
1382         ehci_debug_root = NULL;
1383 err_debug:
1384 #endif
1385         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1386         return retval;
1387 }
1388 module_init(ehci_hcd_init);
1389
1390 static void __exit ehci_hcd_cleanup(void)
1391 {
1392 #ifdef XILINX_OF_PLATFORM_DRIVER
1393         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1394 #endif
1395 #ifdef OF_PLATFORM_DRIVER
1396         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1397 #endif
1398 #ifdef PLATFORM_DRIVER
1399         platform_driver_unregister(&PLATFORM_DRIVER);
1400 #endif
1401 #ifdef PS3_SYSTEM_BUS_DRIVER
1402         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1403 #endif
1404 #ifdef CONFIG_DYNAMIC_DEBUG
1405         debugfs_remove(ehci_debug_root);
1406 #endif
1407         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1408 }
1409 module_exit(ehci_hcd_cleanup);