drivers/usb/host/xhci-rcar.c

   1 /*
   2  * xHCI host controller driver for R-Car SoCs
   3  *
   4  * Copyright (C) 2014 Renesas Electronics Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * version 2 as published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/firmware.h>
  12 #include <linux/module.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/of.h>
  15 #include <linux/usb/phy.h>
  16
  17 #include "xhci.h"
  18 #include "xhci-plat.h"
  19 #include "xhci-rcar.h"
  20
  21 /*
  22 * - The V2 firmware is possible to use on R-Car Gen2. However, the V2 causes
  23 *   performance degradation. So, this driver continues to use the V1 if R-Car
  24 *   Gen2.
  25 * - The V1 firmware is impossible to use on R-Car Gen3.
  26 */
  27 /*(DEBLOBBED)*/
  28
  29 /*** Register Offset ***/
  30 #define RCAR_USB3_INT_ENA       0x224   /* Interrupt Enable */
  31 #define RCAR_USB3_DL_CTRL       0x250   /* FW Download Control & Status */
  32 #define RCAR_USB3_FW_DATA0      0x258   /* FW Data0 */
  33
  34 #define RCAR_USB3_LCLK          0xa44   /* LCLK Select */
  35 #define RCAR_USB3_CONF1         0xa48   /* USB3.0 Configuration1 */
  36 #define RCAR_USB3_CONF2         0xa5c   /* USB3.0 Configuration2 */
  37 #define RCAR_USB3_CONF3         0xaa8   /* USB3.0 Configuration3 */
  38 #define RCAR_USB3_RX_POL        0xab0   /* USB3.0 RX Polarity */
  39 #define RCAR_USB3_TX_POL        0xab8   /* USB3.0 TX Polarity */
  40
  41 /*** Register Settings ***/
  42 /* Interrupt Enable */
  43 #define RCAR_USB3_INT_XHC_ENA   0x00000001
  44 #define RCAR_USB3_INT_PME_ENA   0x00000002
  45 #define RCAR_USB3_INT_HSE_ENA   0x00000004
  46 #define RCAR_USB3_INT_ENA_VAL   (RCAR_USB3_INT_XHC_ENA | \
  47                                 RCAR_USB3_INT_PME_ENA | RCAR_USB3_INT_HSE_ENA)
  48
  49 /* FW Download Control & Status */
  50 #define RCAR_USB3_DL_CTRL_ENABLE        0x00000001
  51 #define RCAR_USB3_DL_CTRL_FW_SUCCESS    0x00000010
  52 #define RCAR_USB3_DL_CTRL_FW_SET_DATA0  0x00000100
  53
  54 /* LCLK Select */
  55 #define RCAR_USB3_LCLK_ENA_VAL  0x01030001
  56
  57 /* USB3.0 Configuration */
  58 #define RCAR_USB3_CONF1_VAL     0x00030204
  59 #define RCAR_USB3_CONF2_VAL     0x00030300
  60 #define RCAR_USB3_CONF3_VAL     0x13802007
  61
  62 /* USB3.0 Polarity */
  63 #define RCAR_USB3_RX_POL_VAL    BIT(21)
  64 #define RCAR_USB3_TX_POL_VAL    BIT(4)
  65
  66 static void xhci_rcar_start_gen2(struct usb_hcd *hcd)
  67 {
  68         /* LCLK Select */
  69         writel(RCAR_USB3_LCLK_ENA_VAL, hcd->regs + RCAR_USB3_LCLK);
  70         /* USB3.0 Configuration */
  71         writel(RCAR_USB3_CONF1_VAL, hcd->regs + RCAR_USB3_CONF1);
  72         writel(RCAR_USB3_CONF2_VAL, hcd->regs + RCAR_USB3_CONF2);
  73         writel(RCAR_USB3_CONF3_VAL, hcd->regs + RCAR_USB3_CONF3);
  74         /* USB3.0 Polarity */
  75         writel(RCAR_USB3_RX_POL_VAL, hcd->regs + RCAR_USB3_RX_POL);
  76         writel(RCAR_USB3_TX_POL_VAL, hcd->regs + RCAR_USB3_TX_POL);
  77 }
  78
  79 static int xhci_rcar_is_gen2(struct device *dev)
  80 {
  81         struct device_node *node = dev->of_node;
  82
  83         return of_device_is_compatible(node, "renesas,xhci-r8a7790") ||
  84                 of_device_is_compatible(node, "renesas,xhci-r8a7791") ||
  85                 of_device_is_compatible(node, "renesas,xhci-r8a7793") ||
  86                 of_device_is_compatible(node, "renensas,rcar-gen2-xhci");
  87 }
  88
  89 static int xhci_rcar_is_gen3(struct device *dev)
  90 {
  91         struct device_node *node = dev->of_node;
  92
  93         return of_device_is_compatible(node, "renesas,xhci-r8a7795") ||
  94                 of_device_is_compatible(node, "renesas,rcar-gen3-xhci");
  95 }
  96
  97 void xhci_rcar_start(struct usb_hcd *hcd)
  98 {
  99         u32 temp;
 100
 101         if (hcd->regs != NULL) {
 102                 /* Interrupt Enable */
 103                 temp = readl(hcd->regs + RCAR_USB3_INT_ENA);
 104                 temp |= RCAR_USB3_INT_ENA_VAL;
 105                 writel(temp, hcd->regs + RCAR_USB3_INT_ENA);
 106                 if (xhci_rcar_is_gen2(hcd->self.controller))
 107                         xhci_rcar_start_gen2(hcd);
 108         }
 109 }
 110
 111 static int xhci_rcar_download_firmware(struct usb_hcd *hcd)
 112 {
 113         struct device *dev = hcd->self.controller;
 114         void __iomem *regs = hcd->regs;
 115         struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
 116         const struct firmware *fw;
 117         int retval, index, j, time;
 118         int timeout = 10000;
 119         u32 data, val, temp;
 120
 121         /* request R-Car USB3.0 firmware */
 122         retval = reject_firmware(&fw, priv->firmware_name, dev);
 123         if (retval)
 124                 return retval;
 125
 126         /* download R-Car USB3.0 firmware */
 127         temp = readl(regs + RCAR_USB3_DL_CTRL);
 128         temp |= RCAR_USB3_DL_CTRL_ENABLE;
 129         writel(temp, regs + RCAR_USB3_DL_CTRL);
 130
 131         for (index = 0; index < fw->size; index += 4) {
 132                 /* to avoid reading beyond the end of the buffer */
 133                 for (data = 0, j = 3; j >= 0; j--) {
 134                         if ((j + index) < fw->size)
 135                                 data |= fw->data[index + j] << (8 * j);
 136                 }
 137                 writel(data, regs + RCAR_USB3_FW_DATA0);
 138                 temp = readl(regs + RCAR_USB3_DL_CTRL);
 139                 temp |= RCAR_USB3_DL_CTRL_FW_SET_DATA0;
 140                 writel(temp, regs + RCAR_USB3_DL_CTRL);
 141
 142                 for (time = 0; time < timeout; time++) {
 143                         val = readl(regs + RCAR_USB3_DL_CTRL);
 144                         if ((val & RCAR_USB3_DL_CTRL_FW_SET_DATA0) == 0)
 145                                 break;
 146                         udelay(1);
 147                 }
 148                 if (time == timeout) {
 149                         retval = -ETIMEDOUT;
 150                         break;
 151                 }
 152         }
 153
 154         temp = readl(regs + RCAR_USB3_DL_CTRL);
 155         temp &= ~RCAR_USB3_DL_CTRL_ENABLE;
 156         writel(temp, regs + RCAR_USB3_DL_CTRL);
 157
 158         for (time = 0; time < timeout; time++) {
 159                 val = readl(regs + RCAR_USB3_DL_CTRL);
 160                 if (val & RCAR_USB3_DL_CTRL_FW_SUCCESS) {
 161                         retval = 0;
 162                         break;
 163                 }
 164                 udelay(1);
 165         }
 166         if (time == timeout)
 167                 retval = -ETIMEDOUT;
 168
 169         release_firmware(fw);
 170
 171         return retval;
 172 }
 173
 174 /* This function needs to initialize a "phy" of usb before */
 175 int xhci_rcar_init_quirk(struct usb_hcd *hcd)
 176 {
 177         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 178
 179         /* If hcd->regs is NULL, we don't just call the following function */
 180         if (!hcd->regs)
 181                 return 0;
 182
 183         /*
 184          * On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
 185          * to 1. However, these SoCs don't support 64-bit address memory
 186          * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
 187          * to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
 188          * xhci_gen_setup().
 189          */
 190         if (xhci_rcar_is_gen2(hcd->self.controller) ||
 191                         xhci_rcar_is_gen3(hcd->self.controller))
 192                 xhci->quirks |= XHCI_NO_64BIT_SUPPORT;
 193
 194         return xhci_rcar_download_firmware(hcd);
 195 }