GNU Linux-libre 4.19.286-gnu1
[releases.git] / drivers / usb / host / xhci-rcar.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * xHCI host controller driver for R-Car SoCs
4  *
5  * Copyright (C) 2014 Renesas Electronics Corporation
6  */
7
8 #include <linux/firmware.h>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/of.h>
12 #include <linux/usb/phy.h>
13 #include <linux/sys_soc.h>
14
15 #include "xhci.h"
16 #include "xhci-plat.h"
17 #include "xhci-rcar.h"
18
19 /*
20 * - The V3 firmware is for almost all R-Car Gen3 (except r8a7795 ES1.x)
21 * - The V2 firmware is for r8a7795 ES1.x.
22 * - The V2 firmware is possible to use on R-Car Gen2. However, the V2 causes
23 *   performance degradation. So, this driver continues to use the V1 if R-Car
24 *   Gen2.
25 * - The V1 firmware is impossible to use on R-Car Gen3.
26 */
27 /*(DEBLOBBED)*/
28
29 /*** Register Offset ***/
30 #define RCAR_USB3_AXH_STA       0x104   /* AXI Host Control Status */
31 #define RCAR_USB3_INT_ENA       0x224   /* Interrupt Enable */
32 #define RCAR_USB3_DL_CTRL       0x250   /* FW Download Control & Status */
33 #define RCAR_USB3_FW_DATA0      0x258   /* FW Data0 */
34
35 #define RCAR_USB3_LCLK          0xa44   /* LCLK Select */
36 #define RCAR_USB3_CONF1         0xa48   /* USB3.0 Configuration1 */
37 #define RCAR_USB3_CONF2         0xa5c   /* USB3.0 Configuration2 */
38 #define RCAR_USB3_CONF3         0xaa8   /* USB3.0 Configuration3 */
39 #define RCAR_USB3_RX_POL        0xab0   /* USB3.0 RX Polarity */
40 #define RCAR_USB3_TX_POL        0xab8   /* USB3.0 TX Polarity */
41
42 /*** Register Settings ***/
43 /* AXI Host Control Status */
44 #define RCAR_USB3_AXH_STA_B3_PLL_ACTIVE         0x00010000
45 #define RCAR_USB3_AXH_STA_B2_PLL_ACTIVE         0x00000001
46 #define RCAR_USB3_AXH_STA_PLL_ACTIVE_MASK (RCAR_USB3_AXH_STA_B3_PLL_ACTIVE | \
47                                            RCAR_USB3_AXH_STA_B2_PLL_ACTIVE)
48
49 /* Interrupt Enable */
50 #define RCAR_USB3_INT_XHC_ENA   0x00000001
51 #define RCAR_USB3_INT_PME_ENA   0x00000002
52 #define RCAR_USB3_INT_HSE_ENA   0x00000004
53 #define RCAR_USB3_INT_ENA_VAL   (RCAR_USB3_INT_XHC_ENA | \
54                                 RCAR_USB3_INT_PME_ENA | RCAR_USB3_INT_HSE_ENA)
55
56 /* FW Download Control & Status */
57 #define RCAR_USB3_DL_CTRL_ENABLE        0x00000001
58 #define RCAR_USB3_DL_CTRL_FW_SUCCESS    0x00000010
59 #define RCAR_USB3_DL_CTRL_FW_SET_DATA0  0x00000100
60
61 /* LCLK Select */
62 #define RCAR_USB3_LCLK_ENA_VAL  0x01030001
63
64 /* USB3.0 Configuration */
65 #define RCAR_USB3_CONF1_VAL     0x00030204
66 #define RCAR_USB3_CONF2_VAL     0x00030300
67 #define RCAR_USB3_CONF3_VAL     0x13802007
68
69 /* USB3.0 Polarity */
70 #define RCAR_USB3_RX_POL_VAL    BIT(21)
71 #define RCAR_USB3_TX_POL_VAL    BIT(4)
72
73 /* For soc_device_attribute */
74 #define RCAR_XHCI_FIRMWARE_V2   BIT(0) /* FIRMWARE V2 */
75
76 static const struct soc_device_attribute rcar_quirks_match[]  = {
77         {
78                 .soc_id = "r8a7795", .revision = "ES1.*",
79                 .data = (void *)RCAR_XHCI_FIRMWARE_V2,
80         },
81         { /* sentinel */ },
82 };
83
84 static void xhci_rcar_start_gen2(struct usb_hcd *hcd)
85 {
86         /* LCLK Select */
87         writel(RCAR_USB3_LCLK_ENA_VAL, hcd->regs + RCAR_USB3_LCLK);
88         /* USB3.0 Configuration */
89         writel(RCAR_USB3_CONF1_VAL, hcd->regs + RCAR_USB3_CONF1);
90         writel(RCAR_USB3_CONF2_VAL, hcd->regs + RCAR_USB3_CONF2);
91         writel(RCAR_USB3_CONF3_VAL, hcd->regs + RCAR_USB3_CONF3);
92         /* USB3.0 Polarity */
93         writel(RCAR_USB3_RX_POL_VAL, hcd->regs + RCAR_USB3_RX_POL);
94         writel(RCAR_USB3_TX_POL_VAL, hcd->regs + RCAR_USB3_TX_POL);
95 }
96
97 static int xhci_rcar_is_gen2(struct device *dev)
98 {
99         struct device_node *node = dev->of_node;
100
101         return of_device_is_compatible(node, "renesas,xhci-r8a7790") ||
102                 of_device_is_compatible(node, "renesas,xhci-r8a7791") ||
103                 of_device_is_compatible(node, "renesas,xhci-r8a7793") ||
104                 of_device_is_compatible(node, "renesas,rcar-gen2-xhci");
105 }
106
107 static int xhci_rcar_is_gen3(struct device *dev)
108 {
109         struct device_node *node = dev->of_node;
110
111         return of_device_is_compatible(node, "renesas,xhci-r8a7795") ||
112                 of_device_is_compatible(node, "renesas,xhci-r8a7796") ||
113                 of_device_is_compatible(node, "renesas,rcar-gen3-xhci");
114 }
115
116 void xhci_rcar_start(struct usb_hcd *hcd)
117 {
118         u32 temp;
119
120         if (hcd->regs != NULL) {
121                 /* Interrupt Enable */
122                 temp = readl(hcd->regs + RCAR_USB3_INT_ENA);
123                 temp |= RCAR_USB3_INT_ENA_VAL;
124                 writel(temp, hcd->regs + RCAR_USB3_INT_ENA);
125                 if (xhci_rcar_is_gen2(hcd->self.controller))
126                         xhci_rcar_start_gen2(hcd);
127         }
128 }
129
130 static int xhci_rcar_download_firmware(struct usb_hcd *hcd)
131 {
132         struct device *dev = hcd->self.controller;
133         void __iomem *regs = hcd->regs;
134         struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
135         const struct firmware *fw;
136         int retval, index, j, time;
137         int timeout = 10000;
138         u32 data, val, temp;
139         u32 quirks = 0;
140         const struct soc_device_attribute *attr;
141         const char *firmware_name;
142
143         /*
144          * According to the datasheet, "Upon the completion of FW Download,
145          * there is no need to write or reload FW".
146          */
147         if (readl(regs + RCAR_USB3_DL_CTRL) & RCAR_USB3_DL_CTRL_FW_SUCCESS)
148                 return 0;
149
150         attr = soc_device_match(rcar_quirks_match);
151         if (attr)
152                 quirks = (uintptr_t)attr->data;
153
154         if (quirks & RCAR_XHCI_FIRMWARE_V2)
155                 firmware_name = XHCI_RCAR_FIRMWARE_NAME_V2;
156         else
157                 firmware_name = priv->firmware_name;
158
159         /* request R-Car USB3.0 firmware */
160         retval = reject_firmware(&fw, firmware_name, dev);
161         if (retval)
162                 return retval;
163
164         /* download R-Car USB3.0 firmware */
165         temp = readl(regs + RCAR_USB3_DL_CTRL);
166         temp |= RCAR_USB3_DL_CTRL_ENABLE;
167         writel(temp, regs + RCAR_USB3_DL_CTRL);
168
169         for (index = 0; index < fw->size; index += 4) {
170                 /* to avoid reading beyond the end of the buffer */
171                 for (data = 0, j = 3; j >= 0; j--) {
172                         if ((j + index) < fw->size)
173                                 data |= fw->data[index + j] << (8 * j);
174                 }
175                 writel(data, regs + RCAR_USB3_FW_DATA0);
176                 temp = readl(regs + RCAR_USB3_DL_CTRL);
177                 temp |= RCAR_USB3_DL_CTRL_FW_SET_DATA0;
178                 writel(temp, regs + RCAR_USB3_DL_CTRL);
179
180                 for (time = 0; time < timeout; time++) {
181                         val = readl(regs + RCAR_USB3_DL_CTRL);
182                         if ((val & RCAR_USB3_DL_CTRL_FW_SET_DATA0) == 0)
183                                 break;
184                         udelay(1);
185                 }
186                 if (time == timeout) {
187                         retval = -ETIMEDOUT;
188                         break;
189                 }
190         }
191
192         temp = readl(regs + RCAR_USB3_DL_CTRL);
193         temp &= ~RCAR_USB3_DL_CTRL_ENABLE;
194         writel(temp, regs + RCAR_USB3_DL_CTRL);
195
196         for (time = 0; time < timeout; time++) {
197                 val = readl(regs + RCAR_USB3_DL_CTRL);
198                 if (val & RCAR_USB3_DL_CTRL_FW_SUCCESS) {
199                         retval = 0;
200                         break;
201                 }
202                 udelay(1);
203         }
204         if (time == timeout)
205                 retval = -ETIMEDOUT;
206
207         release_firmware(fw);
208
209         return retval;
210 }
211
212 static bool xhci_rcar_wait_for_pll_active(struct usb_hcd *hcd)
213 {
214         int timeout = 1000;
215         u32 val, mask = RCAR_USB3_AXH_STA_PLL_ACTIVE_MASK;
216
217         while (timeout > 0) {
218                 val = readl(hcd->regs + RCAR_USB3_AXH_STA);
219                 if ((val & mask) == mask)
220                         return true;
221                 udelay(1);
222                 timeout--;
223         }
224
225         return false;
226 }
227
228 /* This function needs to initialize a "phy" of usb before */
229 int xhci_rcar_init_quirk(struct usb_hcd *hcd)
230 {
231         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
232
233         /* If hcd->regs is NULL, we don't just call the following function */
234         if (!hcd->regs)
235                 return 0;
236
237         /*
238          * On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
239          * to 1. However, these SoCs don't support 64-bit address memory
240          * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
241          * to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
242          * xhci_gen_setup().
243          *
244          * And, since the firmware/internal CPU control the USBSTS.STS_HALT
245          * and the process speed is down when the roothub port enters U3,
246          * long delay for the handshake of STS_HALT is neeed in xhci_suspend().
247          */
248         if (xhci_rcar_is_gen2(hcd->self.controller) ||
249                         xhci_rcar_is_gen3(hcd->self.controller)) {
250                 xhci->quirks |= XHCI_NO_64BIT_SUPPORT | XHCI_SLOW_SUSPEND;
251         }
252
253         if (!xhci_rcar_wait_for_pll_active(hcd))
254                 return -ETIMEDOUT;
255
256         xhci->quirks |= XHCI_TRUST_TX_LENGTH;
257         return xhci_rcar_download_firmware(hcd);
258 }
259
260 int xhci_rcar_resume_quirk(struct usb_hcd *hcd)
261 {
262         int ret;
263
264         ret = xhci_rcar_download_firmware(hcd);
265         if (!ret)
266                 xhci_rcar_start(hcd);
267
268         return ret;
269 }