include/linux/arm-smccc.h

   1 /*
   2  * Copyright (c) 2015, Linaro Limited
   3  *
   4  * This software is licensed under the terms of the GNU General Public
   5  * License version 2, as published by the Free Software Foundation, and
   6  * may be copied, distributed, and modified under those terms.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  */
  14 #ifndef __LINUX_ARM_SMCCC_H
  15 #define __LINUX_ARM_SMCCC_H
  16
  17 #include <uapi/linux/const.h>
  18
  19 /*
  20  * This file provides common defines for ARM SMC Calling Convention as
  21  * specified in
  22  * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
  23  */
  24
  25 #define ARM_SMCCC_STD_CALL              _AC(0,U)
  26 #define ARM_SMCCC_FAST_CALL             _AC(1,U)
  27 #define ARM_SMCCC_TYPE_SHIFT            31
  28
  29 #define ARM_SMCCC_SMC_32                0
  30 #define ARM_SMCCC_SMC_64                1
  31 #define ARM_SMCCC_CALL_CONV_SHIFT       30
  32
  33 #define ARM_SMCCC_OWNER_MASK            0x3F
  34 #define ARM_SMCCC_OWNER_SHIFT           24
  35
  36 #define ARM_SMCCC_FUNC_MASK             0xFFFF
  37
  38 #define ARM_SMCCC_IS_FAST_CALL(smc_val) \
  39         ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
  40 #define ARM_SMCCC_IS_64(smc_val) \
  41         ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
  42 #define ARM_SMCCC_FUNC_NUM(smc_val)     ((smc_val) & ARM_SMCCC_FUNC_MASK)
  43 #define ARM_SMCCC_OWNER_NUM(smc_val) \
  44         (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
  45
  46 #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
  47         (((type) << ARM_SMCCC_TYPE_SHIFT) | \
  48         ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
  49         (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
  50         ((func_num) & ARM_SMCCC_FUNC_MASK))
  51
  52 #define ARM_SMCCC_OWNER_ARCH            0
  53 #define ARM_SMCCC_OWNER_CPU             1
  54 #define ARM_SMCCC_OWNER_SIP             2
  55 #define ARM_SMCCC_OWNER_OEM             3
  56 #define ARM_SMCCC_OWNER_STANDARD        4
  57 #define ARM_SMCCC_OWNER_TRUSTED_APP     48
  58 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
  59 #define ARM_SMCCC_OWNER_TRUSTED_OS      50
  60 #define ARM_SMCCC_OWNER_TRUSTED_OS_END  63
  61
  62 #define ARM_SMCCC_QUIRK_NONE            0
  63 #define ARM_SMCCC_QUIRK_QCOM_A6         1 /* Save/restore register a6 */
  64
  65 #define ARM_SMCCC_VERSION_1_0           0x10000
  66 #define ARM_SMCCC_VERSION_1_1           0x10001
  67
  68 #define ARM_SMCCC_VERSION_FUNC_ID                                       \
  69         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  70                            ARM_SMCCC_SMC_32,                            \
  71                            0, 0)
  72
  73 #define ARM_SMCCC_ARCH_FEATURES_FUNC_ID                                 \
  74         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  75                            ARM_SMCCC_SMC_32,                            \
  76                            0, 1)
  77
  78 #define ARM_SMCCC_ARCH_WORKAROUND_1                                     \
  79         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  80                            ARM_SMCCC_SMC_32,                            \
  81                            0, 0x8000)
  82
  83 #define ARM_SMCCC_ARCH_WORKAROUND_2                                     \
  84         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                         \
  85                            ARM_SMCCC_SMC_32,                            \
  86                            0, 0x7fff)
  87
  88 #ifndef __ASSEMBLY__
  89
  90 #include <linux/linkage.h>
  91 #include <linux/types.h>
  92
  93 enum arm_smccc_conduit {
  94         SMCCC_CONDUIT_NONE,
  95         SMCCC_CONDUIT_SMC,
  96         SMCCC_CONDUIT_HVC,
  97 };
  98
  99 /**
 100  * arm_smccc_1_1_get_conduit()
 101  *
 102  * Returns the conduit to be used for SMCCCv1.1 or later.
 103  *
 104  * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE.
 105  */
 106 enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void);
 107
 108 /**
 109  * struct arm_smccc_res - Result from SMC/HVC call
 110  * @a0-a3 result values from registers 0 to 3
 111  */
 112 struct arm_smccc_res {
 113         unsigned long a0;
 114         unsigned long a1;
 115         unsigned long a2;
 116         unsigned long a3;
 117 };
 118
 119 /**
 120  * struct arm_smccc_quirk - Contains quirk information
 121  * @id: quirk identification
 122  * @state: quirk specific information
 123  * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
 124  */
 125 struct arm_smccc_quirk {
 126         int     id;
 127         union {
 128                 unsigned long a6;
 129         } state;
 130 };
 131
 132 /**
 133  * __arm_smccc_smc() - make SMC calls
 134  * @a0-a7: arguments passed in registers 0 to 7
 135  * @res: result values from registers 0 to 3
 136  * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
 137  *
 138  * This function is used to make SMC calls following SMC Calling Convention.
 139  * The content of the supplied param are copied to registers 0 to 7 prior
 140  * to the SMC instruction. The return values are updated with the content
 141  * from register 0 to 3 on return from the SMC instruction.  An optional
 142  * quirk structure provides vendor specific behavior.
 143  */
 144 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
 145                         unsigned long a2, unsigned long a3, unsigned long a4,
 146                         unsigned long a5, unsigned long a6, unsigned long a7,
 147                         struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
 148
 149 /**
 150  * __arm_smccc_hvc() - make HVC calls
 151  * @a0-a7: arguments passed in registers 0 to 7
 152  * @res: result values from registers 0 to 3
 153  * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
 154  *
 155  * This function is used to make HVC calls following SMC Calling
 156  * Convention.  The content of the supplied param are copied to registers 0
 157  * to 7 prior to the HVC instruction. The return values are updated with
 158  * the content from register 0 to 3 on return from the HVC instruction.  An
 159  * optional quirk structure provides vendor specific behavior.
 160  */
 161 asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
 162                         unsigned long a2, unsigned long a3, unsigned long a4,
 163                         unsigned long a5, unsigned long a6, unsigned long a7,
 164                         struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
 165
 166 #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
 167
 168 #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
 169
 170 #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
 171
 172 #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
 173
 174 /* SMCCC v1.1 implementation madness follows */
 175 #ifdef CONFIG_ARM64
 176
 177 #define SMCCC_SMC_INST  "smc    #0"
 178 #define SMCCC_HVC_INST  "hvc    #0"
 179
 180 #elif defined(CONFIG_ARM)
 181 #include <asm/opcodes-sec.h>
 182 #include <asm/opcodes-virt.h>
 183
 184 #define SMCCC_SMC_INST  __SMC(0)
 185 #define SMCCC_HVC_INST  __HVC(0)
 186
 187 #endif
 188
 189 #define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x
 190
 191 #define __count_args(...)                                               \
 192         ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0)
 193
 194 #define __constraint_write_0                                            \
 195         "+r" (r0), "=&r" (r1), "=&r" (r2), "=&r" (r3)
 196 #define __constraint_write_1                                            \
 197         "+r" (r0), "+r" (r1), "=&r" (r2), "=&r" (r3)
 198 #define __constraint_write_2                                            \
 199         "+r" (r0), "+r" (r1), "+r" (r2), "=&r" (r3)
 200 #define __constraint_write_3                                            \
 201         "+r" (r0), "+r" (r1), "+r" (r2), "+r" (r3)
 202 #define __constraint_write_4    __constraint_write_3
 203 #define __constraint_write_5    __constraint_write_4
 204 #define __constraint_write_6    __constraint_write_5
 205 #define __constraint_write_7    __constraint_write_6
 206
 207 #define __constraint_read_0
 208 #define __constraint_read_1
 209 #define __constraint_read_2
 210 #define __constraint_read_3
 211 #define __constraint_read_4     "r" (r4)
 212 #define __constraint_read_5     __constraint_read_4, "r" (r5)
 213 #define __constraint_read_6     __constraint_read_5, "r" (r6)
 214 #define __constraint_read_7     __constraint_read_6, "r" (r7)
 215
 216 #define __declare_arg_0(a0, res)                                        \
 217         struct arm_smccc_res   *___res = res;                           \
 218         register unsigned long r0 asm("r0") = (u32)a0;                  \
 219         register unsigned long r1 asm("r1");                            \
 220         register unsigned long r2 asm("r2");                            \
 221         register unsigned long r3 asm("r3")
 222
 223 #define __declare_arg_1(a0, a1, res)                                    \
 224         typeof(a1) __a1 = a1;                                           \
 225         struct arm_smccc_res   *___res = res;                           \
 226         register unsigned long r0 asm("r0") = (u32)a0;                  \
 227         register unsigned long r1 asm("r1") = __a1;                     \
 228         register unsigned long r2 asm("r2");                            \
 229         register unsigned long r3 asm("r3")
 230
 231 #define __declare_arg_2(a0, a1, a2, res)                                \
 232         typeof(a1) __a1 = a1;                                           \
 233         typeof(a2) __a2 = a2;                                           \
 234         struct arm_smccc_res   *___res = res;                           \
 235         register unsigned long r0 asm("r0") = (u32)a0;                  \
 236         register unsigned long r1 asm("r1") = __a1;                     \
 237         register unsigned long r2 asm("r2") = __a2;                     \
 238         register unsigned long r3 asm("r3")
 239
 240 #define __declare_arg_3(a0, a1, a2, a3, res)                            \
 241         typeof(a1) __a1 = a1;                                           \
 242         typeof(a2) __a2 = a2;                                           \
 243         typeof(a3) __a3 = a3;                                           \
 244         struct arm_smccc_res   *___res = res;                           \
 245         register unsigned long r0 asm("r0") = (u32)a0;                  \
 246         register unsigned long r1 asm("r1") = __a1;                     \
 247         register unsigned long r2 asm("r2") = __a2;                     \
 248         register unsigned long r3 asm("r3") = __a3
 249
 250 #define __declare_arg_4(a0, a1, a2, a3, a4, res)                        \
 251         typeof(a4) __a4 = a4;                                           \
 252         __declare_arg_3(a0, a1, a2, a3, res);                           \
 253         register unsigned long r4 asm("r4") = __a4
 254
 255 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res)                    \
 256         typeof(a5) __a5 = a5;                                           \
 257         __declare_arg_4(a0, a1, a2, a3, a4, res);                       \
 258         register unsigned long r5 asm("r5") = __a5
 259
 260 #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res)                \
 261         typeof(a6) __a6 = a6;                                           \
 262         __declare_arg_5(a0, a1, a2, a3, a4, a5, res);                   \
 263         register unsigned long r6 asm("r6") = __a6
 264
 265 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res)            \
 266         typeof(a7) __a7 = a7;                                           \
 267         __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res);               \
 268         register unsigned long r7 asm("r7") = __a7
 269
 270 #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__)
 271 #define __declare_args(count, ...)  ___declare_args(count, __VA_ARGS__)
 272
 273 #define ___constraints(count)                                           \
 274         : __constraint_write_ ## count                                  \
 275         : __constraint_read_ ## count                                   \
 276         : "memory"
 277 #define __constraints(count)    ___constraints(count)
 278
 279 /*
 280  * We have an output list that is not necessarily used, and GCC feels
 281  * entitled to optimise the whole sequence away. "volatile" is what
 282  * makes it stick.
 283  */
 284 #define __arm_smccc_1_1(inst, ...)                                      \
 285         do {                                                            \
 286                 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
 287                 asm volatile(inst "\n"                                  \
 288                              __constraints(__count_args(__VA_ARGS__))); \
 289                 if (___res)                                             \
 290                         *___res = (typeof(*___res)){r0, r1, r2, r3};    \
 291         } while (0)
 292
 293 /*
 294  * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call
 295  *
 296  * This is a variadic macro taking one to eight source arguments, and
 297  * an optional return structure.
 298  *
 299  * @a0-a7: arguments passed in registers 0 to 7
 300  * @res: result values from registers 0 to 3
 301  *
 302  * This macro is used to make SMC calls following SMC Calling Convention v1.1.
 303  * The content of the supplied param are copied to registers 0 to 7 prior
 304  * to the SMC instruction. The return values are updated with the content
 305  * from register 0 to 3 on return from the SMC instruction if not NULL.
 306  */
 307 #define arm_smccc_1_1_smc(...)  __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
 308
 309 /*
 310  * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call
 311  *
 312  * This is a variadic macro taking one to eight source arguments, and
 313  * an optional return structure.
 314  *
 315  * @a0-a7: arguments passed in registers 0 to 7
 316  * @res: result values from registers 0 to 3
 317  *
 318  * This macro is used to make HVC calls following SMC Calling Convention v1.1.
 319  * The content of the supplied param are copied to registers 0 to 7 prior
 320  * to the HVC instruction. The return values are updated with the content
 321  * from register 0 to 3 on return from the HVC instruction if not NULL.
 322  */
 323 #define arm_smccc_1_1_hvc(...)  __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
 324
 325 /* Return codes defined in ARM DEN 0070A */
 326 #define SMCCC_RET_SUCCESS                       0
 327 #define SMCCC_RET_NOT_SUPPORTED                 -1
 328 #define SMCCC_RET_NOT_REQUIRED                  -2
 329
 330 /*
 331  * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED.
 332  * Used when the SMCCC conduit is not defined. The empty asm statement
 333  * avoids compiler warnings about unused variables.
 334  */
 335 #define __fail_smccc_1_1(...)                                           \
 336         do {                                                            \
 337                 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
 338                 asm ("" __constraints(__count_args(__VA_ARGS__)));      \
 339                 if (___res)                                             \
 340                         ___res->a0 = SMCCC_RET_NOT_SUPPORTED;           \
 341         } while (0)
 342
 343 /*
 344  * arm_smccc_1_1_invoke() - make an SMCCC v1.1 compliant call
 345  *
 346  * This is a variadic macro taking one to eight source arguments, and
 347  * an optional return structure.
 348  *
 349  * @a0-a7: arguments passed in registers 0 to 7
 350  * @res: result values from registers 0 to 3
 351  *
 352  * This macro will make either an HVC call or an SMC call depending on the
 353  * current SMCCC conduit. If no valid conduit is available then -1
 354  * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied).
 355  *
 356  * The return value also provides the conduit that was used.
 357  */
 358 #define arm_smccc_1_1_invoke(...) ({                                    \
 359                 int method = arm_smccc_1_1_get_conduit();               \
 360                 switch (method) {                                       \
 361                 case SMCCC_CONDUIT_HVC:                                 \
 362                         arm_smccc_1_1_hvc(__VA_ARGS__);                 \
 363                         break;                                          \
 364                 case SMCCC_CONDUIT_SMC:                                 \
 365                         arm_smccc_1_1_smc(__VA_ARGS__);                 \
 366                         break;                                          \
 367                 default:                                                \
 368                         __fail_smccc_1_1(__VA_ARGS__);                  \
 369                         method = SMCCC_CONDUIT_NONE;                    \
 370                         break;                                          \
 371                 }                                                       \
 372                 method;                                                 \
 373         })
 374
 375 /* Paravirtualised time calls (defined by ARM DEN0057A) */
 376 #define ARM_SMCCC_HV_PV_TIME_FEATURES                           \
 377         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                 \
 378                            ARM_SMCCC_SMC_64,                    \
 379                            ARM_SMCCC_OWNER_STANDARD_HYP,        \
 380                            0x20)
 381
 382 #define ARM_SMCCC_HV_PV_TIME_ST                                 \
 383         ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,                 \
 384                            ARM_SMCCC_SMC_64,                    \
 385                            ARM_SMCCC_OWNER_STANDARD_HYP,        \
 386                            0x21)
 387
 388 #endif /*__ASSEMBLY__*/
 389 #endif /*__LINUX_ARM_SMCCC_H*/