2 * Copyright (c) 2015, Linaro Limited
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #ifndef __LINUX_ARM_SMCCC_H
15 #define __LINUX_ARM_SMCCC_H
17 #include <uapi/linux/const.h>
20 * This file provides common defines for ARM SMC Calling Convention as
22 * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
25 #define ARM_SMCCC_STD_CALL _AC(0,U)
26 #define ARM_SMCCC_FAST_CALL _AC(1,U)
27 #define ARM_SMCCC_TYPE_SHIFT 31
29 #define ARM_SMCCC_SMC_32 0
30 #define ARM_SMCCC_SMC_64 1
31 #define ARM_SMCCC_CALL_CONV_SHIFT 30
33 #define ARM_SMCCC_OWNER_MASK 0x3F
34 #define ARM_SMCCC_OWNER_SHIFT 24
36 #define ARM_SMCCC_FUNC_MASK 0xFFFF
38 #define ARM_SMCCC_IS_FAST_CALL(smc_val) \
39 ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
40 #define ARM_SMCCC_IS_64(smc_val) \
41 ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
42 #define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK)
43 #define ARM_SMCCC_OWNER_NUM(smc_val) \
44 (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
46 #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
47 (((type) << ARM_SMCCC_TYPE_SHIFT) | \
48 ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
49 (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
50 ((func_num) & ARM_SMCCC_FUNC_MASK))
52 #define ARM_SMCCC_OWNER_ARCH 0
53 #define ARM_SMCCC_OWNER_CPU 1
54 #define ARM_SMCCC_OWNER_SIP 2
55 #define ARM_SMCCC_OWNER_OEM 3
56 #define ARM_SMCCC_OWNER_STANDARD 4
57 #define ARM_SMCCC_OWNER_TRUSTED_APP 48
58 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
59 #define ARM_SMCCC_OWNER_TRUSTED_OS 50
60 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63
62 #define ARM_SMCCC_VERSION_1_0 0x10000
63 #define ARM_SMCCC_VERSION_1_1 0x10001
65 #define ARM_SMCCC_VERSION_FUNC_ID \
66 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
70 #define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \
71 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
75 #define ARM_SMCCC_ARCH_WORKAROUND_1 \
76 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
82 #include <linux/linkage.h>
83 #include <linux/types.h>
86 * struct arm_smccc_res - Result from SMC/HVC call
87 * @a0-a3 result values from registers 0 to 3
89 struct arm_smccc_res {
97 * arm_smccc_smc() - make SMC calls
98 * @a0-a7: arguments passed in registers 0 to 7
99 * @res: result values from registers 0 to 3
101 * This function is used to make SMC calls following SMC Calling Convention.
102 * The content of the supplied param are copied to registers 0 to 7 prior
103 * to the SMC instruction. The return values are updated with the content
104 * from register 0 to 3 on return from the SMC instruction.
106 asmlinkage void arm_smccc_smc(unsigned long a0, unsigned long a1,
107 unsigned long a2, unsigned long a3, unsigned long a4,
108 unsigned long a5, unsigned long a6, unsigned long a7,
109 struct arm_smccc_res *res);
112 * arm_smccc_hvc() - make HVC calls
113 * @a0-a7: arguments passed in registers 0 to 7
114 * @res: result values from registers 0 to 3
116 * This function is used to make HVC calls following SMC Calling
117 * Convention. The content of the supplied param are copied to registers 0
118 * to 7 prior to the HVC instruction. The return values are updated with
119 * the content from register 0 to 3 on return from the HVC instruction.
121 asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1,
122 unsigned long a2, unsigned long a3, unsigned long a4,
123 unsigned long a5, unsigned long a6, unsigned long a7,
124 struct arm_smccc_res *res);
126 /* SMCCC v1.1 implementation madness follows */
129 #define SMCCC_SMC_INST "smc #0"
130 #define SMCCC_HVC_INST "hvc #0"
132 #elif defined(CONFIG_ARM)
133 #include <asm/opcodes-sec.h>
134 #include <asm/opcodes-virt.h>
136 #define SMCCC_SMC_INST __SMC(0)
137 #define SMCCC_HVC_INST __HVC(0)
141 #define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x
143 #define __count_args(...) \
144 ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0)
146 #define __constraint_write_0 \
147 "+r" (r0), "=&r" (r1), "=&r" (r2), "=&r" (r3)
148 #define __constraint_write_1 \
149 "+r" (r0), "+r" (r1), "=&r" (r2), "=&r" (r3)
150 #define __constraint_write_2 \
151 "+r" (r0), "+r" (r1), "+r" (r2), "=&r" (r3)
152 #define __constraint_write_3 \
153 "+r" (r0), "+r" (r1), "+r" (r2), "+r" (r3)
154 #define __constraint_write_4 __constraint_write_3
155 #define __constraint_write_5 __constraint_write_4
156 #define __constraint_write_6 __constraint_write_5
157 #define __constraint_write_7 __constraint_write_6
159 #define __constraint_read_0
160 #define __constraint_read_1
161 #define __constraint_read_2
162 #define __constraint_read_3
163 #define __constraint_read_4 "r" (r4)
164 #define __constraint_read_5 __constraint_read_4, "r" (r5)
165 #define __constraint_read_6 __constraint_read_5, "r" (r6)
166 #define __constraint_read_7 __constraint_read_6, "r" (r7)
168 #define __declare_arg_0(a0, res) \
169 struct arm_smccc_res *___res = res; \
170 register unsigned long r0 asm("r0") = (u32)a0; \
171 register unsigned long r1 asm("r1"); \
172 register unsigned long r2 asm("r2"); \
173 register unsigned long r3 asm("r3")
175 #define __declare_arg_1(a0, a1, res) \
176 typeof(a1) __a1 = a1; \
177 struct arm_smccc_res *___res = res; \
178 register unsigned long r0 asm("r0") = (u32)a0; \
179 register unsigned long r1 asm("r1") = __a1; \
180 register unsigned long r2 asm("r2"); \
181 register unsigned long r3 asm("r3")
183 #define __declare_arg_2(a0, a1, a2, res) \
184 typeof(a1) __a1 = a1; \
185 typeof(a2) __a2 = a2; \
186 struct arm_smccc_res *___res = res; \
187 register unsigned long r0 asm("r0") = (u32)a0; \
188 register unsigned long r1 asm("r1") = __a1; \
189 register unsigned long r2 asm("r2") = __a2; \
190 register unsigned long r3 asm("r3")
192 #define __declare_arg_3(a0, a1, a2, a3, res) \
193 typeof(a1) __a1 = a1; \
194 typeof(a2) __a2 = a2; \
195 typeof(a3) __a3 = a3; \
196 struct arm_smccc_res *___res = res; \
197 register unsigned long r0 asm("r0") = (u32)a0; \
198 register unsigned long r1 asm("r1") = __a1; \
199 register unsigned long r2 asm("r2") = __a2; \
200 register unsigned long r3 asm("r3") = __a3
202 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \
203 typeof(a4) __a4 = a4; \
204 __declare_arg_3(a0, a1, a2, a3, res); \
205 register unsigned long r4 asm("r4") = __a4
207 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \
208 typeof(a5) __a5 = a5; \
209 __declare_arg_4(a0, a1, a2, a3, a4, res); \
210 register unsigned long r5 asm("r5") = __a5
212 #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \
213 typeof(a6) __a6 = a6; \
214 __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \
215 register unsigned long r6 asm("r6") = __a6
217 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \
218 typeof(a7) __a7 = a7; \
219 __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \
220 register unsigned long r7 asm("r7") = __a7
222 #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__)
223 #define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__)
225 #define ___constraints(count) \
226 : __constraint_write_ ## count \
227 : __constraint_read_ ## count \
229 #define __constraints(count) ___constraints(count)
232 * We have an output list that is not necessarily used, and GCC feels
233 * entitled to optimise the whole sequence away. "volatile" is what
236 #define __arm_smccc_1_1(inst, ...) \
238 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
239 asm volatile(inst "\n" \
240 __constraints(__count_args(__VA_ARGS__))); \
242 *___res = (typeof(*___res)){r0, r1, r2, r3}; \
246 * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call
248 * This is a variadic macro taking one to eight source arguments, and
249 * an optional return structure.
251 * @a0-a7: arguments passed in registers 0 to 7
252 * @res: result values from registers 0 to 3
254 * This macro is used to make SMC calls following SMC Calling Convention v1.1.
255 * The content of the supplied param are copied to registers 0 to 7 prior
256 * to the SMC instruction. The return values are updated with the content
257 * from register 0 to 3 on return from the SMC instruction if not NULL.
259 #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
262 * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call
264 * This is a variadic macro taking one to eight source arguments, and
265 * an optional return structure.
267 * @a0-a7: arguments passed in registers 0 to 7
268 * @res: result values from registers 0 to 3
270 * This macro is used to make HVC calls following SMC Calling Convention v1.1.
271 * The content of the supplied param are copied to registers 0 to 7 prior
272 * to the HVC instruction. The return values are updated with the content
273 * from register 0 to 3 on return from the HVC instruction if not NULL.
275 #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
277 /* Return codes defined in ARM DEN 0070A */
278 #define SMCCC_RET_SUCCESS 0
279 #define SMCCC_RET_NOT_SUPPORTED -1
280 #define SMCCC_RET_NOT_REQUIRED -2
282 #endif /*__ASSEMBLY__*/
283 #endif /*__LINUX_ARM_SMCCC_H*/