sound/pci/cs46xx/dsp_spos.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  15  *
  16  */
  17
  18 /*
  19  * 2002-07 Benny Sjostrand benny@hostmobility.com
  20  */
  21
  22
  23 #include <linux/io.h>
  24 #include <linux/delay.h>
  25 #include <linux/pm.h>
  26 #include <linux/init.h>
  27 #include <linux/slab.h>
  28 #include <linux/vmalloc.h>
  29 #include <linux/mutex.h>
  30
  31 #include <sound/core.h>
  32 #include <sound/control.h>
  33 #include <sound/info.h>
  34 #include <sound/asoundef.h>
  35 #include "cs46xx.h"
  36
  37 #include "cs46xx_lib.h"
  38 #include "dsp_spos.h"
  39
  40 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
  41                                   struct dsp_scb_descriptor * fg_entry);
  42
  43 static enum wide_opcode wide_opcodes[] = {
  44         WIDE_FOR_BEGIN_LOOP,
  45         WIDE_FOR_BEGIN_LOOP2,
  46         WIDE_COND_GOTO_ADDR,
  47         WIDE_COND_GOTO_CALL,
  48         WIDE_TBEQ_COND_GOTO_ADDR,
  49         WIDE_TBEQ_COND_CALL_ADDR,
  50         WIDE_TBEQ_NCOND_GOTO_ADDR,
  51         WIDE_TBEQ_NCOND_CALL_ADDR,
  52         WIDE_TBEQ_COND_GOTO1_ADDR,
  53         WIDE_TBEQ_COND_CALL1_ADDR,
  54         WIDE_TBEQ_NCOND_GOTOI_ADDR,
  55         WIDE_TBEQ_NCOND_CALL1_ADDR
  56 };
  57
  58 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
  59                                        u32 overlay_begin_address)
  60 {
  61         unsigned int i = 0, j, nreallocated = 0;
  62         u32 hival,loval,address;
  63         u32 mop_operands,mop_type,wide_op;
  64         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
  65
  66         if (snd_BUG_ON(size %2))
  67                 return -EINVAL;
  68
  69         while (i < size) {
  70                 loval = data[i++];
  71                 hival = data[i++];
  72
  73                 if (ins->code.offset > 0) {
  74                         mop_operands = (hival >> 6) & 0x03fff;
  75                         mop_type = mop_operands >> 10;
  76
  77                         /* check for wide type instruction */
  78                         if (mop_type == 0 &&
  79                             (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
  80                             (mop_operands & WIDE_INSTR_MASK) != 0) {
  81                                 wide_op = loval & 0x7f;
  82                                 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
  83                                         if (wide_opcodes[j] == wide_op) {
  84                                                 /* need to reallocate instruction */
  85                                                 address  = (hival & 0x00FFF) << 5;
  86                                                 address |=  loval >> 15;
  87
  88                                                 dev_dbg(chip->card->dev,
  89                                                         "handle_wideop[1]: %05x:%05x addr %04x\n",
  90                                                         hival, loval, address);
  91
  92                                                 if ( !(address & 0x8000) ) {
  93                                                         address += (ins->code.offset / 2) - overlay_begin_address;
  94                                                 } else {
  95                                                         dev_dbg(chip->card->dev,
  96                                                                 "handle_wideop[1]: ROM symbol not reallocated\n");
  97                                                 }
  98
  99                                                 hival &= 0xFF000;
 100                                                 loval &= 0x07FFF;
 101
 102                                                 hival |= ( (address >> 5)  & 0x00FFF);
 103                                                 loval |= ( (address << 15) & 0xF8000);
 104
 105                                                 address  = (hival & 0x00FFF) << 5;
 106                                                 address |=  loval >> 15;
 107
 108                                                 dev_dbg(chip->card->dev,
 109                                                         "handle_wideop:[2] %05x:%05x addr %04x\n",
 110                                                         hival, loval, address);
 111                                                 nreallocated++;
 112                                         } /* wide_opcodes[j] == wide_op */
 113                                 } /* for */
 114                         } /* mod_type == 0 ... */
 115                 } /* ins->code.offset > 0 */
 116
 117                 ins->code.data[ins->code.size++] = loval;
 118                 ins->code.data[ins->code.size++] = hival;
 119         }
 120
 121         dev_dbg(chip->card->dev,
 122                 "dsp_spos: %d instructions reallocated\n", nreallocated);
 123         return nreallocated;
 124 }
 125
 126 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
 127 {
 128         int i;
 129         for (i = 0;i < module->nsegments; ++i) {
 130                 if (module->segments[i].segment_type == seg_type) {
 131                         return (module->segments + i);
 132                 }
 133         }
 134
 135         return NULL;
 136 };
 137
 138 static int find_free_symbol_index (struct dsp_spos_instance * ins)
 139 {
 140         int index = ins->symbol_table.nsymbols,i;
 141
 142         for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
 143                 if (ins->symbol_table.symbols[i].deleted) {
 144                         index = i;
 145                         break;
 146                 }
 147         }
 148
 149         return index;
 150 }
 151
 152 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 153 {
 154         int i;
 155         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 156
 157         if (module->symbol_table.nsymbols > 0) {
 158                 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
 159                     module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
 160                         module->overlay_begin_address = module->symbol_table.symbols[0].address;
 161                 }
 162         }
 163
 164         for (i = 0;i < module->symbol_table.nsymbols; ++i) {
 165                 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 166                         dev_err(chip->card->dev,
 167                                 "dsp_spos: symbol table is full\n");
 168                         return -ENOMEM;
 169                 }
 170
 171
 172                 if (cs46xx_dsp_lookup_symbol(chip,
 173                                              module->symbol_table.symbols[i].symbol_name,
 174                                              module->symbol_table.symbols[i].symbol_type) == NULL) {
 175
 176                         ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
 177                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
 178                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
 179                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
 180
 181                         if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
 182                                 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
 183
 184                         ins->symbol_table.nsymbols++;
 185                 } else {
 186 #if 0
 187                         dev_dbg(chip->card->dev,
 188                                 "dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
 189                                 module->symbol_table.symbols[i].symbol_name); */
 190 #endif
 191                 }
 192         }
 193
 194         return 0;
 195 }
 196
 197 static struct dsp_symbol_entry *
 198 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
 199 {
 200         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 201         struct dsp_symbol_entry * symbol = NULL;
 202         int index;
 203
 204         if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 205                 dev_err(chip->card->dev, "dsp_spos: symbol table is full\n");
 206                 return NULL;
 207         }
 208
 209         if (cs46xx_dsp_lookup_symbol(chip,
 210                                      symbol_name,
 211                                      type) != NULL) {
 212                 dev_err(chip->card->dev,
 213                         "dsp_spos: symbol <%s> duplicated\n", symbol_name);
 214                 return NULL;
 215         }
 216
 217         index = find_free_symbol_index (ins);
 218
 219         strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
 220         ins->symbol_table.symbols[index].address = address;
 221         ins->symbol_table.symbols[index].symbol_type = type;
 222         ins->symbol_table.symbols[index].module = NULL;
 223         ins->symbol_table.symbols[index].deleted = 0;
 224         symbol = (ins->symbol_table.symbols + index);
 225
 226         if (index > ins->symbol_table.highest_frag_index)
 227                 ins->symbol_table.highest_frag_index = index;
 228
 229         if (index == ins->symbol_table.nsymbols)
 230                 ins->symbol_table.nsymbols++; /* no frag. in list */
 231
 232         return symbol;
 233 }
 234
 235 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
 236 {
 237         struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
 238
 239         if (ins == NULL)
 240                 return NULL;
 241
 242         /* better to use vmalloc for this big table */
 243         ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) *
 244                                             DSP_MAX_SYMBOLS);
 245         ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
 246         ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL);
 247         if (!ins->symbol_table.symbols || !ins->code.data || !ins->modules) {
 248                 cs46xx_dsp_spos_destroy(chip);
 249                 goto error;
 250         }
 251         ins->symbol_table.nsymbols = 0;
 252         ins->symbol_table.highest_frag_index = 0;
 253         ins->code.offset = 0;
 254         ins->code.size = 0;
 255         ins->nscb = 0;
 256         ins->ntask = 0;
 257         ins->nmodules = 0;
 258
 259         /* default SPDIF input sample rate
 260            to 48000 khz */
 261         ins->spdif_in_sample_rate = 48000;
 262
 263         /* maximize volume */
 264         ins->dac_volume_right = 0x8000;
 265         ins->dac_volume_left = 0x8000;
 266         ins->spdif_input_volume_right = 0x8000;
 267         ins->spdif_input_volume_left = 0x8000;
 268
 269         /* set left and right validity bits and
 270            default channel status */
 271         ins->spdif_csuv_default =
 272                 ins->spdif_csuv_stream =
 273          /* byte 0 */  ((unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF        & 0xff)) << 24) |
 274          /* byte 1 */  ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
 275          /* byte 3 */   (unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
 276          /* left and right validity bits */ (1 << 13) | (1 << 12);
 277
 278         return ins;
 279
 280 error:
 281         kfree(ins->modules);
 282         kfree(ins->code.data);
 283         vfree(ins->symbol_table.symbols);
 284         kfree(ins);
 285         return NULL;
 286 }
 287
 288 void  cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
 289 {
 290         int i;
 291         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 292
 293         if (snd_BUG_ON(!ins))
 294                 return;
 295
 296         mutex_lock(&chip->spos_mutex);
 297         for (i = 0; i < ins->nscb; ++i) {
 298                 if (ins->scbs[i].deleted) continue;
 299
 300                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 301 #ifdef CONFIG_PM_SLEEP
 302                 kfree(ins->scbs[i].data);
 303 #endif
 304         }
 305
 306         kfree(ins->code.data);
 307         vfree(ins->symbol_table.symbols);
 308         kfree(ins->modules);
 309         kfree(ins);
 310         mutex_unlock(&chip->spos_mutex);
 311 }
 312
 313 static int dsp_load_parameter(struct snd_cs46xx *chip,
 314                               struct dsp_segment_desc *parameter)
 315 {
 316         u32 doffset, dsize;
 317
 318         if (!parameter) {
 319                 dev_dbg(chip->card->dev,
 320                         "dsp_spos: module got no parameter segment\n");
 321                 return 0;
 322         }
 323
 324         doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
 325         dsize   = parameter->size * 4;
 326
 327         dev_dbg(chip->card->dev,
 328                 "dsp_spos: downloading parameter data to chip (%08x-%08x)\n",
 329                     doffset,doffset + dsize);
 330         if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
 331                 dev_err(chip->card->dev,
 332                         "dsp_spos: failed to download parameter data to DSP\n");
 333                 return -EINVAL;
 334         }
 335         return 0;
 336 }
 337
 338 static int dsp_load_sample(struct snd_cs46xx *chip,
 339                            struct dsp_segment_desc *sample)
 340 {
 341         u32 doffset, dsize;
 342
 343         if (!sample) {
 344                 dev_dbg(chip->card->dev,
 345                         "dsp_spos: module got no sample segment\n");
 346                 return 0;
 347         }
 348
 349         doffset = (sample->offset * 4  + DSP_SAMPLE_BYTE_OFFSET);
 350         dsize   =  sample->size * 4;
 351
 352         dev_dbg(chip->card->dev,
 353                 "dsp_spos: downloading sample data to chip (%08x-%08x)\n",
 354                     doffset,doffset + dsize);
 355
 356         if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
 357                 dev_err(chip->card->dev,
 358                         "dsp_spos: failed to sample data to DSP\n");
 359                 return -EINVAL;
 360         }
 361         return 0;
 362 }
 363
 364 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 365 {
 366         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 367         struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
 368         u32 doffset, dsize;
 369         int err;
 370
 371         if (ins->nmodules == DSP_MAX_MODULES - 1) {
 372                 dev_err(chip->card->dev,
 373                         "dsp_spos: to many modules loaded into DSP\n");
 374                 return -ENOMEM;
 375         }
 376
 377         dev_dbg(chip->card->dev,
 378                 "dsp_spos: loading module %s into DSP\n", module->module_name);
 379
 380         if (ins->nmodules == 0) {
 381                 dev_dbg(chip->card->dev, "dsp_spos: clearing parameter area\n");
 382                 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
 383         }
 384
 385         err = dsp_load_parameter(chip, get_segment_desc(module,
 386                                                         SEGTYPE_SP_PARAMETER));
 387         if (err < 0)
 388                 return err;
 389
 390         if (ins->nmodules == 0) {
 391                 dev_dbg(chip->card->dev, "dsp_spos: clearing sample area\n");
 392                 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
 393         }
 394
 395         err = dsp_load_sample(chip, get_segment_desc(module,
 396                                                      SEGTYPE_SP_SAMPLE));
 397         if (err < 0)
 398                 return err;
 399
 400         if (ins->nmodules == 0) {
 401                 dev_dbg(chip->card->dev, "dsp_spos: clearing code area\n");
 402                 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
 403         }
 404
 405         if (code == NULL) {
 406                 dev_dbg(chip->card->dev,
 407                         "dsp_spos: module got no code segment\n");
 408         } else {
 409                 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
 410                         dev_err(chip->card->dev,
 411                                 "dsp_spos: no space available in DSP\n");
 412                         return -ENOMEM;
 413                 }
 414
 415                 module->load_address = ins->code.offset;
 416                 module->overlay_begin_address = 0x000;
 417
 418                 /* if module has a code segment it must have
 419                    symbol table */
 420                 if (snd_BUG_ON(!module->symbol_table.symbols))
 421                         return -ENOMEM;
 422                 if (add_symbols(chip,module)) {
 423                         dev_err(chip->card->dev,
 424                                 "dsp_spos: failed to load symbol table\n");
 425                         return -ENOMEM;
 426                 }
 427
 428                 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
 429                 dsize   = code->size * 4;
 430                 dev_dbg(chip->card->dev,
 431                         "dsp_spos: downloading code to chip (%08x-%08x)\n",
 432                             doffset,doffset + dsize);
 433
 434                 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
 435
 436                 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
 437                         dev_err(chip->card->dev,
 438                                 "dsp_spos: failed to download code to DSP\n");
 439                         return -EINVAL;
 440                 }
 441
 442                 ins->code.offset += code->size;
 443         }
 444
 445         /* NOTE: module segments and symbol table must be
 446            statically allocated. Case that module data is
 447            not generated by the ospparser */
 448         ins->modules[ins->nmodules] = *module;
 449         ins->nmodules++;
 450
 451         return 0;
 452 }
 453
 454 struct dsp_symbol_entry *
 455 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
 456 {
 457         int i;
 458         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 459
 460         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 461
 462                 if (ins->symbol_table.symbols[i].deleted)
 463                         continue;
 464
 465                 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
 466                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 467                         return (ins->symbol_table.symbols + i);
 468                 }
 469         }
 470
 471 #if 0
 472         dev_err(chip->card->dev, "dsp_spos: symbol <%s> type %02x not found\n",
 473                 symbol_name,symbol_type);
 474 #endif
 475
 476         return NULL;
 477 }
 478
 479
 480 #ifdef CONFIG_SND_PROC_FS
 481 static struct dsp_symbol_entry *
 482 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
 483 {
 484         int i;
 485         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 486
 487         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 488
 489                 if (ins->symbol_table.symbols[i].deleted)
 490                         continue;
 491
 492                 if (ins->symbol_table.symbols[i].address == address &&
 493                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 494                         return (ins->symbol_table.symbols + i);
 495                 }
 496         }
 497
 498
 499         return NULL;
 500 }
 501
 502
 503 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
 504                                                struct snd_info_buffer *buffer)
 505 {
 506         struct snd_cs46xx *chip = entry->private_data;
 507         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 508         int i;
 509
 510         snd_iprintf(buffer, "SYMBOLS:\n");
 511         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 512                 char *module_str = "system";
 513
 514                 if (ins->symbol_table.symbols[i].deleted)
 515                         continue;
 516
 517                 if (ins->symbol_table.symbols[i].module != NULL) {
 518                         module_str = ins->symbol_table.symbols[i].module->module_name;
 519                 }
 520
 521
 522                 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
 523                             ins->symbol_table.symbols[i].address,
 524                             ins->symbol_table.symbols[i].symbol_type,
 525                             ins->symbol_table.symbols[i].symbol_name,
 526                             module_str);
 527         }
 528 }
 529
 530
 531 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
 532                                           struct snd_info_buffer *buffer)
 533 {
 534         struct snd_cs46xx *chip = entry->private_data;
 535         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 536         int i,j;
 537
 538         mutex_lock(&chip->spos_mutex);
 539         snd_iprintf(buffer, "MODULES:\n");
 540         for ( i = 0; i < ins->nmodules; ++i ) {
 541                 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
 542                 snd_iprintf(buffer, "   %d symbols\n", ins->modules[i].symbol_table.nsymbols);
 543                 snd_iprintf(buffer, "   %d fixups\n", ins->modules[i].nfixups);
 544
 545                 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
 546                         struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
 547                         snd_iprintf(buffer, "   segment %02x offset %08x size %08x\n",
 548                                     desc->segment_type,desc->offset, desc->size);
 549                 }
 550         }
 551         mutex_unlock(&chip->spos_mutex);
 552 }
 553
 554 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
 555                                             struct snd_info_buffer *buffer)
 556 {
 557         struct snd_cs46xx *chip = entry->private_data;
 558         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 559         int i, j, col;
 560         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 561
 562         mutex_lock(&chip->spos_mutex);
 563         snd_iprintf(buffer, "TASK TREES:\n");
 564         for ( i = 0; i < ins->ntask; ++i) {
 565                 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
 566
 567                 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
 568                         u32 val;
 569                         if (col == 4) {
 570                                 snd_iprintf(buffer,"\n");
 571                                 col = 0;
 572                         }
 573                         val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
 574                         snd_iprintf(buffer,"%08x ",val);
 575                 }
 576         }
 577
 578         snd_iprintf(buffer,"\n");
 579         mutex_unlock(&chip->spos_mutex);
 580 }
 581
 582 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
 583                                       struct snd_info_buffer *buffer)
 584 {
 585         struct snd_cs46xx *chip = entry->private_data;
 586         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 587         int i;
 588
 589         mutex_lock(&chip->spos_mutex);
 590         snd_iprintf(buffer, "SCB's:\n");
 591         for ( i = 0; i < ins->nscb; ++i) {
 592                 if (ins->scbs[i].deleted)
 593                         continue;
 594                 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
 595
 596                 if (ins->scbs[i].parent_scb_ptr != NULL) {
 597                         snd_iprintf(buffer,"parent [%s:%04x] ",
 598                                     ins->scbs[i].parent_scb_ptr->scb_name,
 599                                     ins->scbs[i].parent_scb_ptr->address);
 600                 } else snd_iprintf(buffer,"parent [none] ");
 601
 602                 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x]  task_entry [%s:%04x]\n",
 603                             ins->scbs[i].sub_list_ptr->scb_name,
 604                             ins->scbs[i].sub_list_ptr->address,
 605                             ins->scbs[i].next_scb_ptr->scb_name,
 606                             ins->scbs[i].next_scb_ptr->address,
 607                             ins->scbs[i].task_entry->symbol_name,
 608                             ins->scbs[i].task_entry->address);
 609         }
 610
 611         snd_iprintf(buffer,"\n");
 612         mutex_unlock(&chip->spos_mutex);
 613 }
 614
 615 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
 616                                                  struct snd_info_buffer *buffer)
 617 {
 618         struct snd_cs46xx *chip = entry->private_data;
 619         /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
 620         unsigned int i, col = 0;
 621         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 622         struct dsp_symbol_entry * symbol;
 623
 624         for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
 625                 if (col == 4) {
 626                         snd_iprintf(buffer,"\n");
 627                         col = 0;
 628                 }
 629
 630                 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
 631                         col = 0;
 632                         snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
 633                 }
 634
 635                 if (col == 0) {
 636                         snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
 637                 }
 638
 639                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 640         }
 641 }
 642
 643 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
 644                                               struct snd_info_buffer *buffer)
 645 {
 646         struct snd_cs46xx *chip = entry->private_data;
 647         int i,col = 0;
 648         void __iomem *dst = chip->region.idx[2].remap_addr;
 649
 650         snd_iprintf(buffer,"PCMREADER:\n");
 651         for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
 652                 if (col == 4) {
 653                         snd_iprintf(buffer,"\n");
 654                         col = 0;
 655                 }
 656
 657                 if (col == 0) {
 658                         snd_iprintf(buffer, "%04X ",i);
 659                 }
 660
 661                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 662         }
 663
 664         snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
 665
 666         col = 0;
 667         for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
 668                 if (col == 4) {
 669                         snd_iprintf(buffer,"\n");
 670                         col = 0;
 671                 }
 672
 673                 if (col == 0) {
 674                         snd_iprintf(buffer, "%04X ",i);
 675                 }
 676
 677                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 678         }
 679
 680         snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
 681         col = 0;
 682         for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
 683                 if (col == 4) {
 684                         snd_iprintf(buffer,"\n");
 685                         col = 0;
 686                 }
 687
 688                 if (col == 0) {
 689                         snd_iprintf(buffer, "%04X ",i);
 690                 }
 691
 692                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 693         }
 694
 695
 696         snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
 697         col = 0;
 698         for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
 699                 if (col == 4) {
 700                         snd_iprintf(buffer,"\n");
 701                         col = 0;
 702                 }
 703
 704                 if (col == 0) {
 705                         snd_iprintf(buffer, "%04X ",i);
 706                 }
 707
 708                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 709         }
 710
 711         snd_iprintf(buffer,"\n...\n");
 712         col = 0;
 713
 714         for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
 715                 if (col == 4) {
 716                         snd_iprintf(buffer,"\n");
 717                         col = 0;
 718                 }
 719
 720                 if (col == 0) {
 721                         snd_iprintf(buffer, "%04X ",i);
 722                 }
 723
 724                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 725         }
 726
 727
 728         snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
 729         col = 0;
 730         for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
 731                 if (col == 4) {
 732                         snd_iprintf(buffer,"\n");
 733                         col = 0;
 734                 }
 735
 736                 if (col == 0) {
 737                         snd_iprintf(buffer, "%04X ",i);
 738                 }
 739
 740                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 741         }
 742
 743         snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
 744         col = 0;
 745         for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
 746                 if (col == 4) {
 747                         snd_iprintf(buffer,"\n");
 748                         col = 0;
 749                 }
 750
 751                 if (col == 0) {
 752                         snd_iprintf(buffer, "%04X ",i);
 753                 }
 754
 755                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 756         }
 757 #if 0
 758         snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
 759         col = 0;
 760         for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
 761                 if (col == 4) {
 762                         snd_iprintf(buffer,"\n");
 763                         col = 0;
 764                 }
 765
 766                 if (col == 0) {
 767                         snd_iprintf(buffer, "%04X ",i);
 768                 }
 769
 770                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 771         }
 772 #endif
 773
 774         snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
 775         col = 0;
 776         for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
 777                 if (col == 4) {
 778                         snd_iprintf(buffer,"\n");
 779                         col = 0;
 780                 }
 781
 782                 if (col == 0) {
 783                         snd_iprintf(buffer, "%04X ",i);
 784                 }
 785
 786                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 787         }
 788         snd_iprintf(buffer,"\n");
 789 }
 790
 791 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
 792 {
 793         struct snd_info_entry *entry;
 794         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 795         int i;
 796
 797         ins->snd_card = card;
 798
 799         if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
 800                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 801                 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
 802
 803                 if (snd_info_register(entry) < 0) {
 804                         snd_info_free_entry(entry);
 805                         entry = NULL;
 806                 }
 807         }
 808
 809         ins->proc_dsp_dir = entry;
 810
 811         if (!ins->proc_dsp_dir)
 812                 return -ENOMEM;
 813
 814         if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
 815                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 816                 entry->private_data = chip;
 817                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 818                 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
 819                 if (snd_info_register(entry) < 0) {
 820                         snd_info_free_entry(entry);
 821                         entry = NULL;
 822                 }
 823         }
 824         ins->proc_sym_info_entry = entry;
 825
 826         if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
 827                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 828                 entry->private_data = chip;
 829                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 830                 entry->c.text.read = cs46xx_dsp_proc_modules_read;
 831                 if (snd_info_register(entry) < 0) {
 832                         snd_info_free_entry(entry);
 833                         entry = NULL;
 834                 }
 835         }
 836         ins->proc_modules_info_entry = entry;
 837
 838         if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
 839                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 840                 entry->private_data = chip;
 841                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 842                 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
 843                 if (snd_info_register(entry) < 0) {
 844                         snd_info_free_entry(entry);
 845                         entry = NULL;
 846                 }
 847         }
 848         ins->proc_parameter_dump_info_entry = entry;
 849
 850         if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
 851                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 852                 entry->private_data = chip;
 853                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 854                 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
 855                 if (snd_info_register(entry) < 0) {
 856                         snd_info_free_entry(entry);
 857                         entry = NULL;
 858                 }
 859         }
 860         ins->proc_sample_dump_info_entry = entry;
 861
 862         if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
 863                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 864                 entry->private_data = chip;
 865                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 866                 entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
 867                 if (snd_info_register(entry) < 0) {
 868                         snd_info_free_entry(entry);
 869                         entry = NULL;
 870                 }
 871         }
 872         ins->proc_task_info_entry = entry;
 873
 874         if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
 875                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 876                 entry->private_data = chip;
 877                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 878                 entry->c.text.read = cs46xx_dsp_proc_scb_read;
 879                 if (snd_info_register(entry) < 0) {
 880                         snd_info_free_entry(entry);
 881                         entry = NULL;
 882                 }
 883         }
 884         ins->proc_scb_info_entry = entry;
 885
 886         mutex_lock(&chip->spos_mutex);
 887         /* register/update SCB's entries on proc */
 888         for (i = 0; i < ins->nscb; ++i) {
 889                 if (ins->scbs[i].deleted) continue;
 890
 891                 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
 892         }
 893         mutex_unlock(&chip->spos_mutex);
 894
 895         return 0;
 896 }
 897
 898 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
 899 {
 900         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 901         int i;
 902
 903         if (!ins)
 904                 return 0;
 905
 906         snd_info_free_entry(ins->proc_sym_info_entry);
 907         ins->proc_sym_info_entry = NULL;
 908
 909         snd_info_free_entry(ins->proc_modules_info_entry);
 910         ins->proc_modules_info_entry = NULL;
 911
 912         snd_info_free_entry(ins->proc_parameter_dump_info_entry);
 913         ins->proc_parameter_dump_info_entry = NULL;
 914
 915         snd_info_free_entry(ins->proc_sample_dump_info_entry);
 916         ins->proc_sample_dump_info_entry = NULL;
 917
 918         snd_info_free_entry(ins->proc_scb_info_entry);
 919         ins->proc_scb_info_entry = NULL;
 920
 921         snd_info_free_entry(ins->proc_task_info_entry);
 922         ins->proc_task_info_entry = NULL;
 923
 924         mutex_lock(&chip->spos_mutex);
 925         for (i = 0; i < ins->nscb; ++i) {
 926                 if (ins->scbs[i].deleted) continue;
 927                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 928         }
 929         mutex_unlock(&chip->spos_mutex);
 930
 931         snd_info_free_entry(ins->proc_dsp_dir);
 932         ins->proc_dsp_dir = NULL;
 933
 934         return 0;
 935 }
 936 #endif /* CONFIG_SND_PROC_FS */
 937
 938 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
 939                                    u32  dest, int size)
 940 {
 941         void __iomem *spdst = chip->region.idx[1].remap_addr +
 942                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 943         int i;
 944
 945         for (i = 0; i < size; ++i) {
 946                 dev_dbg(chip->card->dev, "addr %p, val %08x\n",
 947                         spdst, task_data[i]);
 948                 writel(task_data[i],spdst);
 949                 spdst += sizeof(u32);
 950         }
 951 }
 952
 953 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
 954 {
 955         void __iomem *spdst = chip->region.idx[1].remap_addr +
 956                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 957         int i;
 958
 959         for (i = 0; i < 0x10; ++i) {
 960                 dev_dbg(chip->card->dev, "addr %p, val %08x\n",
 961                         spdst, scb_data[i]);
 962                 writel(scb_data[i],spdst);
 963                 spdst += sizeof(u32);
 964         }
 965 }
 966
 967 static int find_free_scb_index (struct dsp_spos_instance * ins)
 968 {
 969         int index = ins->nscb, i;
 970
 971         for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
 972                 if (ins->scbs[i].deleted) {
 973                         index = i;
 974                         break;
 975                 }
 976         }
 977
 978         return index;
 979 }
 980
 981 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
 982 {
 983         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 984         struct dsp_scb_descriptor * desc = NULL;
 985         int index;
 986
 987         if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
 988                 dev_err(chip->card->dev,
 989                         "dsp_spos: got no place for other SCB\n");
 990                 return NULL;
 991         }
 992
 993         index = find_free_scb_index (ins);
 994
 995         memset(&ins->scbs[index], 0, sizeof(ins->scbs[index]));
 996         strcpy(ins->scbs[index].scb_name, name);
 997         ins->scbs[index].address = dest;
 998         ins->scbs[index].index = index;
 999         ins->scbs[index].ref_count = 1;
1000
1001         desc = (ins->scbs + index);
1002         ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
1003
1004         if (index > ins->scb_highest_frag_index)
1005                 ins->scb_highest_frag_index = index;
1006
1007         if (index == ins->nscb)
1008                 ins->nscb++;
1009
1010         return desc;
1011 }
1012
1013 static struct dsp_task_descriptor *
1014 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
1015 {
1016         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1017         struct dsp_task_descriptor * desc = NULL;
1018
1019         if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
1020                 dev_err(chip->card->dev,
1021                         "dsp_spos: got no place for other TASK\n");
1022                 return NULL;
1023         }
1024
1025         if (name)
1026                 strcpy(ins->tasks[ins->ntask].task_name, name);
1027         else
1028                 strcpy(ins->tasks[ins->ntask].task_name, "(NULL)");
1029         ins->tasks[ins->ntask].address = dest;
1030         ins->tasks[ins->ntask].size = size;
1031
1032         /* quick find in list */
1033         ins->tasks[ins->ntask].index = ins->ntask;
1034         desc = (ins->tasks + ins->ntask);
1035         ins->ntask++;
1036
1037         if (name)
1038                 add_symbol (chip,name,dest,SYMBOL_PARAMETER);
1039         return desc;
1040 }
1041
1042 #define SCB_BYTES       (0x10 * 4)
1043
1044 struct dsp_scb_descriptor *
1045 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
1046 {
1047         struct dsp_scb_descriptor * desc;
1048
1049 #ifdef CONFIG_PM_SLEEP
1050         /* copy the data for resume */
1051         scb_data = kmemdup(scb_data, SCB_BYTES, GFP_KERNEL);
1052         if (!scb_data)
1053                 return NULL;
1054 #endif
1055
1056         desc = _map_scb (chip,name,dest);
1057         if (desc) {
1058                 desc->data = scb_data;
1059                 _dsp_create_scb(chip,scb_data,dest);
1060         } else {
1061                 dev_err(chip->card->dev, "dsp_spos: failed to map SCB\n");
1062 #ifdef CONFIG_PM_SLEEP
1063                 kfree(scb_data);
1064 #endif
1065         }
1066
1067         return desc;
1068 }
1069
1070
1071 static struct dsp_task_descriptor *
1072 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
1073                              u32 dest, int size)
1074 {
1075         struct dsp_task_descriptor * desc;
1076
1077         desc = _map_task_tree (chip,name,dest,size);
1078         if (desc) {
1079                 desc->data = task_data;
1080                 _dsp_create_task_tree(chip,task_data,dest,size);
1081         } else {
1082                 dev_err(chip->card->dev, "dsp_spos: failed to map TASK\n");
1083         }
1084
1085         return desc;
1086 }
1087
1088 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1089 {
1090         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1091         struct dsp_symbol_entry * fg_task_tree_header_code;
1092         struct dsp_symbol_entry * task_tree_header_code;
1093         struct dsp_symbol_entry * task_tree_thread;
1094         struct dsp_symbol_entry * null_algorithm;
1095         struct dsp_symbol_entry * magic_snoop_task;
1096
1097         struct dsp_scb_descriptor * timing_master_scb;
1098         struct dsp_scb_descriptor * codec_out_scb;
1099         struct dsp_scb_descriptor * codec_in_scb;
1100         struct dsp_scb_descriptor * src_task_scb;
1101         struct dsp_scb_descriptor * master_mix_scb;
1102         struct dsp_scb_descriptor * rear_mix_scb;
1103         struct dsp_scb_descriptor * record_mix_scb;
1104         struct dsp_scb_descriptor * write_back_scb;
1105         struct dsp_scb_descriptor * vari_decimate_scb;
1106         struct dsp_scb_descriptor * rear_codec_out_scb;
1107         struct dsp_scb_descriptor * clfe_codec_out_scb;
1108         struct dsp_scb_descriptor * magic_snoop_scb;
1109
1110         int fifo_addr, fifo_span, valid_slots;
1111
1112         static struct dsp_spos_control_block sposcb = {
1113                 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1114                 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1115                 /* 2 */ DSP_SPOS_DC,0,
1116                 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1117                 /* 4 */ 0,0,
1118                 /* 5 */ DSP_SPOS_UU,0,
1119                 /* 6 */ FG_TASK_HEADER_ADDR,0,
1120                 /* 7 */ 0,0,
1121                 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1122                 /* 9 */ 0,
1123                 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1124                 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1125                 /* C */ DSP_SPOS_DC_DC,
1126                 /* D */ DSP_SPOS_DC_DC,
1127                 /* E */ DSP_SPOS_DC_DC,
1128                 /* F */ DSP_SPOS_DC_DC
1129         };
1130
1131         cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1132
1133         null_algorithm  = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1134         if (null_algorithm == NULL) {
1135                 dev_err(chip->card->dev,
1136                         "dsp_spos: symbol NULLALGORITHM not found\n");
1137                 return -EIO;
1138         }
1139
1140         fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
1141         if (fg_task_tree_header_code == NULL) {
1142                 dev_err(chip->card->dev,
1143                         "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1144                 return -EIO;
1145         }
1146
1147         task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
1148         if (task_tree_header_code == NULL) {
1149                 dev_err(chip->card->dev,
1150                         "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1151                 return -EIO;
1152         }
1153
1154         task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1155         if (task_tree_thread == NULL) {
1156                 dev_err(chip->card->dev,
1157                         "dsp_spos: symbol TASKTREETHREAD not found\n");
1158                 return -EIO;
1159         }
1160
1161         magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1162         if (magic_snoop_task == NULL) {
1163                 dev_err(chip->card->dev,
1164                         "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1165                 return -EIO;
1166         }
1167
1168         {
1169                 /* create the null SCB */
1170                 static struct dsp_generic_scb null_scb = {
1171                         { 0, 0, 0, 0 },
1172                         { 0, 0, 0, 0, 0 },
1173                         NULL_SCB_ADDR, NULL_SCB_ADDR,
1174                         0, 0, 0, 0, 0,
1175                         {
1176                                 0,0,
1177                                 0,0,
1178                         }
1179                 };
1180
1181                 null_scb.entry_point = null_algorithm->address;
1182                 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1183                 ins->the_null_scb->task_entry = null_algorithm;
1184                 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1185                 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1186                 ins->the_null_scb->parent_scb_ptr = NULL;
1187                 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1188         }
1189
1190         {
1191                 /* setup foreground task tree */
1192                 static struct dsp_task_tree_control_block fg_task_tree_hdr =  {
1193                         { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1194                           DSP_SPOS_DC_DC,
1195                           DSP_SPOS_DC_DC,
1196                           0x0000,DSP_SPOS_DC,
1197                           DSP_SPOS_DC, DSP_SPOS_DC,
1198                           DSP_SPOS_DC_DC,
1199                           DSP_SPOS_DC_DC,
1200                           DSP_SPOS_DC_DC,
1201                           DSP_SPOS_DC,DSP_SPOS_DC },
1202
1203                         {
1204                                 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
1205                                 0,
1206                                 FG_TASK_HEADER_ADDR + TCBData,
1207                         },
1208
1209                         {
1210                                 4,0,
1211                                 1,0,
1212                                 2,SPOSCB_ADDR + HFGFlags,
1213                                 0,0,
1214                                 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1215                         },
1216
1217                         {
1218                                 DSP_SPOS_DC,0,
1219                                 DSP_SPOS_DC,DSP_SPOS_DC,
1220                                 DSP_SPOS_DC,DSP_SPOS_DC,
1221                                 DSP_SPOS_DC,DSP_SPOS_DC,
1222                                 DSP_SPOS_DC,DSP_SPOS_DC,
1223                                 DSP_SPOS_DCDC,
1224                                 DSP_SPOS_UU,1,
1225                                 DSP_SPOS_DCDC,
1226                                 DSP_SPOS_DCDC,
1227                                 DSP_SPOS_DCDC,
1228                                 DSP_SPOS_DCDC,
1229                                 DSP_SPOS_DCDC,
1230                                 DSP_SPOS_DCDC,
1231                                 DSP_SPOS_DCDC,
1232                                 DSP_SPOS_DCDC,
1233                                 DSP_SPOS_DCDC,
1234                                 DSP_SPOS_DCDC,
1235                                 DSP_SPOS_DCDC,
1236                                 DSP_SPOS_DCDC,
1237                                 DSP_SPOS_DCDC,
1238                                 DSP_SPOS_DCDC,
1239                                 DSP_SPOS_DCDC,
1240                                 DSP_SPOS_DCDC,
1241                                 DSP_SPOS_DCDC,
1242                                 DSP_SPOS_DCDC,
1243                                 DSP_SPOS_DCDC,
1244                                 DSP_SPOS_DCDC,
1245                                 DSP_SPOS_DCDC,
1246                                 DSP_SPOS_DCDC,
1247                                 DSP_SPOS_DCDC,
1248                                 DSP_SPOS_DCDC,
1249                                 DSP_SPOS_DCDC,
1250                                 DSP_SPOS_DCDC,
1251                                 DSP_SPOS_DCDC,
1252                                 DSP_SPOS_DCDC
1253                         },
1254                         {
1255                                 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1256                                 0,0
1257                         }
1258                 };
1259
1260                 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1261                 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1262                 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1263         }
1264
1265
1266         {
1267                 /* setup foreground task tree */
1268                 static struct dsp_task_tree_control_block bg_task_tree_hdr =  {
1269                         { DSP_SPOS_DC_DC,
1270                           DSP_SPOS_DC_DC,
1271                           DSP_SPOS_DC_DC,
1272                           DSP_SPOS_DC, DSP_SPOS_DC,
1273                           DSP_SPOS_DC, DSP_SPOS_DC,
1274                           DSP_SPOS_DC_DC,
1275                           DSP_SPOS_DC_DC,
1276                           DSP_SPOS_DC_DC,
1277                           DSP_SPOS_DC,DSP_SPOS_DC },
1278
1279                         {
1280                                 NULL_SCB_ADDR,NULL_SCB_ADDR,  /* Set up the background to do nothing */
1281                                 0,
1282                                 BG_TREE_SCB_ADDR + TCBData,
1283                         },
1284
1285                         {
1286                                 9999,0,
1287                                 0,1,
1288                                 0,SPOSCB_ADDR + HFGFlags,
1289                                 0,0,
1290                                 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1291                         },
1292
1293                         {
1294                                 DSP_SPOS_DC,0,
1295                                 DSP_SPOS_DC,DSP_SPOS_DC,
1296                                 DSP_SPOS_DC,DSP_SPOS_DC,
1297                                 DSP_SPOS_DC,DSP_SPOS_DC,
1298                                 DSP_SPOS_DC,DSP_SPOS_DC,
1299                                 DSP_SPOS_DCDC,
1300                                 DSP_SPOS_UU,1,
1301                                 DSP_SPOS_DCDC,
1302                                 DSP_SPOS_DCDC,
1303                                 DSP_SPOS_DCDC,
1304                                 DSP_SPOS_DCDC,
1305                                 DSP_SPOS_DCDC,
1306                                 DSP_SPOS_DCDC,
1307                                 DSP_SPOS_DCDC,
1308                                 DSP_SPOS_DCDC,
1309                                 DSP_SPOS_DCDC,
1310                                 DSP_SPOS_DCDC,
1311                                 DSP_SPOS_DCDC,
1312                                 DSP_SPOS_DCDC,
1313                                 DSP_SPOS_DCDC,
1314                                 DSP_SPOS_DCDC,
1315                                 DSP_SPOS_DCDC,
1316                                 DSP_SPOS_DCDC,
1317                                 DSP_SPOS_DCDC,
1318                                 DSP_SPOS_DCDC,
1319                                 DSP_SPOS_DCDC,
1320                                 DSP_SPOS_DCDC,
1321                                 DSP_SPOS_DCDC,
1322                                 DSP_SPOS_DCDC,
1323                                 DSP_SPOS_DCDC,
1324                                 DSP_SPOS_DCDC,
1325                                 DSP_SPOS_DCDC,
1326                                 DSP_SPOS_DCDC,
1327                                 DSP_SPOS_DCDC,
1328                                 DSP_SPOS_DCDC
1329                         },
1330                         {
1331                                 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1332                                 0,0
1333                         }
1334                 };
1335
1336                 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1337                 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1338                 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1339         }
1340
1341         /* create timing master SCB */
1342         timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1343
1344         /* create the CODEC output task */
1345         codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1346                                                         MASTERMIX_SCB_ADDR,
1347                                                         CODECOUT_SCB_ADDR,timing_master_scb,
1348                                                         SCB_ON_PARENT_SUBLIST_SCB);
1349
1350         if (!codec_out_scb) goto _fail_end;
1351         /* create the master mix SCB */
1352         master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1353                                                         MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1354                                                         codec_out_scb,
1355                                                         SCB_ON_PARENT_SUBLIST_SCB);
1356         ins->master_mix_scb = master_mix_scb;
1357
1358         if (!master_mix_scb) goto _fail_end;
1359
1360         /* create codec in */
1361         codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1362                                                       CODEC_INPUT_BUF1,
1363                                                       CODECIN_SCB_ADDR,codec_out_scb,
1364                                                       SCB_ON_PARENT_NEXT_SCB);
1365         if (!codec_in_scb) goto _fail_end;
1366         ins->codec_in_scb = codec_in_scb;
1367
1368         /* create write back scb */
1369         write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1370                                                               WRITE_BACK_BUF1,WRITE_BACK_SPB,
1371                                                               WRITEBACK_SCB_ADDR,
1372                                                               timing_master_scb,
1373                                                               SCB_ON_PARENT_NEXT_SCB);
1374         if (!write_back_scb) goto _fail_end;
1375
1376         {
1377                 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1378                         0x00020000,
1379                         0x0000ffff
1380                 };
1381
1382                 if (!cs46xx_dsp_create_task_tree(chip, NULL,
1383                                                  (u32 *)&mix2_ostream_spb,
1384                                                  WRITE_BACK_SPB, 2))
1385                         goto _fail_end;
1386         }
1387
1388         /* input sample converter */
1389         vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1390                                                                 VARI_DECIMATE_BUF0,
1391                                                                 VARI_DECIMATE_BUF1,
1392                                                                 VARIDECIMATE_SCB_ADDR,
1393                                                                 write_back_scb,
1394                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1395         if (!vari_decimate_scb) goto _fail_end;
1396
1397         /* create the record mixer SCB */
1398         record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1399                                                         MIX_SAMPLE_BUF2,
1400                                                         RECORD_MIXER_SCB_ADDR,
1401                                                         vari_decimate_scb,
1402                                                         SCB_ON_PARENT_SUBLIST_SCB);
1403         ins->record_mixer_scb = record_mix_scb;
1404
1405         if (!record_mix_scb) goto _fail_end;
1406
1407         valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1408
1409         if (snd_BUG_ON(chip->nr_ac97_codecs != 1 && chip->nr_ac97_codecs != 2))
1410                 goto _fail_end;
1411
1412         if (chip->nr_ac97_codecs == 1) {
1413                 /* output on slot 5 and 11
1414                    on primary CODEC */
1415                 fifo_addr = 0x20;
1416                 fifo_span = 0x60;
1417
1418                 /* enable slot 5 and 11 */
1419                 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1420         } else {
1421                 /* output on slot 7 and 8
1422                    on secondary CODEC */
1423                 fifo_addr = 0x40;
1424                 fifo_span = 0x10;
1425
1426                 /* enable slot 7 and 8 */
1427                 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1428         }
1429         /* create CODEC tasklet for rear speakers output*/
1430         rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1431                                                              REAR_MIXER_SCB_ADDR,
1432                                                              REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1433                                                              SCB_ON_PARENT_NEXT_SCB);
1434         if (!rear_codec_out_scb) goto _fail_end;
1435
1436
1437         /* create the rear PCM channel  mixer SCB */
1438         rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1439                                                       MIX_SAMPLE_BUF3,
1440                                                       REAR_MIXER_SCB_ADDR,
1441                                                       rear_codec_out_scb,
1442                                                       SCB_ON_PARENT_SUBLIST_SCB);
1443         ins->rear_mix_scb = rear_mix_scb;
1444         if (!rear_mix_scb) goto _fail_end;
1445
1446         if (chip->nr_ac97_codecs == 2) {
1447                 /* create CODEC tasklet for rear Center/LFE output
1448                    slot 6 and 9 on secondary CODEC */
1449                 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1450                                                                      CLFE_MIXER_SCB_ADDR,
1451                                                                      CLFE_CODEC_SCB_ADDR,
1452                                                                      rear_codec_out_scb,
1453                                                                      SCB_ON_PARENT_NEXT_SCB);
1454                 if (!clfe_codec_out_scb) goto _fail_end;
1455
1456
1457                 /* create the rear PCM channel  mixer SCB */
1458                 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1459                                                                          MIX_SAMPLE_BUF4,
1460                                                                          CLFE_MIXER_SCB_ADDR,
1461                                                                          clfe_codec_out_scb,
1462                                                                          SCB_ON_PARENT_SUBLIST_SCB);
1463                 if (!ins->center_lfe_mix_scb) goto _fail_end;
1464
1465                 /* enable slot 6 and 9 */
1466                 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1467         } else {
1468                 clfe_codec_out_scb = rear_codec_out_scb;
1469                 ins->center_lfe_mix_scb = rear_mix_scb;
1470         }
1471
1472         /* enable slots depending on CODEC configuration */
1473         snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1474
1475         /* the magic snooper */
1476         magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1477                                                              OUTPUT_SNOOP_BUFFER,
1478                                                              codec_out_scb,
1479                                                              clfe_codec_out_scb,
1480                                                              SCB_ON_PARENT_NEXT_SCB);
1481
1482
1483         if (!magic_snoop_scb) goto _fail_end;
1484         ins->ref_snoop_scb = magic_snoop_scb;
1485
1486         /* SP IO access */
1487         if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1488                                               magic_snoop_scb,
1489                                               SCB_ON_PARENT_NEXT_SCB))
1490                 goto _fail_end;
1491
1492         /* SPDIF input sampel rate converter */
1493         src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1494                                                       ins->spdif_in_sample_rate,
1495                                                       SRC_OUTPUT_BUF1,
1496                                                       SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1497                                                       master_mix_scb,
1498                                                       SCB_ON_PARENT_SUBLIST_SCB,1);
1499
1500         if (!src_task_scb) goto _fail_end;
1501         cs46xx_src_unlink(chip,src_task_scb);
1502
1503         /* NOTE: when we now how to detect the SPDIF input
1504            sample rate we will use this SRC to adjust it */
1505         ins->spdif_in_src = src_task_scb;
1506
1507         cs46xx_dsp_async_init(chip,timing_master_scb);
1508         return 0;
1509
1510  _fail_end:
1511         dev_err(chip->card->dev, "dsp_spos: failed to setup SCB's in DSP\n");
1512         return -EINVAL;
1513 }
1514
1515 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1516                                   struct dsp_scb_descriptor * fg_entry)
1517 {
1518         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1519         struct dsp_symbol_entry * s16_async_codec_input_task;
1520         struct dsp_symbol_entry * spdifo_task;
1521         struct dsp_symbol_entry * spdifi_task;
1522         struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1523
1524         s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1525         if (s16_async_codec_input_task == NULL) {
1526                 dev_err(chip->card->dev,
1527                         "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1528                 return -EIO;
1529         }
1530         spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1531         if (spdifo_task == NULL) {
1532                 dev_err(chip->card->dev,
1533                         "dsp_spos: symbol SPDIFOTASK not found\n");
1534                 return -EIO;
1535         }
1536
1537         spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1538         if (spdifi_task == NULL) {
1539                 dev_err(chip->card->dev,
1540                         "dsp_spos: symbol SPDIFITASK not found\n");
1541                 return -EIO;
1542         }
1543
1544         {
1545                 /* 0xBC0 */
1546                 struct dsp_spdifoscb spdifo_scb = {
1547                         /* 0 */ DSP_SPOS_UUUU,
1548                         {
1549                                 /* 1 */ 0xb0,
1550                                 /* 2 */ 0,
1551                                 /* 3 */ 0,
1552                                 /* 4 */ 0,
1553                         },
1554                         /* NOTE: the SPDIF output task read samples in mono
1555                            format, the AsynchFGTxSCB task writes to buffer
1556                            in stereo format
1557                         */
1558                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1559                         /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 )  |  0xFFFC,
1560                         /* 7 */ 0,0,
1561                         /* 8 */ 0,
1562                         /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
1563                         /* A */ spdifo_task->address,
1564                         SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1565                         {
1566                                 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1567                                 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1568                         },
1569                         /* D */ 0x804c,0,                                                         /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1570                         /* E */ 0x0108,0x0001,                                    /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1571                         /* F */ DSP_SPOS_UUUU                                     /* SPDIFOFree; */
1572                 };
1573
1574                 /* 0xBB0 */
1575                 struct dsp_spdifiscb spdifi_scb = {
1576                         /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1577                         /* 1 */ 0,
1578                         /* 2 */ 0,
1579                         /* 3 */ 1,4000,        /* SPDIFICountLimit SPDIFICount */
1580                         /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1581                         /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1582                         /* 6 */ DSP_SPOS_UUUU,  /* Free3 */
1583                         /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC,  /* Free2 BitCount*/
1584                         /* 8 */ DSP_SPOS_UUUU,  /* TempStatus */
1585                         /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1586                         /* A */ spdifi_task->address,
1587                         SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1588                         /* NOTE: The SPDIF input task write the sample in mono
1589                            format from the HW FIFO, the AsynchFGRxSCB task  reads
1590                            them in stereo
1591                         */
1592                         /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1593                         /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1594                         /* D */ 0x8048,0,
1595                         /* E */ 0x01f0,0x0001,
1596                         /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1597                 };
1598
1599                 /* 0xBA0 */
1600                 struct dsp_async_codec_input_scb async_codec_input_scb = {
1601                         /* 0 */ DSP_SPOS_UUUU,
1602                         /* 1 */ 0,
1603                         /* 2 */ 0,
1604                         /* 3 */ 1,4000,
1605                         /* 4 */ 0x0118,0x0001,
1606                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1607                         /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1608                         /* 7 */ DSP_SPOS_UU,0x3,
1609                         /* 8 */ DSP_SPOS_UUUU,
1610                         /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1611                         /* A */ s16_async_codec_input_task->address,
1612                         HFG_TREE_SCB + AsyncCIOFIFOPointer,
1613
1614                         /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1615                         /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10),  /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1616
1617 #ifdef UseASER1Input
1618                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1619                            Init. 0000:8042: for ASER1
1620                            0000:8044: for ASER2 */
1621                         /* D */ 0x8042,0,
1622
1623                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1624                            Init 1 stero:8050 ASER1
1625                            Init 0  mono:8070 ASER2
1626                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1627                         /* E */ 0x0100,0x0001,
1628
1629 #endif
1630
1631 #ifdef UseASER2Input
1632                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1633                            Init. 0000:8042: for ASER1
1634                            0000:8044: for ASER2 */
1635                         /* D */ 0x8044,0,
1636
1637                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1638                            Init 1 stero:8050 ASER1
1639                            Init 0  mono:8070 ASER2
1640                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1641                         /* E */ 0x0110,0x0001,
1642
1643 #endif
1644
1645                         /* short AsyncCIOutputBufModulo:AsyncCIFree;
1646                            AsyncCIOutputBufModulo: The modulo size for
1647                            the output buffer of this task */
1648                         /* F */ 0, /* DSP_SPOS_UUUU */
1649                 };
1650
1651                 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1652
1653                 if (snd_BUG_ON(!spdifo_scb_desc))
1654                         return -EIO;
1655                 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1656                 if (snd_BUG_ON(!spdifi_scb_desc))
1657                         return -EIO;
1658                 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1659                 if (snd_BUG_ON(!async_codec_scb_desc))
1660                         return -EIO;
1661
1662                 async_codec_scb_desc->parent_scb_ptr = NULL;
1663                 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1664                 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1665                 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1666
1667                 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1668                 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1669                 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1670                 spdifi_scb_desc->task_entry = spdifi_task;
1671
1672                 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1673                 spdifo_scb_desc->next_scb_ptr = fg_entry;
1674                 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1675                 spdifo_scb_desc->task_entry = spdifo_task;
1676
1677                 /* this one is faked, as the parnet of SPDIFO task
1678                    is the FG task tree */
1679                 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1680
1681                 /* for proc fs */
1682                 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1683                 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1684                 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1685
1686                 /* Async MASTER ENABLE, affects both SPDIF input and output */
1687                 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1688         }
1689
1690         return 0;
1691 }
1692
1693 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1694 {
1695         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1696
1697         /* set SPDIF output FIFO slot */
1698         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1699
1700         /* SPDIF output MASTER ENABLE */
1701         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1702
1703         /* right and left validate bit */
1704         /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1705         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1706
1707         /* clear fifo pointer */
1708         cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1709
1710         /* monitor state */
1711         ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1712 }
1713
1714 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1715 {
1716         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1717
1718         /* if hw-ctrl already enabled, turn off to reset logic ... */
1719         cs46xx_dsp_disable_spdif_hw (chip);
1720         udelay(50);
1721
1722         /* set SPDIF output FIFO slot */
1723         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1724
1725         /* SPDIF output MASTER ENABLE */
1726         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1727
1728         /* right and left validate bit */
1729         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1730
1731         /* monitor state */
1732         ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1733
1734         return 0;
1735 }
1736
1737 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1738 {
1739         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1740
1741         /* turn on amplifier */
1742         chip->active_ctrl(chip, 1);
1743         chip->amplifier_ctrl(chip, 1);
1744
1745         if (snd_BUG_ON(ins->asynch_rx_scb))
1746                 return -EINVAL;
1747         if (snd_BUG_ON(!ins->spdif_in_src))
1748                 return -EINVAL;
1749
1750         mutex_lock(&chip->spos_mutex);
1751
1752         if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1753                 /* time countdown enable */
1754                 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1755                 /* NOTE: 80000005 value is just magic. With all values
1756                    that I've tested this one seem to give the best result.
1757                    Got no explication why. (Benny) */
1758
1759                 /* SPDIF input MASTER ENABLE */
1760                 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1761
1762                 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1763         }
1764
1765         /* create and start the asynchronous receiver SCB */
1766         ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1767                                                                 ASYNCRX_SCB_ADDR,
1768                                                                 SPDIFI_SCB_INST,
1769                                                                 SPDIFI_IP_OUTPUT_BUFFER1,
1770                                                                 ins->spdif_in_src,
1771                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1772
1773         spin_lock_irq(&chip->reg_lock);
1774
1775         /* reset SPDIF input sample buffer pointer */
1776         /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1777           (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1778
1779         /* reset FIFO ptr */
1780         /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1781         cs46xx_src_link(chip,ins->spdif_in_src);
1782
1783         /* unmute SRC volume */
1784         cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1785
1786         spin_unlock_irq(&chip->reg_lock);
1787
1788         /* set SPDIF input sample rate and unmute
1789            NOTE: only 48khz support for SPDIF input this time */
1790         /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1791
1792         /* monitor state */
1793         ins->spdif_status_in = 1;
1794         mutex_unlock(&chip->spos_mutex);
1795
1796         return 0;
1797 }
1798
1799 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1800 {
1801         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1802
1803         if (snd_BUG_ON(!ins->asynch_rx_scb))
1804                 return -EINVAL;
1805         if (snd_BUG_ON(!ins->spdif_in_src))
1806                 return -EINVAL;
1807
1808         mutex_lock(&chip->spos_mutex);
1809
1810         /* Remove the asynchronous receiver SCB */
1811         cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
1812         ins->asynch_rx_scb = NULL;
1813
1814         cs46xx_src_unlink(chip,ins->spdif_in_src);
1815
1816         /* monitor state */
1817         ins->spdif_status_in = 0;
1818         mutex_unlock(&chip->spos_mutex);
1819
1820         /* restore amplifier */
1821         chip->active_ctrl(chip, -1);
1822         chip->amplifier_ctrl(chip, -1);
1823
1824         return 0;
1825 }
1826
1827 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1828 {
1829         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1830
1831         if (snd_BUG_ON(ins->pcm_input))
1832                 return -EINVAL;
1833         if (snd_BUG_ON(!ins->ref_snoop_scb))
1834                 return -EINVAL;
1835
1836         mutex_lock(&chip->spos_mutex);
1837         ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1838                                                   "PCMSerialInput_Wave");
1839         mutex_unlock(&chip->spos_mutex);
1840
1841         return 0;
1842 }
1843
1844 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1845 {
1846         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1847
1848         if (snd_BUG_ON(!ins->pcm_input))
1849                 return -EINVAL;
1850
1851         mutex_lock(&chip->spos_mutex);
1852         cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1853         ins->pcm_input = NULL;
1854         mutex_unlock(&chip->spos_mutex);
1855
1856         return 0;
1857 }
1858
1859 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1860 {
1861         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1862
1863         if (snd_BUG_ON(ins->adc_input))
1864                 return -EINVAL;
1865         if (snd_BUG_ON(!ins->codec_in_scb))
1866                 return -EINVAL;
1867
1868         mutex_lock(&chip->spos_mutex);
1869         ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1870                                                   "PCMSerialInput_ADC");
1871         mutex_unlock(&chip->spos_mutex);
1872
1873         return 0;
1874 }
1875
1876 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1877 {
1878         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1879
1880         if (snd_BUG_ON(!ins->adc_input))
1881                 return -EINVAL;
1882
1883         mutex_lock(&chip->spos_mutex);
1884         cs46xx_dsp_remove_scb (chip,ins->adc_input);
1885         ins->adc_input = NULL;
1886         mutex_unlock(&chip->spos_mutex);
1887
1888         return 0;
1889 }
1890
1891 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1892 {
1893         u32 temp;
1894         int  i;
1895
1896         /* santiy check the parameters.  (These numbers are not 100% correct.  They are
1897            a rough guess from looking at the controller spec.) */
1898         if (address < 0x8000 || address >= 0x9000)
1899                 return -EINVAL;
1900
1901         /* initialize the SP_IO_WRITE SCB with the data. */
1902         temp = ( address << 16 ) | ( address & 0x0000FFFF);   /* offset 0 <-- address2 : address1 */
1903
1904         snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR      << 2), temp);
1905         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1906         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1907
1908         /* Poke this location to tell the task to start */
1909         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1910
1911         /* Verify that the task ran */
1912         for (i=0; i<25; i++) {
1913                 udelay(125);
1914
1915                 temp =  snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1916                 if (temp == 0x00000000)
1917                         break;
1918         }
1919
1920         if (i == 25) {
1921                 dev_err(chip->card->dev,
1922                         "dsp_spos: SPIOWriteTask not responding\n");
1923                 return -EBUSY;
1924         }
1925
1926         return 0;
1927 }
1928
1929 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1930 {
1931         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1932         struct dsp_scb_descriptor * scb;
1933
1934         mutex_lock(&chip->spos_mutex);
1935
1936         /* main output */
1937         scb = ins->master_mix_scb->sub_list_ptr;
1938         while (scb != ins->the_null_scb) {
1939                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1940                 scb = scb->next_scb_ptr;
1941         }
1942
1943         /* rear output */
1944         scb = ins->rear_mix_scb->sub_list_ptr;
1945         while (scb != ins->the_null_scb) {
1946                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1947                 scb = scb->next_scb_ptr;
1948         }
1949
1950         ins->dac_volume_left = left;
1951         ins->dac_volume_right = right;
1952
1953         mutex_unlock(&chip->spos_mutex);
1954
1955         return 0;
1956 }
1957
1958 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1959 {
1960         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1961
1962         mutex_lock(&chip->spos_mutex);
1963
1964         if (ins->asynch_rx_scb != NULL)
1965                 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1966                                            left,right);
1967
1968         ins->spdif_input_volume_left = left;
1969         ins->spdif_input_volume_right = right;
1970
1971         mutex_unlock(&chip->spos_mutex);
1972
1973         return 0;
1974 }
1975
1976 #ifdef CONFIG_PM_SLEEP
1977 int cs46xx_dsp_resume(struct snd_cs46xx * chip)
1978 {
1979         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1980         int i, err;
1981
1982         /* clear parameter, sample and code areas */
1983         snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET,
1984                              DSP_PARAMETER_BYTE_SIZE);
1985         snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET,
1986                              DSP_SAMPLE_BYTE_SIZE);
1987         snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
1988
1989         for (i = 0; i < ins->nmodules; i++) {
1990                 struct dsp_module_desc *module = &ins->modules[i];
1991                 struct dsp_segment_desc *seg;
1992                 u32 doffset, dsize;
1993
1994                 seg = get_segment_desc(module, SEGTYPE_SP_PARAMETER);
1995                 err = dsp_load_parameter(chip, seg);
1996                 if (err < 0)
1997                         return err;
1998
1999                 seg = get_segment_desc(module, SEGTYPE_SP_SAMPLE);
2000                 err = dsp_load_sample(chip, seg);
2001                 if (err < 0)
2002                         return err;
2003
2004                 seg = get_segment_desc(module, SEGTYPE_SP_PROGRAM);
2005                 if (!seg)
2006                         continue;
2007
2008                 doffset = seg->offset * 4 + module->load_address * 4
2009                         + DSP_CODE_BYTE_OFFSET;
2010                 dsize   = seg->size * 4;
2011                 err = snd_cs46xx_download(chip,
2012                                           ins->code.data + module->load_address,
2013                                           doffset, dsize);
2014                 if (err < 0)
2015                         return err;
2016         }
2017
2018         for (i = 0; i < ins->ntask; i++) {
2019                 struct dsp_task_descriptor *t = &ins->tasks[i];
2020                 _dsp_create_task_tree(chip, t->data, t->address, t->size);
2021         }
2022
2023         for (i = 0; i < ins->nscb; i++) {
2024                 struct dsp_scb_descriptor *s = &ins->scbs[i];
2025                 if (s->deleted)
2026                         continue;
2027                 _dsp_create_scb(chip, s->data, s->address);
2028         }
2029         for (i = 0; i < ins->nscb; i++) {
2030                 struct dsp_scb_descriptor *s = &ins->scbs[i];
2031                 if (s->deleted)
2032                         continue;
2033                 if (s->updated)
2034                         cs46xx_dsp_spos_update_scb(chip, s);
2035                 if (s->volume_set)
2036                         cs46xx_dsp_scb_set_volume(chip, s,
2037                                                   s->volume[0], s->volume[1]);
2038         }
2039         if (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) {
2040                 cs46xx_dsp_enable_spdif_hw(chip);
2041                 snd_cs46xx_poke(chip, (ins->ref_snoop_scb->address + 2) << 2,
2042                                 (OUTPUT_SNOOP_BUFFER + 0x10) << 0x10);
2043                 if (ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN)
2044                         cs46xx_poke_via_dsp(chip, SP_SPDOUT_CSUV,
2045                                             ins->spdif_csuv_stream);
2046         }
2047         if (chip->dsp_spos_instance->spdif_status_in) {
2048                 cs46xx_poke_via_dsp(chip, SP_ASER_COUNTDOWN, 0x80000005);
2049                 cs46xx_poke_via_dsp(chip, SP_SPDIN_CONTROL, 0x800003ff);
2050         }
2051         return 0;
2052 }
2053 #endif