sound/soc/codecs/rt5514.h

   1 /*
   2  * rt5514.h  --  RT5514 ALSA SoC audio driver
   3  *
   4  * Copyright 2015 Realtek Microelectronics
   5  * Author: Oder Chiou <oder_chiou@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #ifndef __RT5514_H__
  13 #define __RT5514_H__
  14
  15 #include <linux/clk.h>
  16 #include <sound/rt5514.h>
  17
  18 #define RT5514_DEVICE_ID                        0x10ec5514
  19
  20 #define RT5514_RESET                            0x2000
  21 #define RT5514_PWR_ANA1                         0x2004
  22 #define RT5514_PWR_ANA2                         0x2008
  23 #define RT5514_I2S_CTRL1                        0x2010
  24 #define RT5514_I2S_CTRL2                        0x2014
  25 #define RT5514_VAD_CTRL6                        0x2030
  26 #define RT5514_EXT_VAD_CTRL                     0x206c
  27 #define RT5514_DIG_IO_CTRL                      0x2070
  28 #define RT5514_PAD_CTRL1                        0x2080
  29 #define RT5514_DMIC_DATA_CTRL                   0x20a0
  30 #define RT5514_DIG_SOURCE_CTRL                  0x20a4
  31 #define RT5514_SRC_CTRL                         0x20ac
  32 #define RT5514_DOWNFILTER2_CTRL1                0x20d0
  33 #define RT5514_PLL_SOURCE_CTRL                  0x2100
  34 #define RT5514_CLK_CTRL1                        0x2104
  35 #define RT5514_CLK_CTRL2                        0x2108
  36 #define RT5514_PLL3_CALIB_CTRL1                 0x2110
  37 #define RT5514_PLL3_CALIB_CTRL4                 0x2120
  38 #define RT5514_PLL3_CALIB_CTRL5                 0x2124
  39 #define RT5514_PLL3_CALIB_CTRL6                 0x2128
  40 #define RT5514_DELAY_BUF_CTRL1                  0x2140
  41 #define RT5514_DELAY_BUF_CTRL3                  0x2148
  42 #define RT5514_ASRC_IN_CTRL1                    0x2180
  43 #define RT5514_DOWNFILTER0_CTRL1                0x2190
  44 #define RT5514_DOWNFILTER0_CTRL2                0x2194
  45 #define RT5514_DOWNFILTER0_CTRL3                0x2198
  46 #define RT5514_DOWNFILTER1_CTRL1                0x21a0
  47 #define RT5514_DOWNFILTER1_CTRL2                0x21a4
  48 #define RT5514_DOWNFILTER1_CTRL3                0x21a8
  49 #define RT5514_ANA_CTRL_LDO10                   0x2200
  50 #define RT5514_ANA_CTRL_LDO18_16                0x2204
  51 #define RT5514_ANA_CTRL_ADC12                   0x2210
  52 #define RT5514_ANA_CTRL_ADC21                   0x2214
  53 #define RT5514_ANA_CTRL_ADC22                   0x2218
  54 #define RT5514_ANA_CTRL_ADC23                   0x221c
  55 #define RT5514_ANA_CTRL_MICBST                  0x2220
  56 #define RT5514_ANA_CTRL_ADCFED                  0x2224
  57 #define RT5514_ANA_CTRL_INBUF                   0x2228
  58 #define RT5514_ANA_CTRL_VREF                    0x222c
  59 #define RT5514_ANA_CTRL_PLL3                    0x2240
  60 #define RT5514_ANA_CTRL_PLL1_1                  0x2260
  61 #define RT5514_ANA_CTRL_PLL1_2                  0x2264
  62 #define RT5514_DMIC_LP_CTRL                     0x2e00
  63 #define RT5514_MISC_CTRL_DSP                    0x2e04
  64 #define RT5514_DSP_CTRL1                        0x2f00
  65 #define RT5514_DSP_CTRL3                        0x2f08
  66 #define RT5514_DSP_CTRL4                        0x2f10
  67 #define RT5514_VENDOR_ID1                       0x2ff0
  68 #define RT5514_VENDOR_ID2                       0x2ff4
  69
  70 #define RT5514_DSP_MAPPING                      0x18000000
  71
  72 /* RT5514_PWR_ANA1 (0x2004) */
  73 #define RT5514_POW_LDO18_IN                     (0x1 << 5)
  74 #define RT5514_POW_LDO18_IN_BIT                 5
  75 #define RT5514_POW_LDO18_ADC                    (0x1 << 4)
  76 #define RT5514_POW_LDO18_ADC_BIT                4
  77 #define RT5514_POW_LDO21                        (0x1 << 3)
  78 #define RT5514_POW_LDO21_BIT                    3
  79 #define RT5514_POW_BG_LDO18_IN                  (0x1 << 2)
  80 #define RT5514_POW_BG_LDO18_IN_BIT              2
  81 #define RT5514_POW_BG_LDO21                     (0x1 << 1)
  82 #define RT5514_POW_BG_LDO21_BIT                 1
  83
  84 /* RT5514_PWR_ANA2 (0x2008) */
  85 #define RT5514_POW_PLL1                         (0x1 << 18)
  86 #define RT5514_POW_PLL1_BIT                     18
  87 #define RT5514_POW_PLL1_LDO                     (0x1 << 16)
  88 #define RT5514_POW_PLL1_LDO_BIT                 16
  89 #define RT5514_POW_BG_MBIAS                     (0x1 << 15)
  90 #define RT5514_POW_BG_MBIAS_BIT                 15
  91 #define RT5514_POW_MBIAS                        (0x1 << 14)
  92 #define RT5514_POW_MBIAS_BIT                    14
  93 #define RT5514_POW_VREF2                        (0x1 << 13)
  94 #define RT5514_POW_VREF2_BIT                    13
  95 #define RT5514_POW_VREF1                        (0x1 << 12)
  96 #define RT5514_POW_VREF1_BIT                    12
  97 #define RT5514_POWR_LDO16                       (0x1 << 11)
  98 #define RT5514_POWR_LDO16_BIT                   11
  99 #define RT5514_POWL_LDO16                       (0x1 << 10)
 100 #define RT5514_POWL_LDO16_BIT                   10
 101 #define RT5514_POW_ADC2                         (0x1 << 9)
 102 #define RT5514_POW_ADC2_BIT                     9
 103 #define RT5514_POW_INPUT_BUF                    (0x1 << 8)
 104 #define RT5514_POW_INPUT_BUF_BIT                8
 105 #define RT5514_POW_ADC1_R                       (0x1 << 7)
 106 #define RT5514_POW_ADC1_R_BIT                   7
 107 #define RT5514_POW_ADC1_L                       (0x1 << 6)
 108 #define RT5514_POW_ADC1_L_BIT                   6
 109 #define RT5514_POW2_BSTR                        (0x1 << 5)
 110 #define RT5514_POW2_BSTR_BIT                    5
 111 #define RT5514_POW2_BSTL                        (0x1 << 4)
 112 #define RT5514_POW2_BSTL_BIT                    4
 113 #define RT5514_POW_BSTR                         (0x1 << 3)
 114 #define RT5514_POW_BSTR_BIT                     3
 115 #define RT5514_POW_BSTL                         (0x1 << 2)
 116 #define RT5514_POW_BSTL_BIT                     2
 117 #define RT5514_POW_ADCFEDR                      (0x1 << 1)
 118 #define RT5514_POW_ADCFEDR_BIT                  1
 119 #define RT5514_POW_ADCFEDL                      (0x1 << 0)
 120 #define RT5514_POW_ADCFEDL_BIT                  0
 121
 122 /* RT5514_I2S_CTRL1 (0x2010) */
 123 #define RT5514_TDM_MODE2                        (0x1 << 30)
 124 #define RT5514_TDM_MODE2_SFT                    30
 125 #define RT5514_TDM_MODE                         (0x1 << 28)
 126 #define RT5514_TDM_MODE_SFT                     28
 127 #define RT5514_I2S_LR_MASK                      (0x1 << 26)
 128 #define RT5514_I2S_LR_SFT                       26
 129 #define RT5514_I2S_LR_NOR                       (0x0 << 26)
 130 #define RT5514_I2S_LR_INV                       (0x1 << 26)
 131 #define RT5514_I2S_BP_MASK                      (0x1 << 25)
 132 #define RT5514_I2S_BP_SFT                       25
 133 #define RT5514_I2S_BP_NOR                       (0x0 << 25)
 134 #define RT5514_I2S_BP_INV                       (0x1 << 25)
 135 #define RT5514_I2S_DF_MASK                      (0x7 << 16)
 136 #define RT5514_I2S_DF_SFT                       16
 137 #define RT5514_I2S_DF_I2S                       (0x0 << 16)
 138 #define RT5514_I2S_DF_LEFT                      (0x1 << 16)
 139 #define RT5514_I2S_DF_PCM_A                     (0x2 << 16)
 140 #define RT5514_I2S_DF_PCM_B                     (0x3 << 16)
 141 #define RT5514_TDMSLOT_SEL_RX_MASK              (0x3 << 10)
 142 #define RT5514_TDMSLOT_SEL_RX_SFT               10
 143 #define RT5514_TDMSLOT_SEL_RX_4CH               (0x1 << 10)
 144 #define RT5514_TDMSLOT_SEL_RX_6CH               (0x2 << 10)
 145 #define RT5514_TDMSLOT_SEL_RX_8CH               (0x3 << 10)
 146 #define RT5514_CH_LEN_RX_MASK                   (0x3 << 8)
 147 #define RT5514_CH_LEN_RX_SFT                    8
 148 #define RT5514_CH_LEN_RX_16                     (0x0 << 8)
 149 #define RT5514_CH_LEN_RX_20                     (0x1 << 8)
 150 #define RT5514_CH_LEN_RX_24                     (0x2 << 8)
 151 #define RT5514_CH_LEN_RX_32                     (0x3 << 8)
 152 #define RT5514_TDMSLOT_SEL_TX_MASK              (0x3 << 6)
 153 #define RT5514_TDMSLOT_SEL_TX_SFT               6
 154 #define RT5514_TDMSLOT_SEL_TX_4CH               (0x1 << 6)
 155 #define RT5514_TDMSLOT_SEL_TX_6CH               (0x2 << 6)
 156 #define RT5514_TDMSLOT_SEL_TX_8CH               (0x3 << 6)
 157 #define RT5514_CH_LEN_TX_MASK                   (0x3 << 4)
 158 #define RT5514_CH_LEN_TX_SFT                    4
 159 #define RT5514_CH_LEN_TX_16                     (0x0 << 4)
 160 #define RT5514_CH_LEN_TX_20                     (0x1 << 4)
 161 #define RT5514_CH_LEN_TX_24                     (0x2 << 4)
 162 #define RT5514_CH_LEN_TX_32                     (0x3 << 4)
 163 #define RT5514_I2S_DL_MASK                      (0x3 << 0)
 164 #define RT5514_I2S_DL_SFT                       0
 165 #define RT5514_I2S_DL_16                        (0x0 << 0)
 166 #define RT5514_I2S_DL_20                        (0x1 << 0)
 167 #define RT5514_I2S_DL_24                        (0x2 << 0)
 168 #define RT5514_I2S_DL_8                         (0x3 << 0)
 169
 170 /* RT5514_I2S_CTRL2 (0x2014) */
 171 #define RT5514_TDM_DOCKING_MODE                 (0x1 << 31)
 172 #define RT5514_TDM_DOCKING_MODE_SFT             31
 173 #define RT5514_TDM_DOCKING_VALID_CH_MASK        (0x1 << 29)
 174 #define RT5514_TDM_DOCKING_VALID_CH_SFT         29
 175 #define RT5514_TDM_DOCKING_VALID_CH2            (0x0 << 29)
 176 #define RT5514_TDM_DOCKING_VALID_CH4            (0x1 << 29)
 177 #define RT5514_TDM_DOCKING_START_MASK           (0x1 << 28)
 178 #define RT5514_TDM_DOCKING_START_SFT            28
 179 #define RT5514_TDM_DOCKING_START_SLOT0          (0x0 << 28)
 180 #define RT5514_TDM_DOCKING_START_SLOT4          (0x1 << 28)
 181
 182 /* RT5514_DIG_SOURCE_CTRL (0x20a4) */
 183 #define RT5514_AD1_DMIC_INPUT_SEL               (0x1 << 1)
 184 #define RT5514_AD1_DMIC_INPUT_SEL_SFT           1
 185 #define RT5514_AD0_DMIC_INPUT_SEL               (0x1 << 0)
 186 #define RT5514_AD0_DMIC_INPUT_SEL_SFT           0
 187
 188 /* RT5514_PLL_SOURCE_CTRL (0x2100) */
 189 #define RT5514_PLL_1_SEL_MASK                   (0x7 << 12)
 190 #define RT5514_PLL_1_SEL_SFT                    12
 191 #define RT5514_PLL_1_SEL_SCLK                   (0x3 << 12)
 192 #define RT5514_PLL_1_SEL_MCLK                   (0x4 << 12)
 193
 194 /* RT5514_CLK_CTRL1 (0x2104) */
 195 #define RT5514_CLK_AD_ANA1_EN                   (0x1 << 31)
 196 #define RT5514_CLK_AD_ANA1_EN_BIT               31
 197 #define RT5514_CLK_AD1_EN                       (0x1 << 24)
 198 #define RT5514_CLK_AD1_EN_BIT                   24
 199 #define RT5514_CLK_AD0_EN                       (0x1 << 23)
 200 #define RT5514_CLK_AD0_EN_BIT                   23
 201 #define RT5514_CLK_DMIC_OUT_SEL_MASK            (0x7 << 8)
 202 #define RT5514_CLK_DMIC_OUT_SEL_SFT             8
 203 #define RT5514_CLK_AD_ANA1_SEL_MASK             (0xf << 0)
 204 #define RT5514_CLK_AD_ANA1_SEL_SFT              0
 205
 206 /* RT5514_CLK_CTRL2 (0x2108) */
 207 #define RT5514_CLK_AD1_ASRC_EN                  (0x1 << 17)
 208 #define RT5514_CLK_AD1_ASRC_EN_BIT              17
 209 #define RT5514_CLK_AD0_ASRC_EN                  (0x1 << 16)
 210 #define RT5514_CLK_AD0_ASRC_EN_BIT              16
 211 #define RT5514_CLK_SYS_DIV_OUT_MASK             (0x7 << 8)
 212 #define RT5514_CLK_SYS_DIV_OUT_SFT              8
 213 #define RT5514_SEL_ADC_OSR_MASK                 (0x7 << 4)
 214 #define RT5514_SEL_ADC_OSR_SFT                  4
 215 #define RT5514_CLK_SYS_PRE_SEL_MASK             (0x3 << 0)
 216 #define RT5514_CLK_SYS_PRE_SEL_SFT              0
 217 #define RT5514_CLK_SYS_PRE_SEL_MCLK             (0x2 << 0)
 218 #define RT5514_CLK_SYS_PRE_SEL_PLL              (0x3 << 0)
 219
 220 /*  RT5514_DOWNFILTER_CTRL (0x2190 0x2194 0x21a0 0x21a4) */
 221 #define RT5514_AD_DMIC_MIX                      (0x1 << 11)
 222 #define RT5514_AD_DMIC_MIX_BIT                  11
 223 #define RT5514_AD_AD_MIX                        (0x1 << 10)
 224 #define RT5514_AD_AD_MIX_BIT                    10
 225 #define RT5514_AD_AD_MUTE                       (0x1 << 7)
 226 #define RT5514_AD_AD_MUTE_BIT                   7
 227 #define RT5514_AD_GAIN_MASK                     (0x3f << 1)
 228 #define RT5514_AD_GAIN_SFT                      1
 229
 230 /*  RT5514_ANA_CTRL_MICBST (0x2220) */
 231 #define RT5514_SEL_BSTL_MASK                    (0xf << 4)
 232 #define RT5514_SEL_BSTL_SFT                     4
 233 #define RT5514_SEL_BSTR_MASK                    (0xf << 0)
 234 #define RT5514_SEL_BSTR_SFT                     0
 235
 236 /*  RT5514_ANA_CTRL_PLL1_1 (0x2260) */
 237 #define RT5514_PLL_K_MAX                        0x1f
 238 #define RT5514_PLL_K_MASK                       (RT5514_PLL_K_MAX << 16)
 239 #define RT5514_PLL_K_SFT                        16
 240 #define RT5514_PLL_N_MAX                        0x1ff
 241 #define RT5514_PLL_N_MASK                       (RT5514_PLL_N_MAX << 7)
 242 #define RT5514_PLL_N_SFT                        4
 243 #define RT5514_PLL_M_MAX                        0xf
 244 #define RT5514_PLL_M_MASK                       (RT5514_PLL_M_MAX << 0)
 245 #define RT5514_PLL_M_SFT                        0
 246
 247 /*  RT5514_ANA_CTRL_PLL1_2 (0x2264) */
 248 #define RT5514_PLL_M_BP                         (0x1 << 2)
 249 #define RT5514_PLL_M_BP_SFT                     2
 250 #define RT5514_PLL_K_BP                         (0x1 << 1)
 251 #define RT5514_PLL_K_BP_SFT                     1
 252 #define RT5514_EN_LDO_PLL1                      (0x1 << 0)
 253 #define RT5514_EN_LDO_PLL1_BIT                  0
 254
 255 #define RT5514_PLL_INP_MAX                      40000000
 256 #define RT5514_PLL_INP_MIN                      256000
 257
 258 #define RT5514_FIRMWARE1        "/*(DEBLOBBED)*/"
 259 #define RT5514_FIRMWARE2        "/*(DEBLOBBED)*/"
 260
 261 /* System Clock Source */
 262 enum {
 263         RT5514_SCLK_S_MCLK,
 264         RT5514_SCLK_S_PLL1,
 265 };
 266
 267 /* PLL1 Source */
 268 enum {
 269         RT5514_PLL1_S_MCLK,
 270         RT5514_PLL1_S_BCLK,
 271 };
 272
 273 struct rt5514_priv {
 274         struct rt5514_platform_data pdata;
 275         struct snd_soc_component *component;
 276         struct regmap *i2c_regmap, *regmap;
 277         struct clk *mclk, *dsp_calib_clk;
 278         int sysclk;
 279         int sysclk_src;
 280         int lrck;
 281         int bclk;
 282         int pll_src;
 283         int pll_in;
 284         int pll_out;
 285         int dsp_enabled;
 286         unsigned int pll3_cal_value;
 287 };
 288
 289 #endif /* __RT5514_H__ */