2 * rt5668.c -- RT5668B ALSA SoC audio component driver
4 * Copyright 2018 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/acpi.h>
21 #include <linux/gpio.h>
22 #include <linux/of_gpio.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/mutex.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28 #include <sound/jack.h>
29 #include <sound/soc.h>
30 #include <sound/soc-dapm.h>
31 #include <sound/initval.h>
32 #include <sound/tlv.h>
33 #include <sound/rt5668.h>
38 #define RT5668_NUM_SUPPLIES 3
40 static const char *rt5668_supply_names[RT5668_NUM_SUPPLIES] = {
47 struct snd_soc_component *component;
48 struct rt5668_platform_data pdata;
49 struct regmap *regmap;
50 struct snd_soc_jack *hs_jack;
51 struct regulator_bulk_data supplies[RT5668_NUM_SUPPLIES];
52 struct delayed_work jack_detect_work;
53 struct delayed_work jd_check_work;
54 struct mutex calibrate_mutex;
58 int lrck[RT5668_AIFS];
59 int bclk[RT5668_AIFS];
60 int master[RT5668_AIFS];
69 static const struct reg_default rt5668_reg[] = {
391 static bool rt5668_volatile_register(struct device *dev, unsigned int reg)
395 case RT5668_CBJ_CTRL_2:
396 case RT5668_INT_ST_1:
397 case RT5668_4BTN_IL_CMD_1:
398 case RT5668_AJD1_CTRL:
399 case RT5668_HP_CALIB_CTRL_1:
400 case RT5668_DEVICE_ID:
401 case RT5668_I2C_MODE:
402 case RT5668_HP_CALIB_CTRL_10:
403 case RT5668_EFUSE_CTRL_2:
404 case RT5668_JD_TOP_VC_VTRL:
405 case RT5668_HP_IMP_SENS_CTRL_19:
406 case RT5668_IL_CMD_1:
407 case RT5668_SAR_IL_CMD_2:
408 case RT5668_SAR_IL_CMD_4:
409 case RT5668_SAR_IL_CMD_10:
410 case RT5668_SAR_IL_CMD_11:
411 case RT5668_EFUSE_CTRL_6...RT5668_EFUSE_CTRL_11:
412 case RT5668_HP_CALIB_STA_1...RT5668_HP_CALIB_STA_11:
419 static bool rt5668_readable_register(struct device *dev, unsigned int reg)
423 case RT5668_VERSION_ID:
424 case RT5668_VENDOR_ID:
425 case RT5668_DEVICE_ID:
426 case RT5668_HP_CTRL_1:
427 case RT5668_HP_CTRL_2:
428 case RT5668_HPL_GAIN:
429 case RT5668_HPR_GAIN:
430 case RT5668_I2C_CTRL:
431 case RT5668_CBJ_BST_CTRL:
432 case RT5668_CBJ_CTRL_1:
433 case RT5668_CBJ_CTRL_2:
434 case RT5668_CBJ_CTRL_3:
435 case RT5668_CBJ_CTRL_4:
436 case RT5668_CBJ_CTRL_5:
437 case RT5668_CBJ_CTRL_6:
438 case RT5668_CBJ_CTRL_7:
439 case RT5668_DAC1_DIG_VOL:
440 case RT5668_STO1_ADC_DIG_VOL:
441 case RT5668_STO1_ADC_BOOST:
442 case RT5668_HP_IMP_GAIN_1:
443 case RT5668_HP_IMP_GAIN_2:
444 case RT5668_SIDETONE_CTRL:
445 case RT5668_STO1_ADC_MIXER:
446 case RT5668_AD_DA_MIXER:
447 case RT5668_STO1_DAC_MIXER:
448 case RT5668_A_DAC1_MUX:
449 case RT5668_DIG_INF2_DATA:
450 case RT5668_REC_MIXER:
452 case RT5668_ALC_BACK_GAIN:
453 case RT5668_PWR_DIG_1:
454 case RT5668_PWR_DIG_2:
455 case RT5668_PWR_ANLG_1:
456 case RT5668_PWR_ANLG_2:
457 case RT5668_PWR_ANLG_3:
458 case RT5668_PWR_MIXER:
461 case RT5668_RESET_LPF_CTRL:
462 case RT5668_RESET_HPF_CTRL:
463 case RT5668_DMIC_CTRL_1:
464 case RT5668_I2S1_SDP:
465 case RT5668_I2S2_SDP:
466 case RT5668_ADDA_CLK_1:
467 case RT5668_ADDA_CLK_2:
468 case RT5668_I2S1_F_DIV_CTRL_1:
469 case RT5668_I2S1_F_DIV_CTRL_2:
470 case RT5668_TDM_CTRL:
471 case RT5668_TDM_ADDA_CTRL_1:
472 case RT5668_TDM_ADDA_CTRL_2:
473 case RT5668_DATA_SEL_CTRL_1:
474 case RT5668_TDM_TCON_CTRL:
476 case RT5668_PLL_CTRL_1:
477 case RT5668_PLL_CTRL_2:
478 case RT5668_PLL_TRACK_1:
479 case RT5668_PLL_TRACK_2:
480 case RT5668_PLL_TRACK_3:
481 case RT5668_PLL_TRACK_4:
482 case RT5668_PLL_TRACK_5:
483 case RT5668_PLL_TRACK_6:
484 case RT5668_PLL_TRACK_11:
485 case RT5668_SDW_REF_CLK:
488 case RT5668_HP_CHARGE_PUMP_1:
489 case RT5668_HP_CHARGE_PUMP_2:
490 case RT5668_MICBIAS_1:
491 case RT5668_MICBIAS_2:
492 case RT5668_PLL_TRACK_12:
493 case RT5668_PLL_TRACK_14:
494 case RT5668_PLL2_CTRL_1:
495 case RT5668_PLL2_CTRL_2:
496 case RT5668_PLL2_CTRL_3:
497 case RT5668_PLL2_CTRL_4:
498 case RT5668_RC_CLK_CTRL:
499 case RT5668_I2S_M_CLK_CTRL_1:
500 case RT5668_I2S2_F_DIV_CTRL_1:
501 case RT5668_I2S2_F_DIV_CTRL_2:
502 case RT5668_EQ_CTRL_1:
503 case RT5668_EQ_CTRL_2:
504 case RT5668_IRQ_CTRL_1:
505 case RT5668_IRQ_CTRL_2:
506 case RT5668_IRQ_CTRL_3:
507 case RT5668_IRQ_CTRL_4:
508 case RT5668_INT_ST_1:
509 case RT5668_GPIO_CTRL_1:
510 case RT5668_GPIO_CTRL_2:
511 case RT5668_GPIO_CTRL_3:
512 case RT5668_HP_AMP_DET_CTRL_1:
513 case RT5668_HP_AMP_DET_CTRL_2:
514 case RT5668_MID_HP_AMP_DET:
515 case RT5668_LOW_HP_AMP_DET:
516 case RT5668_DELAY_BUF_CTRL:
517 case RT5668_SV_ZCD_1:
518 case RT5668_SV_ZCD_2:
519 case RT5668_IL_CMD_1:
520 case RT5668_IL_CMD_2:
521 case RT5668_IL_CMD_3:
522 case RT5668_IL_CMD_4:
523 case RT5668_IL_CMD_5:
524 case RT5668_IL_CMD_6:
525 case RT5668_4BTN_IL_CMD_1:
526 case RT5668_4BTN_IL_CMD_2:
527 case RT5668_4BTN_IL_CMD_3:
528 case RT5668_4BTN_IL_CMD_4:
529 case RT5668_4BTN_IL_CMD_5:
530 case RT5668_4BTN_IL_CMD_6:
531 case RT5668_4BTN_IL_CMD_7:
532 case RT5668_ADC_STO1_HP_CTRL_1:
533 case RT5668_ADC_STO1_HP_CTRL_2:
534 case RT5668_AJD1_CTRL:
537 case RT5668_JD_CTRL_1:
541 case RT5668_DAC_ADC_DIG_VOL1:
542 case RT5668_BIAS_CUR_CTRL_2:
543 case RT5668_BIAS_CUR_CTRL_3:
544 case RT5668_BIAS_CUR_CTRL_4:
545 case RT5668_BIAS_CUR_CTRL_5:
546 case RT5668_BIAS_CUR_CTRL_6:
547 case RT5668_BIAS_CUR_CTRL_7:
548 case RT5668_BIAS_CUR_CTRL_8:
549 case RT5668_BIAS_CUR_CTRL_9:
550 case RT5668_BIAS_CUR_CTRL_10:
551 case RT5668_VREF_REC_OP_FB_CAP_CTRL:
552 case RT5668_CHARGE_PUMP_1:
553 case RT5668_DIG_IN_CTRL_1:
554 case RT5668_PAD_DRIVING_CTRL:
555 case RT5668_SOFT_RAMP_DEPOP:
556 case RT5668_CHOP_DAC:
557 case RT5668_CHOP_ADC:
558 case RT5668_CALIB_ADC_CTRL:
559 case RT5668_VOL_TEST:
560 case RT5668_SPKVDD_DET_STA:
561 case RT5668_TEST_MODE_CTRL_1:
562 case RT5668_TEST_MODE_CTRL_2:
563 case RT5668_TEST_MODE_CTRL_3:
564 case RT5668_TEST_MODE_CTRL_4:
565 case RT5668_TEST_MODE_CTRL_5:
566 case RT5668_PLL1_INTERNAL:
567 case RT5668_PLL2_INTERNAL:
568 case RT5668_STO_NG2_CTRL_1:
569 case RT5668_STO_NG2_CTRL_2:
570 case RT5668_STO_NG2_CTRL_3:
571 case RT5668_STO_NG2_CTRL_4:
572 case RT5668_STO_NG2_CTRL_5:
573 case RT5668_STO_NG2_CTRL_6:
574 case RT5668_STO_NG2_CTRL_7:
575 case RT5668_STO_NG2_CTRL_8:
576 case RT5668_STO_NG2_CTRL_9:
577 case RT5668_STO_NG2_CTRL_10:
578 case RT5668_STO1_DAC_SIL_DET:
579 case RT5668_SIL_PSV_CTRL1:
580 case RT5668_SIL_PSV_CTRL2:
581 case RT5668_SIL_PSV_CTRL3:
582 case RT5668_SIL_PSV_CTRL4:
583 case RT5668_SIL_PSV_CTRL5:
584 case RT5668_HP_IMP_SENS_CTRL_01:
585 case RT5668_HP_IMP_SENS_CTRL_02:
586 case RT5668_HP_IMP_SENS_CTRL_03:
587 case RT5668_HP_IMP_SENS_CTRL_04:
588 case RT5668_HP_IMP_SENS_CTRL_05:
589 case RT5668_HP_IMP_SENS_CTRL_06:
590 case RT5668_HP_IMP_SENS_CTRL_07:
591 case RT5668_HP_IMP_SENS_CTRL_08:
592 case RT5668_HP_IMP_SENS_CTRL_09:
593 case RT5668_HP_IMP_SENS_CTRL_10:
594 case RT5668_HP_IMP_SENS_CTRL_11:
595 case RT5668_HP_IMP_SENS_CTRL_12:
596 case RT5668_HP_IMP_SENS_CTRL_13:
597 case RT5668_HP_IMP_SENS_CTRL_14:
598 case RT5668_HP_IMP_SENS_CTRL_15:
599 case RT5668_HP_IMP_SENS_CTRL_16:
600 case RT5668_HP_IMP_SENS_CTRL_17:
601 case RT5668_HP_IMP_SENS_CTRL_18:
602 case RT5668_HP_IMP_SENS_CTRL_19:
603 case RT5668_HP_IMP_SENS_CTRL_20:
604 case RT5668_HP_IMP_SENS_CTRL_21:
605 case RT5668_HP_IMP_SENS_CTRL_22:
606 case RT5668_HP_IMP_SENS_CTRL_23:
607 case RT5668_HP_IMP_SENS_CTRL_24:
608 case RT5668_HP_IMP_SENS_CTRL_25:
609 case RT5668_HP_IMP_SENS_CTRL_26:
610 case RT5668_HP_IMP_SENS_CTRL_27:
611 case RT5668_HP_IMP_SENS_CTRL_28:
612 case RT5668_HP_IMP_SENS_CTRL_29:
613 case RT5668_HP_IMP_SENS_CTRL_30:
614 case RT5668_HP_IMP_SENS_CTRL_31:
615 case RT5668_HP_IMP_SENS_CTRL_32:
616 case RT5668_HP_IMP_SENS_CTRL_33:
617 case RT5668_HP_IMP_SENS_CTRL_34:
618 case RT5668_HP_IMP_SENS_CTRL_35:
619 case RT5668_HP_IMP_SENS_CTRL_36:
620 case RT5668_HP_IMP_SENS_CTRL_37:
621 case RT5668_HP_IMP_SENS_CTRL_38:
622 case RT5668_HP_IMP_SENS_CTRL_39:
623 case RT5668_HP_IMP_SENS_CTRL_40:
624 case RT5668_HP_IMP_SENS_CTRL_41:
625 case RT5668_HP_IMP_SENS_CTRL_42:
626 case RT5668_HP_IMP_SENS_CTRL_43:
627 case RT5668_HP_LOGIC_CTRL_1:
628 case RT5668_HP_LOGIC_CTRL_2:
629 case RT5668_HP_LOGIC_CTRL_3:
630 case RT5668_HP_CALIB_CTRL_1:
631 case RT5668_HP_CALIB_CTRL_2:
632 case RT5668_HP_CALIB_CTRL_3:
633 case RT5668_HP_CALIB_CTRL_4:
634 case RT5668_HP_CALIB_CTRL_5:
635 case RT5668_HP_CALIB_CTRL_6:
636 case RT5668_HP_CALIB_CTRL_7:
637 case RT5668_HP_CALIB_CTRL_9:
638 case RT5668_HP_CALIB_CTRL_10:
639 case RT5668_HP_CALIB_CTRL_11:
640 case RT5668_HP_CALIB_STA_1:
641 case RT5668_HP_CALIB_STA_2:
642 case RT5668_HP_CALIB_STA_3:
643 case RT5668_HP_CALIB_STA_4:
644 case RT5668_HP_CALIB_STA_5:
645 case RT5668_HP_CALIB_STA_6:
646 case RT5668_HP_CALIB_STA_7:
647 case RT5668_HP_CALIB_STA_8:
648 case RT5668_HP_CALIB_STA_9:
649 case RT5668_HP_CALIB_STA_10:
650 case RT5668_HP_CALIB_STA_11:
651 case RT5668_SAR_IL_CMD_1:
652 case RT5668_SAR_IL_CMD_2:
653 case RT5668_SAR_IL_CMD_3:
654 case RT5668_SAR_IL_CMD_4:
655 case RT5668_SAR_IL_CMD_5:
656 case RT5668_SAR_IL_CMD_6:
657 case RT5668_SAR_IL_CMD_7:
658 case RT5668_SAR_IL_CMD_8:
659 case RT5668_SAR_IL_CMD_9:
660 case RT5668_SAR_IL_CMD_10:
661 case RT5668_SAR_IL_CMD_11:
662 case RT5668_SAR_IL_CMD_12:
663 case RT5668_SAR_IL_CMD_13:
664 case RT5668_EFUSE_CTRL_1:
665 case RT5668_EFUSE_CTRL_2:
666 case RT5668_EFUSE_CTRL_3:
667 case RT5668_EFUSE_CTRL_4:
668 case RT5668_EFUSE_CTRL_5:
669 case RT5668_EFUSE_CTRL_6:
670 case RT5668_EFUSE_CTRL_7:
671 case RT5668_EFUSE_CTRL_8:
672 case RT5668_EFUSE_CTRL_9:
673 case RT5668_EFUSE_CTRL_10:
674 case RT5668_EFUSE_CTRL_11:
675 case RT5668_JD_TOP_VC_VTRL:
676 case RT5668_DRC1_CTRL_0:
677 case RT5668_DRC1_CTRL_1:
678 case RT5668_DRC1_CTRL_2:
679 case RT5668_DRC1_CTRL_3:
680 case RT5668_DRC1_CTRL_4:
681 case RT5668_DRC1_CTRL_5:
682 case RT5668_DRC1_CTRL_6:
683 case RT5668_DRC1_HARD_LMT_CTRL_1:
684 case RT5668_DRC1_HARD_LMT_CTRL_2:
685 case RT5668_DRC1_PRIV_1:
686 case RT5668_DRC1_PRIV_2:
687 case RT5668_DRC1_PRIV_3:
688 case RT5668_DRC1_PRIV_4:
689 case RT5668_DRC1_PRIV_5:
690 case RT5668_DRC1_PRIV_6:
691 case RT5668_DRC1_PRIV_7:
692 case RT5668_DRC1_PRIV_8:
693 case RT5668_EQ_AUTO_RCV_CTRL1:
694 case RT5668_EQ_AUTO_RCV_CTRL2:
695 case RT5668_EQ_AUTO_RCV_CTRL3:
696 case RT5668_EQ_AUTO_RCV_CTRL4:
697 case RT5668_EQ_AUTO_RCV_CTRL5:
698 case RT5668_EQ_AUTO_RCV_CTRL6:
699 case RT5668_EQ_AUTO_RCV_CTRL7:
700 case RT5668_EQ_AUTO_RCV_CTRL8:
701 case RT5668_EQ_AUTO_RCV_CTRL9:
702 case RT5668_EQ_AUTO_RCV_CTRL10:
703 case RT5668_EQ_AUTO_RCV_CTRL11:
704 case RT5668_EQ_AUTO_RCV_CTRL12:
705 case RT5668_EQ_AUTO_RCV_CTRL13:
706 case RT5668_ADC_L_EQ_LPF1_A1:
707 case RT5668_R_EQ_LPF1_A1:
708 case RT5668_L_EQ_LPF1_H0:
709 case RT5668_R_EQ_LPF1_H0:
710 case RT5668_L_EQ_BPF1_A1:
711 case RT5668_R_EQ_BPF1_A1:
712 case RT5668_L_EQ_BPF1_A2:
713 case RT5668_R_EQ_BPF1_A2:
714 case RT5668_L_EQ_BPF1_H0:
715 case RT5668_R_EQ_BPF1_H0:
716 case RT5668_L_EQ_BPF2_A1:
717 case RT5668_R_EQ_BPF2_A1:
718 case RT5668_L_EQ_BPF2_A2:
719 case RT5668_R_EQ_BPF2_A2:
720 case RT5668_L_EQ_BPF2_H0:
721 case RT5668_R_EQ_BPF2_H0:
722 case RT5668_L_EQ_BPF3_A1:
723 case RT5668_R_EQ_BPF3_A1:
724 case RT5668_L_EQ_BPF3_A2:
725 case RT5668_R_EQ_BPF3_A2:
726 case RT5668_L_EQ_BPF3_H0:
727 case RT5668_R_EQ_BPF3_H0:
728 case RT5668_L_EQ_BPF4_A1:
729 case RT5668_R_EQ_BPF4_A1:
730 case RT5668_L_EQ_BPF4_A2:
731 case RT5668_R_EQ_BPF4_A2:
732 case RT5668_L_EQ_BPF4_H0:
733 case RT5668_R_EQ_BPF4_H0:
734 case RT5668_L_EQ_HPF1_A1:
735 case RT5668_R_EQ_HPF1_A1:
736 case RT5668_L_EQ_HPF1_H0:
737 case RT5668_R_EQ_HPF1_H0:
738 case RT5668_L_EQ_PRE_VOL:
739 case RT5668_R_EQ_PRE_VOL:
740 case RT5668_L_EQ_POST_VOL:
741 case RT5668_R_EQ_POST_VOL:
742 case RT5668_I2C_MODE:
749 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2250, 150, 0);
750 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
751 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
752 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
754 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
755 static const DECLARE_TLV_DB_RANGE(bst_tlv,
756 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
757 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
758 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
759 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
760 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
761 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
762 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
765 /* Interface data select */
766 static const char * const rt5668_data_select[] = {
767 "L/R", "R/L", "L/L", "R/R"
770 static SOC_ENUM_SINGLE_DECL(rt5668_if2_adc_enum,
771 RT5668_DIG_INF2_DATA, RT5668_IF2_ADC_SEL_SFT, rt5668_data_select);
773 static SOC_ENUM_SINGLE_DECL(rt5668_if1_01_adc_enum,
774 RT5668_TDM_ADDA_CTRL_1, RT5668_IF1_ADC1_SEL_SFT, rt5668_data_select);
776 static SOC_ENUM_SINGLE_DECL(rt5668_if1_23_adc_enum,
777 RT5668_TDM_ADDA_CTRL_1, RT5668_IF1_ADC2_SEL_SFT, rt5668_data_select);
779 static SOC_ENUM_SINGLE_DECL(rt5668_if1_45_adc_enum,
780 RT5668_TDM_ADDA_CTRL_1, RT5668_IF1_ADC3_SEL_SFT, rt5668_data_select);
782 static SOC_ENUM_SINGLE_DECL(rt5668_if1_67_adc_enum,
783 RT5668_TDM_ADDA_CTRL_1, RT5668_IF1_ADC4_SEL_SFT, rt5668_data_select);
785 static const struct snd_kcontrol_new rt5668_if2_adc_swap_mux =
786 SOC_DAPM_ENUM("IF2 ADC Swap Mux", rt5668_if2_adc_enum);
788 static const struct snd_kcontrol_new rt5668_if1_01_adc_swap_mux =
789 SOC_DAPM_ENUM("IF1 01 ADC Swap Mux", rt5668_if1_01_adc_enum);
791 static const struct snd_kcontrol_new rt5668_if1_23_adc_swap_mux =
792 SOC_DAPM_ENUM("IF1 23 ADC Swap Mux", rt5668_if1_23_adc_enum);
794 static const struct snd_kcontrol_new rt5668_if1_45_adc_swap_mux =
795 SOC_DAPM_ENUM("IF1 45 ADC Swap Mux", rt5668_if1_45_adc_enum);
797 static const struct snd_kcontrol_new rt5668_if1_67_adc_swap_mux =
798 SOC_DAPM_ENUM("IF1 67 ADC Swap Mux", rt5668_if1_67_adc_enum);
800 static void rt5668_reset(struct regmap *regmap)
802 regmap_write(regmap, RT5668_RESET, 0);
803 regmap_write(regmap, RT5668_I2C_MODE, 1);
806 * rt5668_sel_asrc_clk_src - select ASRC clock source for a set of filters
807 * @component: SoC audio component device.
808 * @filter_mask: mask of filters.
809 * @clk_src: clock source
811 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5668 can
812 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
813 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
814 * ASRC function will track i2s clock and generate a corresponding system clock
815 * for codec. This function provides an API to select the clock source for a
816 * set of filters specified by the mask. And the component driver will turn on
817 * ASRC for these filters if ASRC is selected as their clock source.
819 int rt5668_sel_asrc_clk_src(struct snd_soc_component *component,
820 unsigned int filter_mask, unsigned int clk_src)
824 case RT5668_CLK_SEL_SYS:
825 case RT5668_CLK_SEL_I2S1_ASRC:
826 case RT5668_CLK_SEL_I2S2_ASRC:
833 if (filter_mask & RT5668_DA_STEREO1_FILTER) {
834 snd_soc_component_update_bits(component, RT5668_PLL_TRACK_2,
835 RT5668_FILTER_CLK_SEL_MASK,
836 clk_src << RT5668_FILTER_CLK_SEL_SFT);
839 if (filter_mask & RT5668_AD_STEREO1_FILTER) {
840 snd_soc_component_update_bits(component, RT5668_PLL_TRACK_3,
841 RT5668_FILTER_CLK_SEL_MASK,
842 clk_src << RT5668_FILTER_CLK_SEL_SFT);
847 EXPORT_SYMBOL_GPL(rt5668_sel_asrc_clk_src);
849 static int rt5668_button_detect(struct snd_soc_component *component)
853 val = snd_soc_component_read32(component, RT5668_4BTN_IL_CMD_1);
854 btn_type = val & 0xfff0;
855 snd_soc_component_write(component, RT5668_4BTN_IL_CMD_1, val);
856 pr_debug("%s btn_type=%x\n", __func__, btn_type);
861 static void rt5668_enable_push_button_irq(struct snd_soc_component *component,
865 snd_soc_component_update_bits(component, RT5668_SAR_IL_CMD_1,
866 RT5668_SAR_BUTT_DET_MASK, RT5668_SAR_BUTT_DET_EN);
867 snd_soc_component_update_bits(component, RT5668_SAR_IL_CMD_13,
868 RT5668_SAR_SOUR_MASK, RT5668_SAR_SOUR_BTN);
869 snd_soc_component_write(component, RT5668_IL_CMD_1, 0x0040);
870 snd_soc_component_update_bits(component, RT5668_4BTN_IL_CMD_2,
871 RT5668_4BTN_IL_MASK | RT5668_4BTN_IL_RST_MASK,
872 RT5668_4BTN_IL_EN | RT5668_4BTN_IL_NOR);
873 snd_soc_component_update_bits(component, RT5668_IRQ_CTRL_3,
874 RT5668_IL_IRQ_MASK, RT5668_IL_IRQ_EN);
876 snd_soc_component_update_bits(component, RT5668_IRQ_CTRL_3,
877 RT5668_IL_IRQ_MASK, RT5668_IL_IRQ_DIS);
878 snd_soc_component_update_bits(component, RT5668_SAR_IL_CMD_1,
879 RT5668_SAR_BUTT_DET_MASK, RT5668_SAR_BUTT_DET_DIS);
880 snd_soc_component_update_bits(component, RT5668_4BTN_IL_CMD_2,
881 RT5668_4BTN_IL_MASK, RT5668_4BTN_IL_DIS);
882 snd_soc_component_update_bits(component, RT5668_4BTN_IL_CMD_2,
883 RT5668_4BTN_IL_RST_MASK, RT5668_4BTN_IL_RST);
884 snd_soc_component_update_bits(component, RT5668_SAR_IL_CMD_13,
885 RT5668_SAR_SOUR_MASK, RT5668_SAR_SOUR_TYPE);
890 * rt5668_headset_detect - Detect headset.
891 * @component: SoC audio component device.
892 * @jack_insert: Jack insert or not.
894 * Detect whether is headset or not when jack inserted.
896 * Returns detect status.
898 static int rt5668_headset_detect(struct snd_soc_component *component,
901 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
902 struct snd_soc_dapm_context *dapm =
903 snd_soc_component_get_dapm(component);
904 unsigned int val, count;
907 snd_soc_dapm_force_enable_pin(dapm, "CBJ Power");
908 snd_soc_dapm_sync(dapm);
909 snd_soc_component_update_bits(component, RT5668_CBJ_CTRL_1,
910 RT5668_TRIG_JD_MASK, RT5668_TRIG_JD_HIGH);
913 val = snd_soc_component_read32(component, RT5668_CBJ_CTRL_2)
914 & RT5668_JACK_TYPE_MASK;
915 while (val == 0 && count < 50) {
916 usleep_range(10000, 15000);
917 val = snd_soc_component_read32(component,
918 RT5668_CBJ_CTRL_2) & RT5668_JACK_TYPE_MASK;
925 rt5668->jack_type = SND_JACK_HEADSET;
926 rt5668_enable_push_button_irq(component, true);
929 rt5668->jack_type = SND_JACK_HEADPHONE;
933 rt5668_enable_push_button_irq(component, false);
934 snd_soc_component_update_bits(component, RT5668_CBJ_CTRL_1,
935 RT5668_TRIG_JD_MASK, RT5668_TRIG_JD_LOW);
936 snd_soc_dapm_disable_pin(dapm, "CBJ Power");
937 snd_soc_dapm_sync(dapm);
939 rt5668->jack_type = 0;
942 dev_dbg(component->dev, "jack_type = %d\n", rt5668->jack_type);
943 return rt5668->jack_type;
946 static irqreturn_t rt5668_irq(int irq, void *data)
948 struct rt5668_priv *rt5668 = data;
950 mod_delayed_work(system_power_efficient_wq,
951 &rt5668->jack_detect_work, msecs_to_jiffies(250));
956 static void rt5668_jd_check_handler(struct work_struct *work)
958 struct rt5668_priv *rt5668 = container_of(work, struct rt5668_priv,
961 if (snd_soc_component_read32(rt5668->component, RT5668_AJD1_CTRL)
962 & RT5668_JDH_RS_MASK) {
964 rt5668->jack_type = rt5668_headset_detect(rt5668->component, 0);
966 snd_soc_jack_report(rt5668->hs_jack, rt5668->jack_type,
968 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
969 SND_JACK_BTN_2 | SND_JACK_BTN_3);
971 schedule_delayed_work(&rt5668->jd_check_work, 500);
975 static int rt5668_set_jack_detect(struct snd_soc_component *component,
976 struct snd_soc_jack *hs_jack, void *data)
978 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
980 switch (rt5668->pdata.jd_src) {
982 snd_soc_component_update_bits(component, RT5668_CBJ_CTRL_2,
983 RT5668_EXT_JD_SRC, RT5668_EXT_JD_SRC_MANUAL);
984 snd_soc_component_write(component, RT5668_CBJ_CTRL_1, 0xd002);
985 snd_soc_component_update_bits(component, RT5668_CBJ_CTRL_3,
986 RT5668_CBJ_IN_BUF_EN, RT5668_CBJ_IN_BUF_EN);
987 snd_soc_component_update_bits(component, RT5668_SAR_IL_CMD_1,
988 RT5668_SAR_POW_MASK, RT5668_SAR_POW_EN);
989 regmap_update_bits(rt5668->regmap, RT5668_GPIO_CTRL_1,
990 RT5668_GP1_PIN_MASK, RT5668_GP1_PIN_IRQ);
991 regmap_update_bits(rt5668->regmap, RT5668_RC_CLK_CTRL,
992 RT5668_POW_IRQ | RT5668_POW_JDH |
993 RT5668_POW_ANA, RT5668_POW_IRQ |
994 RT5668_POW_JDH | RT5668_POW_ANA);
995 regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_2,
996 RT5668_PWR_JDH | RT5668_PWR_JDL,
997 RT5668_PWR_JDH | RT5668_PWR_JDL);
998 regmap_update_bits(rt5668->regmap, RT5668_IRQ_CTRL_2,
999 RT5668_JD1_EN_MASK | RT5668_JD1_POL_MASK,
1000 RT5668_JD1_EN | RT5668_JD1_POL_NOR);
1001 mod_delayed_work(system_power_efficient_wq,
1002 &rt5668->jack_detect_work, msecs_to_jiffies(250));
1005 case RT5668_JD_NULL:
1006 regmap_update_bits(rt5668->regmap, RT5668_IRQ_CTRL_2,
1007 RT5668_JD1_EN_MASK, RT5668_JD1_DIS);
1008 regmap_update_bits(rt5668->regmap, RT5668_RC_CLK_CTRL,
1009 RT5668_POW_JDH | RT5668_POW_JDL, 0);
1013 dev_warn(component->dev, "Wrong JD source\n");
1017 rt5668->hs_jack = hs_jack;
1022 static void rt5668_jack_detect_handler(struct work_struct *work)
1024 struct rt5668_priv *rt5668 =
1025 container_of(work, struct rt5668_priv, jack_detect_work.work);
1028 if (!rt5668->component || !rt5668->component->card ||
1029 !rt5668->component->card->instantiated) {
1030 /* card not yet ready, try later */
1031 mod_delayed_work(system_power_efficient_wq,
1032 &rt5668->jack_detect_work, msecs_to_jiffies(15));
1036 mutex_lock(&rt5668->calibrate_mutex);
1038 val = snd_soc_component_read32(rt5668->component, RT5668_AJD1_CTRL)
1039 & RT5668_JDH_RS_MASK;
1042 if (rt5668->jack_type == 0) {
1043 /* jack was out, report jack type */
1045 rt5668_headset_detect(rt5668->component, 1);
1047 /* jack is already in, report button event */
1048 rt5668->jack_type = SND_JACK_HEADSET;
1049 btn_type = rt5668_button_detect(rt5668->component);
1051 * rt5668 can report three kinds of button behavior,
1052 * one click, double click and hold. However,
1053 * currently we will report button pressed/released
1054 * event. So all the three button behaviors are
1055 * treated as button pressed.
1061 rt5668->jack_type |= SND_JACK_BTN_0;
1066 rt5668->jack_type |= SND_JACK_BTN_1;
1071 rt5668->jack_type |= SND_JACK_BTN_2;
1076 rt5668->jack_type |= SND_JACK_BTN_3;
1078 case 0x0000: /* unpressed */
1082 dev_err(rt5668->component->dev,
1083 "Unexpected button code 0x%04x\n",
1090 rt5668->jack_type = rt5668_headset_detect(rt5668->component, 0);
1093 snd_soc_jack_report(rt5668->hs_jack, rt5668->jack_type,
1095 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
1096 SND_JACK_BTN_2 | SND_JACK_BTN_3);
1098 if (rt5668->jack_type & (SND_JACK_BTN_0 | SND_JACK_BTN_1 |
1099 SND_JACK_BTN_2 | SND_JACK_BTN_3))
1100 schedule_delayed_work(&rt5668->jd_check_work, 0);
1102 cancel_delayed_work_sync(&rt5668->jd_check_work);
1104 mutex_unlock(&rt5668->calibrate_mutex);
1107 static const struct snd_kcontrol_new rt5668_snd_controls[] = {
1108 /* Headphone Output Volume */
1109 SOC_DOUBLE_R_TLV("Headphone Playback Volume", RT5668_HPL_GAIN,
1110 RT5668_HPR_GAIN, RT5668_G_HP_SFT, 15, 1, hp_vol_tlv),
1112 /* DAC Digital Volume */
1113 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5668_DAC1_DIG_VOL,
1114 RT5668_L_VOL_SFT, RT5668_R_VOL_SFT, 175, 0, dac_vol_tlv),
1116 /* IN Boost Volume */
1117 SOC_SINGLE_TLV("CBJ Boost Volume", RT5668_CBJ_BST_CTRL,
1118 RT5668_BST_CBJ_SFT, 8, 0, bst_tlv),
1120 /* ADC Digital Volume Control */
1121 SOC_DOUBLE("STO1 ADC Capture Switch", RT5668_STO1_ADC_DIG_VOL,
1122 RT5668_L_MUTE_SFT, RT5668_R_MUTE_SFT, 1, 1),
1123 SOC_DOUBLE_TLV("STO1 ADC Capture Volume", RT5668_STO1_ADC_DIG_VOL,
1124 RT5668_L_VOL_SFT, RT5668_R_VOL_SFT, 127, 0, adc_vol_tlv),
1126 /* ADC Boost Volume Control */
1127 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5668_STO1_ADC_BOOST,
1128 RT5668_STO1_ADC_L_BST_SFT, RT5668_STO1_ADC_R_BST_SFT,
1133 static int rt5668_div_sel(struct rt5668_priv *rt5668,
1134 int target, const int div[], int size)
1138 if (rt5668->sysclk < target) {
1139 pr_err("sysclk rate %d is too low\n",
1144 for (i = 0; i < size - 1; i++) {
1145 pr_info("div[%d]=%d\n", i, div[i]);
1146 if (target * div[i] == rt5668->sysclk)
1148 if (target * div[i + 1] > rt5668->sysclk) {
1149 pr_err("can't find div for sysclk %d\n",
1155 if (target * div[i] < rt5668->sysclk)
1156 pr_err("sysclk rate %d is too high\n",
1164 * set_dmic_clk - Set parameter of dmic.
1167 * @kcontrol: The kcontrol of this widget.
1170 * Choose dmic clock between 1MHz and 3MHz.
1171 * It is better for clock to approximate 3MHz.
1173 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
1174 struct snd_kcontrol *kcontrol, int event)
1176 struct snd_soc_component *component =
1177 snd_soc_dapm_to_component(w->dapm);
1178 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
1180 static const int div[] = {2, 4, 6, 8, 12, 16, 24, 32, 48, 64, 96, 128};
1182 idx = rt5668_div_sel(rt5668, 1500000, div, ARRAY_SIZE(div));
1184 snd_soc_component_update_bits(component, RT5668_DMIC_CTRL_1,
1185 RT5668_DMIC_CLK_MASK, idx << RT5668_DMIC_CLK_SFT);
1190 static int set_filter_clk(struct snd_soc_dapm_widget *w,
1191 struct snd_kcontrol *kcontrol, int event)
1193 struct snd_soc_component *component =
1194 snd_soc_dapm_to_component(w->dapm);
1195 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
1196 int ref, val, reg, idx = -EINVAL;
1197 static const int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32, 48};
1199 val = snd_soc_component_read32(component, RT5668_GPIO_CTRL_1) &
1200 RT5668_GP4_PIN_MASK;
1201 if (w->shift == RT5668_PWR_ADC_S1F_BIT &&
1202 val == RT5668_GP4_PIN_ADCDAT2)
1203 ref = 256 * rt5668->lrck[RT5668_AIF2];
1205 ref = 256 * rt5668->lrck[RT5668_AIF1];
1207 idx = rt5668_div_sel(rt5668, ref, div, ARRAY_SIZE(div));
1209 if (w->shift == RT5668_PWR_ADC_S1F_BIT)
1210 reg = RT5668_PLL_TRACK_3;
1212 reg = RT5668_PLL_TRACK_2;
1214 snd_soc_component_update_bits(component, reg,
1215 RT5668_FILTER_CLK_SEL_MASK, idx << RT5668_FILTER_CLK_SEL_SFT);
1220 static int is_sys_clk_from_pll1(struct snd_soc_dapm_widget *w,
1221 struct snd_soc_dapm_widget *sink)
1224 struct snd_soc_component *component =
1225 snd_soc_dapm_to_component(w->dapm);
1227 val = snd_soc_component_read32(component, RT5668_GLB_CLK);
1228 val &= RT5668_SCLK_SRC_MASK;
1229 if (val == RT5668_SCLK_SRC_PLL1)
1235 static int is_using_asrc(struct snd_soc_dapm_widget *w,
1236 struct snd_soc_dapm_widget *sink)
1238 unsigned int reg, shift, val;
1239 struct snd_soc_component *component =
1240 snd_soc_dapm_to_component(w->dapm);
1243 case RT5668_ADC_STO1_ASRC_SFT:
1244 reg = RT5668_PLL_TRACK_3;
1245 shift = RT5668_FILTER_CLK_SEL_SFT;
1247 case RT5668_DAC_STO1_ASRC_SFT:
1248 reg = RT5668_PLL_TRACK_2;
1249 shift = RT5668_FILTER_CLK_SEL_SFT;
1255 val = (snd_soc_component_read32(component, reg) >> shift) & 0xf;
1257 case RT5668_CLK_SEL_I2S1_ASRC:
1258 case RT5668_CLK_SEL_I2S2_ASRC:
1267 static const struct snd_kcontrol_new rt5668_sto1_adc_l_mix[] = {
1268 SOC_DAPM_SINGLE("ADC1 Switch", RT5668_STO1_ADC_MIXER,
1269 RT5668_M_STO1_ADC_L1_SFT, 1, 1),
1270 SOC_DAPM_SINGLE("ADC2 Switch", RT5668_STO1_ADC_MIXER,
1271 RT5668_M_STO1_ADC_L2_SFT, 1, 1),
1274 static const struct snd_kcontrol_new rt5668_sto1_adc_r_mix[] = {
1275 SOC_DAPM_SINGLE("ADC1 Switch", RT5668_STO1_ADC_MIXER,
1276 RT5668_M_STO1_ADC_R1_SFT, 1, 1),
1277 SOC_DAPM_SINGLE("ADC2 Switch", RT5668_STO1_ADC_MIXER,
1278 RT5668_M_STO1_ADC_R2_SFT, 1, 1),
1281 static const struct snd_kcontrol_new rt5668_dac_l_mix[] = {
1282 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5668_AD_DA_MIXER,
1283 RT5668_M_ADCMIX_L_SFT, 1, 1),
1284 SOC_DAPM_SINGLE("DAC1 Switch", RT5668_AD_DA_MIXER,
1285 RT5668_M_DAC1_L_SFT, 1, 1),
1288 static const struct snd_kcontrol_new rt5668_dac_r_mix[] = {
1289 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5668_AD_DA_MIXER,
1290 RT5668_M_ADCMIX_R_SFT, 1, 1),
1291 SOC_DAPM_SINGLE("DAC1 Switch", RT5668_AD_DA_MIXER,
1292 RT5668_M_DAC1_R_SFT, 1, 1),
1295 static const struct snd_kcontrol_new rt5668_sto1_dac_l_mix[] = {
1296 SOC_DAPM_SINGLE("DAC L1 Switch", RT5668_STO1_DAC_MIXER,
1297 RT5668_M_DAC_L1_STO_L_SFT, 1, 1),
1298 SOC_DAPM_SINGLE("DAC R1 Switch", RT5668_STO1_DAC_MIXER,
1299 RT5668_M_DAC_R1_STO_L_SFT, 1, 1),
1302 static const struct snd_kcontrol_new rt5668_sto1_dac_r_mix[] = {
1303 SOC_DAPM_SINGLE("DAC L1 Switch", RT5668_STO1_DAC_MIXER,
1304 RT5668_M_DAC_L1_STO_R_SFT, 1, 1),
1305 SOC_DAPM_SINGLE("DAC R1 Switch", RT5668_STO1_DAC_MIXER,
1306 RT5668_M_DAC_R1_STO_R_SFT, 1, 1),
1309 /* Analog Input Mixer */
1310 static const struct snd_kcontrol_new rt5668_rec1_l_mix[] = {
1311 SOC_DAPM_SINGLE("CBJ Switch", RT5668_REC_MIXER,
1312 RT5668_M_CBJ_RM1_L_SFT, 1, 1),
1315 /* STO1 ADC1 Source */
1316 /* MX-26 [13] [5] */
1317 static const char * const rt5668_sto1_adc1_src[] = {
1321 static SOC_ENUM_SINGLE_DECL(
1322 rt5668_sto1_adc1l_enum, RT5668_STO1_ADC_MIXER,
1323 RT5668_STO1_ADC1L_SRC_SFT, rt5668_sto1_adc1_src);
1325 static const struct snd_kcontrol_new rt5668_sto1_adc1l_mux =
1326 SOC_DAPM_ENUM("Stereo1 ADC1L Source", rt5668_sto1_adc1l_enum);
1328 static SOC_ENUM_SINGLE_DECL(
1329 rt5668_sto1_adc1r_enum, RT5668_STO1_ADC_MIXER,
1330 RT5668_STO1_ADC1R_SRC_SFT, rt5668_sto1_adc1_src);
1332 static const struct snd_kcontrol_new rt5668_sto1_adc1r_mux =
1333 SOC_DAPM_ENUM("Stereo1 ADC1L Source", rt5668_sto1_adc1r_enum);
1335 /* STO1 ADC Source */
1336 /* MX-26 [11:10] [3:2] */
1337 static const char * const rt5668_sto1_adc_src[] = {
1341 static SOC_ENUM_SINGLE_DECL(
1342 rt5668_sto1_adcl_enum, RT5668_STO1_ADC_MIXER,
1343 RT5668_STO1_ADCL_SRC_SFT, rt5668_sto1_adc_src);
1345 static const struct snd_kcontrol_new rt5668_sto1_adcl_mux =
1346 SOC_DAPM_ENUM("Stereo1 ADCL Source", rt5668_sto1_adcl_enum);
1348 static SOC_ENUM_SINGLE_DECL(
1349 rt5668_sto1_adcr_enum, RT5668_STO1_ADC_MIXER,
1350 RT5668_STO1_ADCR_SRC_SFT, rt5668_sto1_adc_src);
1352 static const struct snd_kcontrol_new rt5668_sto1_adcr_mux =
1353 SOC_DAPM_ENUM("Stereo1 ADCR Source", rt5668_sto1_adcr_enum);
1355 /* STO1 ADC2 Source */
1356 /* MX-26 [12] [4] */
1357 static const char * const rt5668_sto1_adc2_src[] = {
1361 static SOC_ENUM_SINGLE_DECL(
1362 rt5668_sto1_adc2l_enum, RT5668_STO1_ADC_MIXER,
1363 RT5668_STO1_ADC2L_SRC_SFT, rt5668_sto1_adc2_src);
1365 static const struct snd_kcontrol_new rt5668_sto1_adc2l_mux =
1366 SOC_DAPM_ENUM("Stereo1 ADC2L Source", rt5668_sto1_adc2l_enum);
1368 static SOC_ENUM_SINGLE_DECL(
1369 rt5668_sto1_adc2r_enum, RT5668_STO1_ADC_MIXER,
1370 RT5668_STO1_ADC2R_SRC_SFT, rt5668_sto1_adc2_src);
1372 static const struct snd_kcontrol_new rt5668_sto1_adc2r_mux =
1373 SOC_DAPM_ENUM("Stereo1 ADC2R Source", rt5668_sto1_adc2r_enum);
1375 /* MX-79 [6:4] I2S1 ADC data location */
1376 static const unsigned int rt5668_if1_adc_slot_values[] = {
1383 static const char * const rt5668_if1_adc_slot_src[] = {
1384 "Slot 0", "Slot 2", "Slot 4", "Slot 6"
1387 static SOC_VALUE_ENUM_SINGLE_DECL(rt5668_if1_adc_slot_enum,
1388 RT5668_TDM_CTRL, RT5668_TDM_ADC_LCA_SFT, RT5668_TDM_ADC_LCA_MASK,
1389 rt5668_if1_adc_slot_src, rt5668_if1_adc_slot_values);
1391 static const struct snd_kcontrol_new rt5668_if1_adc_slot_mux =
1392 SOC_DAPM_ENUM("IF1 ADC Slot location", rt5668_if1_adc_slot_enum);
1394 /* Analog DAC L1 Source, Analog DAC R1 Source*/
1395 /* MX-2B [4], MX-2B [0]*/
1396 static const char * const rt5668_alg_dac1_src[] = {
1397 "Stereo1 DAC Mixer", "DAC1"
1400 static SOC_ENUM_SINGLE_DECL(
1401 rt5668_alg_dac_l1_enum, RT5668_A_DAC1_MUX,
1402 RT5668_A_DACL1_SFT, rt5668_alg_dac1_src);
1404 static const struct snd_kcontrol_new rt5668_alg_dac_l1_mux =
1405 SOC_DAPM_ENUM("Analog DAC L1 Source", rt5668_alg_dac_l1_enum);
1407 static SOC_ENUM_SINGLE_DECL(
1408 rt5668_alg_dac_r1_enum, RT5668_A_DAC1_MUX,
1409 RT5668_A_DACR1_SFT, rt5668_alg_dac1_src);
1411 static const struct snd_kcontrol_new rt5668_alg_dac_r1_mux =
1412 SOC_DAPM_ENUM("Analog DAC R1 Source", rt5668_alg_dac_r1_enum);
1415 static const struct snd_kcontrol_new hpol_switch =
1416 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5668_HP_CTRL_1,
1417 RT5668_L_MUTE_SFT, 1, 1);
1418 static const struct snd_kcontrol_new hpor_switch =
1419 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5668_HP_CTRL_1,
1420 RT5668_R_MUTE_SFT, 1, 1);
1422 static int rt5668_hp_event(struct snd_soc_dapm_widget *w,
1423 struct snd_kcontrol *kcontrol, int event)
1425 struct snd_soc_component *component =
1426 snd_soc_dapm_to_component(w->dapm);
1429 case SND_SOC_DAPM_PRE_PMU:
1430 snd_soc_component_write(component,
1431 RT5668_HP_LOGIC_CTRL_2, 0x0012);
1432 snd_soc_component_write(component,
1433 RT5668_HP_CTRL_2, 0x6000);
1434 snd_soc_component_update_bits(component, RT5668_STO_NG2_CTRL_1,
1435 RT5668_NG2_EN_MASK, RT5668_NG2_EN);
1436 snd_soc_component_update_bits(component,
1437 RT5668_DEPOP_1, 0x60, 0x60);
1440 case SND_SOC_DAPM_POST_PMD:
1441 snd_soc_component_update_bits(component,
1442 RT5668_DEPOP_1, 0x60, 0x0);
1443 snd_soc_component_write(component,
1444 RT5668_HP_CTRL_2, 0x0000);
1455 static int set_dmic_power(struct snd_soc_dapm_widget *w,
1456 struct snd_kcontrol *kcontrol, int event)
1459 case SND_SOC_DAPM_POST_PMU:
1460 /*Add delay to avoid pop noise*/
1471 static int rt5655_set_verf(struct snd_soc_dapm_widget *w,
1472 struct snd_kcontrol *kcontrol, int event)
1474 struct snd_soc_component *component =
1475 snd_soc_dapm_to_component(w->dapm);
1478 case SND_SOC_DAPM_PRE_PMU:
1480 case RT5668_PWR_VREF1_BIT:
1481 snd_soc_component_update_bits(component,
1482 RT5668_PWR_ANLG_1, RT5668_PWR_FV1, 0);
1485 case RT5668_PWR_VREF2_BIT:
1486 snd_soc_component_update_bits(component,
1487 RT5668_PWR_ANLG_1, RT5668_PWR_FV2, 0);
1495 case SND_SOC_DAPM_POST_PMU:
1496 usleep_range(15000, 20000);
1498 case RT5668_PWR_VREF1_BIT:
1499 snd_soc_component_update_bits(component,
1500 RT5668_PWR_ANLG_1, RT5668_PWR_FV1,
1504 case RT5668_PWR_VREF2_BIT:
1505 snd_soc_component_update_bits(component,
1506 RT5668_PWR_ANLG_1, RT5668_PWR_FV2,
1522 static const unsigned int rt5668_adcdat_pin_values[] = {
1527 static const char * const rt5668_adcdat_pin_select[] = {
1532 static SOC_VALUE_ENUM_SINGLE_DECL(rt5668_adcdat_pin_enum,
1533 RT5668_GPIO_CTRL_1, RT5668_GP4_PIN_SFT, RT5668_GP4_PIN_MASK,
1534 rt5668_adcdat_pin_select, rt5668_adcdat_pin_values);
1536 static const struct snd_kcontrol_new rt5668_adcdat_pin_ctrl =
1537 SOC_DAPM_ENUM("ADCDAT", rt5668_adcdat_pin_enum);
1539 static const struct snd_soc_dapm_widget rt5668_dapm_widgets[] = {
1540 SND_SOC_DAPM_SUPPLY("LDO2", RT5668_PWR_ANLG_3, RT5668_PWR_LDO2_BIT,
1542 SND_SOC_DAPM_SUPPLY("PLL1", RT5668_PWR_ANLG_3, RT5668_PWR_PLL_BIT,
1544 SND_SOC_DAPM_SUPPLY("PLL2B", RT5668_PWR_ANLG_3, RT5668_PWR_PLL2B_BIT,
1546 SND_SOC_DAPM_SUPPLY("PLL2F", RT5668_PWR_ANLG_3, RT5668_PWR_PLL2F_BIT,
1548 SND_SOC_DAPM_SUPPLY("Vref1", RT5668_PWR_ANLG_1, RT5668_PWR_VREF1_BIT, 0,
1549 rt5655_set_verf, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
1550 SND_SOC_DAPM_SUPPLY("Vref2", RT5668_PWR_ANLG_1, RT5668_PWR_VREF2_BIT, 0,
1551 rt5655_set_verf, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
1554 SND_SOC_DAPM_SUPPLY_S("DAC STO1 ASRC", 1, RT5668_PLL_TRACK_1,
1555 RT5668_DAC_STO1_ASRC_SFT, 0, NULL, 0),
1556 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5668_PLL_TRACK_1,
1557 RT5668_ADC_STO1_ASRC_SFT, 0, NULL, 0),
1558 SND_SOC_DAPM_SUPPLY_S("AD ASRC", 1, RT5668_PLL_TRACK_1,
1559 RT5668_AD_ASRC_SFT, 0, NULL, 0),
1560 SND_SOC_DAPM_SUPPLY_S("DA ASRC", 1, RT5668_PLL_TRACK_1,
1561 RT5668_DA_ASRC_SFT, 0, NULL, 0),
1562 SND_SOC_DAPM_SUPPLY_S("DMIC ASRC", 1, RT5668_PLL_TRACK_1,
1563 RT5668_DMIC_ASRC_SFT, 0, NULL, 0),
1566 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5668_PWR_ANLG_2, RT5668_PWR_MB1_BIT,
1568 SND_SOC_DAPM_SUPPLY("MICBIAS2", RT5668_PWR_ANLG_2, RT5668_PWR_MB2_BIT,
1572 SND_SOC_DAPM_INPUT("DMIC L1"),
1573 SND_SOC_DAPM_INPUT("DMIC R1"),
1575 SND_SOC_DAPM_INPUT("IN1P"),
1577 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1578 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1579 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5668_DMIC_CTRL_1,
1580 RT5668_DMIC_1_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
1583 SND_SOC_DAPM_PGA("BST1 CBJ", SND_SOC_NOPM,
1586 SND_SOC_DAPM_SUPPLY("CBJ Power", RT5668_PWR_ANLG_3,
1587 RT5668_PWR_CBJ_BIT, 0, NULL, 0),
1590 SND_SOC_DAPM_MIXER("RECMIX1L", SND_SOC_NOPM, 0, 0, rt5668_rec1_l_mix,
1591 ARRAY_SIZE(rt5668_rec1_l_mix)),
1592 SND_SOC_DAPM_SUPPLY("RECMIX1L Power", RT5668_PWR_ANLG_2,
1593 RT5668_PWR_RM1_L_BIT, 0, NULL, 0),
1596 SND_SOC_DAPM_ADC("ADC1 L", NULL, SND_SOC_NOPM, 0, 0),
1597 SND_SOC_DAPM_ADC("ADC1 R", NULL, SND_SOC_NOPM, 0, 0),
1599 SND_SOC_DAPM_SUPPLY("ADC1 L Power", RT5668_PWR_DIG_1,
1600 RT5668_PWR_ADC_L1_BIT, 0, NULL, 0),
1601 SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5668_PWR_DIG_1,
1602 RT5668_PWR_ADC_R1_BIT, 0, NULL, 0),
1603 SND_SOC_DAPM_SUPPLY("ADC1 clock", RT5668_CHOP_ADC,
1604 RT5668_CKGEN_ADC1_SFT, 0, NULL, 0),
1607 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1608 &rt5668_sto1_adc1l_mux),
1609 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1610 &rt5668_sto1_adc1r_mux),
1611 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1612 &rt5668_sto1_adc2l_mux),
1613 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1614 &rt5668_sto1_adc2r_mux),
1615 SND_SOC_DAPM_MUX("Stereo1 ADC L Mux", SND_SOC_NOPM, 0, 0,
1616 &rt5668_sto1_adcl_mux),
1617 SND_SOC_DAPM_MUX("Stereo1 ADC R Mux", SND_SOC_NOPM, 0, 0,
1618 &rt5668_sto1_adcr_mux),
1619 SND_SOC_DAPM_MUX("IF1_ADC Mux", SND_SOC_NOPM, 0, 0,
1620 &rt5668_if1_adc_slot_mux),
1623 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5668_PWR_DIG_2,
1624 RT5668_PWR_ADC_S1F_BIT, 0, set_filter_clk,
1625 SND_SOC_DAPM_PRE_PMU),
1626 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", RT5668_STO1_ADC_DIG_VOL,
1627 RT5668_L_MUTE_SFT, 1, rt5668_sto1_adc_l_mix,
1628 ARRAY_SIZE(rt5668_sto1_adc_l_mix)),
1629 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", RT5668_STO1_ADC_DIG_VOL,
1630 RT5668_R_MUTE_SFT, 1, rt5668_sto1_adc_r_mix,
1631 ARRAY_SIZE(rt5668_sto1_adc_r_mix)),
1634 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1636 /* Digital Interface */
1637 SND_SOC_DAPM_SUPPLY("I2S1", RT5668_PWR_DIG_1, RT5668_PWR_I2S1_BIT,
1639 SND_SOC_DAPM_SUPPLY("I2S2", RT5668_PWR_DIG_1, RT5668_PWR_I2S2_BIT,
1641 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1642 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1643 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1645 /* Digital Interface Select */
1646 SND_SOC_DAPM_MUX("IF1 01 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
1647 &rt5668_if1_01_adc_swap_mux),
1648 SND_SOC_DAPM_MUX("IF1 23 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
1649 &rt5668_if1_23_adc_swap_mux),
1650 SND_SOC_DAPM_MUX("IF1 45 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
1651 &rt5668_if1_45_adc_swap_mux),
1652 SND_SOC_DAPM_MUX("IF1 67 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
1653 &rt5668_if1_67_adc_swap_mux),
1654 SND_SOC_DAPM_MUX("IF2 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
1655 &rt5668_if2_adc_swap_mux),
1657 SND_SOC_DAPM_MUX("ADCDAT Mux", SND_SOC_NOPM, 0, 0,
1658 &rt5668_adcdat_pin_ctrl),
1660 /* Audio Interface */
1661 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0,
1662 RT5668_I2S1_SDP, RT5668_SEL_ADCDAT_SFT, 1),
1663 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0,
1664 RT5668_I2S2_SDP, RT5668_I2S2_PIN_CFG_SFT, 1),
1665 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1668 /* DAC mixer before sound effect */
1669 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1670 rt5668_dac_l_mix, ARRAY_SIZE(rt5668_dac_l_mix)),
1671 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1672 rt5668_dac_r_mix, ARRAY_SIZE(rt5668_dac_r_mix)),
1674 /* DAC channel Mux */
1675 SND_SOC_DAPM_MUX("DAC L1 Source", SND_SOC_NOPM, 0, 0,
1676 &rt5668_alg_dac_l1_mux),
1677 SND_SOC_DAPM_MUX("DAC R1 Source", SND_SOC_NOPM, 0, 0,
1678 &rt5668_alg_dac_r1_mux),
1681 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5668_PWR_DIG_2,
1682 RT5668_PWR_DAC_S1F_BIT, 0, set_filter_clk,
1683 SND_SOC_DAPM_PRE_PMU),
1684 SND_SOC_DAPM_MIXER("Stereo1 DAC MIXL", SND_SOC_NOPM, 0, 0,
1685 rt5668_sto1_dac_l_mix, ARRAY_SIZE(rt5668_sto1_dac_l_mix)),
1686 SND_SOC_DAPM_MIXER("Stereo1 DAC MIXR", SND_SOC_NOPM, 0, 0,
1687 rt5668_sto1_dac_r_mix, ARRAY_SIZE(rt5668_sto1_dac_r_mix)),
1690 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5668_PWR_DIG_1,
1691 RT5668_PWR_DAC_L1_BIT, 0),
1692 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5668_PWR_DIG_1,
1693 RT5668_PWR_DAC_R1_BIT, 0),
1694 SND_SOC_DAPM_SUPPLY_S("DAC 1 Clock", 3, RT5668_CHOP_DAC,
1695 RT5668_CKGEN_DAC1_SFT, 0, NULL, 0),
1698 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5668_hp_event,
1699 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU),
1701 SND_SOC_DAPM_SUPPLY("HP Amp L", RT5668_PWR_ANLG_1,
1702 RT5668_PWR_HA_L_BIT, 0, NULL, 0),
1703 SND_SOC_DAPM_SUPPLY("HP Amp R", RT5668_PWR_ANLG_1,
1704 RT5668_PWR_HA_R_BIT, 0, NULL, 0),
1705 SND_SOC_DAPM_SUPPLY_S("Charge Pump", 1, RT5668_DEPOP_1,
1706 RT5668_PUMP_EN_SFT, 0, NULL, 0),
1707 SND_SOC_DAPM_SUPPLY_S("Capless", 2, RT5668_DEPOP_1,
1708 RT5668_CAPLESS_EN_SFT, 0, NULL, 0),
1710 SND_SOC_DAPM_SWITCH("HPOL Playback", SND_SOC_NOPM, 0, 0,
1712 SND_SOC_DAPM_SWITCH("HPOR Playback", SND_SOC_NOPM, 0, 0,
1716 SND_SOC_DAPM_SUPPLY("CLKDET SYS", RT5668_CLK_DET,
1717 RT5668_SYS_CLK_DET_SFT, 0, NULL, 0),
1718 SND_SOC_DAPM_SUPPLY("CLKDET PLL1", RT5668_CLK_DET,
1719 RT5668_PLL1_CLK_DET_SFT, 0, NULL, 0),
1720 SND_SOC_DAPM_SUPPLY("CLKDET PLL2", RT5668_CLK_DET,
1721 RT5668_PLL2_CLK_DET_SFT, 0, NULL, 0),
1722 SND_SOC_DAPM_SUPPLY("CLKDET", RT5668_CLK_DET,
1723 RT5668_POW_CLK_DET_SFT, 0, NULL, 0),
1726 SND_SOC_DAPM_OUTPUT("HPOL"),
1727 SND_SOC_DAPM_OUTPUT("HPOR"),
1731 static const struct snd_soc_dapm_route rt5668_dapm_routes[] = {
1733 {"ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll1},
1734 {"DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll1},
1737 {"ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc},
1738 {"DAC Stereo1 Filter", NULL, "DAC STO1 ASRC", is_using_asrc},
1739 {"ADC STO1 ASRC", NULL, "AD ASRC"},
1740 {"DAC STO1 ASRC", NULL, "DA ASRC"},
1743 {"MICBIAS1", NULL, "Vref1"},
1744 {"MICBIAS1", NULL, "Vref2"},
1745 {"MICBIAS2", NULL, "Vref1"},
1746 {"MICBIAS2", NULL, "Vref2"},
1748 {"CLKDET SYS", NULL, "CLKDET"},
1750 {"IN1P", NULL, "LDO2"},
1752 {"BST1 CBJ", NULL, "IN1P"},
1753 {"BST1 CBJ", NULL, "CBJ Power"},
1754 {"CBJ Power", NULL, "Vref2"},
1756 {"RECMIX1L", "CBJ Switch", "BST1 CBJ"},
1757 {"RECMIX1L", NULL, "RECMIX1L Power"},
1759 {"ADC1 L", NULL, "RECMIX1L"},
1760 {"ADC1 L", NULL, "ADC1 L Power"},
1761 {"ADC1 L", NULL, "ADC1 clock"},
1763 {"DMIC L1", NULL, "DMIC CLK"},
1764 {"DMIC L1", NULL, "DMIC1 Power"},
1765 {"DMIC R1", NULL, "DMIC CLK"},
1766 {"DMIC R1", NULL, "DMIC1 Power"},
1767 {"DMIC CLK", NULL, "DMIC ASRC"},
1769 {"Stereo1 ADC L Mux", "ADC1 L", "ADC1 L"},
1770 {"Stereo1 ADC L Mux", "ADC1 R", "ADC1 R"},
1771 {"Stereo1 ADC R Mux", "ADC1 L", "ADC1 L"},
1772 {"Stereo1 ADC R Mux", "ADC1 R", "ADC1 R"},
1774 {"Stereo1 ADC L1 Mux", "ADC", "Stereo1 ADC L Mux"},
1775 {"Stereo1 ADC L1 Mux", "DAC MIX", "Stereo1 DAC MIXL"},
1776 {"Stereo1 ADC L2 Mux", "DMIC", "DMIC L1"},
1777 {"Stereo1 ADC L2 Mux", "DAC MIX", "Stereo1 DAC MIXL"},
1779 {"Stereo1 ADC R1 Mux", "ADC", "Stereo1 ADC R Mux"},
1780 {"Stereo1 ADC R1 Mux", "DAC MIX", "Stereo1 DAC MIXR"},
1781 {"Stereo1 ADC R2 Mux", "DMIC", "DMIC R1"},
1782 {"Stereo1 ADC R2 Mux", "DAC MIX", "Stereo1 DAC MIXR"},
1784 {"Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux"},
1785 {"Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux"},
1786 {"Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter"},
1788 {"Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux"},
1789 {"Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux"},
1790 {"Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter"},
1792 {"Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL"},
1793 {"Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR"},
1795 {"IF1 01 ADC Swap Mux", "L/R", "Stereo1 ADC MIX"},
1796 {"IF1 01 ADC Swap Mux", "L/L", "Stereo1 ADC MIX"},
1797 {"IF1 01 ADC Swap Mux", "R/L", "Stereo1 ADC MIX"},
1798 {"IF1 01 ADC Swap Mux", "R/R", "Stereo1 ADC MIX"},
1799 {"IF1 23 ADC Swap Mux", "L/R", "Stereo1 ADC MIX"},
1800 {"IF1 23 ADC Swap Mux", "R/L", "Stereo1 ADC MIX"},
1801 {"IF1 23 ADC Swap Mux", "L/L", "Stereo1 ADC MIX"},
1802 {"IF1 23 ADC Swap Mux", "R/R", "Stereo1 ADC MIX"},
1803 {"IF1 45 ADC Swap Mux", "L/R", "Stereo1 ADC MIX"},
1804 {"IF1 45 ADC Swap Mux", "R/L", "Stereo1 ADC MIX"},
1805 {"IF1 45 ADC Swap Mux", "L/L", "Stereo1 ADC MIX"},
1806 {"IF1 45 ADC Swap Mux", "R/R", "Stereo1 ADC MIX"},
1807 {"IF1 67 ADC Swap Mux", "L/R", "Stereo1 ADC MIX"},
1808 {"IF1 67 ADC Swap Mux", "R/L", "Stereo1 ADC MIX"},
1809 {"IF1 67 ADC Swap Mux", "L/L", "Stereo1 ADC MIX"},
1810 {"IF1 67 ADC Swap Mux", "R/R", "Stereo1 ADC MIX"},
1812 {"IF1_ADC Mux", "Slot 0", "IF1 01 ADC Swap Mux"},
1813 {"IF1_ADC Mux", "Slot 2", "IF1 23 ADC Swap Mux"},
1814 {"IF1_ADC Mux", "Slot 4", "IF1 45 ADC Swap Mux"},
1815 {"IF1_ADC Mux", "Slot 6", "IF1 67 ADC Swap Mux"},
1816 {"IF1_ADC Mux", NULL, "I2S1"},
1817 {"ADCDAT Mux", "ADCDAT1", "IF1_ADC Mux"},
1818 {"AIF1TX", NULL, "ADCDAT Mux"},
1819 {"IF2 ADC Swap Mux", "L/R", "Stereo1 ADC MIX"},
1820 {"IF2 ADC Swap Mux", "R/L", "Stereo1 ADC MIX"},
1821 {"IF2 ADC Swap Mux", "L/L", "Stereo1 ADC MIX"},
1822 {"IF2 ADC Swap Mux", "R/R", "Stereo1 ADC MIX"},
1823 {"ADCDAT Mux", "ADCDAT2", "IF2 ADC Swap Mux"},
1824 {"AIF2TX", NULL, "ADCDAT Mux"},
1826 {"IF1 DAC1 L", NULL, "AIF1RX"},
1827 {"IF1 DAC1 L", NULL, "I2S1"},
1828 {"IF1 DAC1 L", NULL, "DAC Stereo1 Filter"},
1829 {"IF1 DAC1 R", NULL, "AIF1RX"},
1830 {"IF1 DAC1 R", NULL, "I2S1"},
1831 {"IF1 DAC1 R", NULL, "DAC Stereo1 Filter"},
1833 {"DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
1834 {"DAC1 MIXL", "DAC1 Switch", "IF1 DAC1 L"},
1835 {"DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
1836 {"DAC1 MIXR", "DAC1 Switch", "IF1 DAC1 R"},
1838 {"Stereo1 DAC MIXL", "DAC L1 Switch", "DAC1 MIXL"},
1839 {"Stereo1 DAC MIXL", "DAC R1 Switch", "DAC1 MIXR"},
1841 {"Stereo1 DAC MIXR", "DAC R1 Switch", "DAC1 MIXR"},
1842 {"Stereo1 DAC MIXR", "DAC L1 Switch", "DAC1 MIXL"},
1844 {"DAC L1 Source", "DAC1", "DAC1 MIXL"},
1845 {"DAC L1 Source", "Stereo1 DAC Mixer", "Stereo1 DAC MIXL"},
1846 {"DAC R1 Source", "DAC1", "DAC1 MIXR"},
1847 {"DAC R1 Source", "Stereo1 DAC Mixer", "Stereo1 DAC MIXR"},
1849 {"DAC L1", NULL, "DAC L1 Source"},
1850 {"DAC R1", NULL, "DAC R1 Source"},
1852 {"DAC L1", NULL, "DAC 1 Clock"},
1853 {"DAC R1", NULL, "DAC 1 Clock"},
1855 {"HP Amp", NULL, "DAC L1"},
1856 {"HP Amp", NULL, "DAC R1"},
1857 {"HP Amp", NULL, "HP Amp L"},
1858 {"HP Amp", NULL, "HP Amp R"},
1859 {"HP Amp", NULL, "Capless"},
1860 {"HP Amp", NULL, "Charge Pump"},
1861 {"HP Amp", NULL, "CLKDET SYS"},
1862 {"HP Amp", NULL, "CBJ Power"},
1863 {"HP Amp", NULL, "Vref2"},
1864 {"HPOL Playback", "Switch", "HP Amp"},
1865 {"HPOR Playback", "Switch", "HP Amp"},
1866 {"HPOL", NULL, "HPOL Playback"},
1867 {"HPOR", NULL, "HPOR Playback"},
1870 static int rt5668_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
1871 unsigned int rx_mask, int slots, int slot_width)
1873 struct snd_soc_component *component = dai->component;
1874 unsigned int val = 0;
1878 val |= RT5668_TDM_TX_CH_4;
1879 val |= RT5668_TDM_RX_CH_4;
1882 val |= RT5668_TDM_TX_CH_6;
1883 val |= RT5668_TDM_RX_CH_6;
1886 val |= RT5668_TDM_TX_CH_8;
1887 val |= RT5668_TDM_RX_CH_8;
1895 snd_soc_component_update_bits(component, RT5668_TDM_CTRL,
1896 RT5668_TDM_TX_CH_MASK | RT5668_TDM_RX_CH_MASK, val);
1898 switch (slot_width) {
1900 val = RT5668_TDM_CL_16;
1903 val = RT5668_TDM_CL_20;
1906 val = RT5668_TDM_CL_24;
1909 val = RT5668_TDM_CL_32;
1915 snd_soc_component_update_bits(component, RT5668_TDM_TCON_CTRL,
1916 RT5668_TDM_CL_MASK, val);
1922 static int rt5668_hw_params(struct snd_pcm_substream *substream,
1923 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1925 struct snd_soc_component *component = dai->component;
1926 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
1927 unsigned int len_1 = 0, len_2 = 0;
1928 int pre_div, frame_size;
1930 rt5668->lrck[dai->id] = params_rate(params);
1931 pre_div = rl6231_get_clk_info(rt5668->sysclk, rt5668->lrck[dai->id]);
1933 frame_size = snd_soc_params_to_frame_size(params);
1934 if (frame_size < 0) {
1935 dev_err(component->dev, "Unsupported frame size: %d\n",
1940 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
1941 rt5668->lrck[dai->id], pre_div, dai->id);
1943 switch (params_width(params)) {
1947 len_1 |= RT5668_I2S1_DL_20;
1948 len_2 |= RT5668_I2S2_DL_20;
1951 len_1 |= RT5668_I2S1_DL_24;
1952 len_2 |= RT5668_I2S2_DL_24;
1955 len_1 |= RT5668_I2S1_DL_32;
1956 len_2 |= RT5668_I2S2_DL_24;
1959 len_1 |= RT5668_I2S2_DL_8;
1960 len_2 |= RT5668_I2S2_DL_8;
1968 snd_soc_component_update_bits(component, RT5668_I2S1_SDP,
1969 RT5668_I2S1_DL_MASK, len_1);
1970 if (rt5668->master[RT5668_AIF1]) {
1971 snd_soc_component_update_bits(component,
1972 RT5668_ADDA_CLK_1, RT5668_I2S_M_DIV_MASK,
1973 pre_div << RT5668_I2S_M_DIV_SFT);
1975 if (params_channels(params) == 1) /* mono mode */
1976 snd_soc_component_update_bits(component,
1977 RT5668_I2S1_SDP, RT5668_I2S1_MONO_MASK,
1978 RT5668_I2S1_MONO_EN);
1980 snd_soc_component_update_bits(component,
1981 RT5668_I2S1_SDP, RT5668_I2S1_MONO_MASK,
1982 RT5668_I2S1_MONO_DIS);
1985 snd_soc_component_update_bits(component, RT5668_I2S2_SDP,
1986 RT5668_I2S2_DL_MASK, len_2);
1987 if (rt5668->master[RT5668_AIF2]) {
1988 snd_soc_component_update_bits(component,
1989 RT5668_I2S_M_CLK_CTRL_1, RT5668_I2S2_M_PD_MASK,
1990 pre_div << RT5668_I2S2_M_PD_SFT);
1992 if (params_channels(params) == 1) /* mono mode */
1993 snd_soc_component_update_bits(component,
1994 RT5668_I2S2_SDP, RT5668_I2S2_MONO_MASK,
1995 RT5668_I2S2_MONO_EN);
1997 snd_soc_component_update_bits(component,
1998 RT5668_I2S2_SDP, RT5668_I2S2_MONO_MASK,
1999 RT5668_I2S2_MONO_DIS);
2002 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2009 static int rt5668_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2011 struct snd_soc_component *component = dai->component;
2012 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
2013 unsigned int reg_val = 0, tdm_ctrl = 0;
2015 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2016 case SND_SOC_DAIFMT_CBM_CFM:
2017 rt5668->master[dai->id] = 1;
2019 case SND_SOC_DAIFMT_CBS_CFS:
2020 rt5668->master[dai->id] = 0;
2026 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2027 case SND_SOC_DAIFMT_NB_NF:
2029 case SND_SOC_DAIFMT_IB_NF:
2030 reg_val |= RT5668_I2S_BP_INV;
2031 tdm_ctrl |= RT5668_TDM_S_BP_INV;
2033 case SND_SOC_DAIFMT_NB_IF:
2034 if (dai->id == RT5668_AIF1)
2035 tdm_ctrl |= RT5668_TDM_S_LP_INV | RT5668_TDM_M_BP_INV;
2039 case SND_SOC_DAIFMT_IB_IF:
2040 if (dai->id == RT5668_AIF1)
2041 tdm_ctrl |= RT5668_TDM_S_BP_INV | RT5668_TDM_S_LP_INV |
2042 RT5668_TDM_M_BP_INV | RT5668_TDM_M_LP_INV;
2050 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2051 case SND_SOC_DAIFMT_I2S:
2053 case SND_SOC_DAIFMT_LEFT_J:
2054 reg_val |= RT5668_I2S_DF_LEFT;
2055 tdm_ctrl |= RT5668_TDM_DF_LEFT;
2057 case SND_SOC_DAIFMT_DSP_A:
2058 reg_val |= RT5668_I2S_DF_PCM_A;
2059 tdm_ctrl |= RT5668_TDM_DF_PCM_A;
2061 case SND_SOC_DAIFMT_DSP_B:
2062 reg_val |= RT5668_I2S_DF_PCM_B;
2063 tdm_ctrl |= RT5668_TDM_DF_PCM_B;
2071 snd_soc_component_update_bits(component, RT5668_I2S1_SDP,
2072 RT5668_I2S_DF_MASK, reg_val);
2073 snd_soc_component_update_bits(component, RT5668_TDM_TCON_CTRL,
2074 RT5668_TDM_MS_MASK | RT5668_TDM_S_BP_MASK |
2075 RT5668_TDM_DF_MASK | RT5668_TDM_M_BP_MASK |
2076 RT5668_TDM_M_LP_MASK | RT5668_TDM_S_LP_MASK,
2077 tdm_ctrl | rt5668->master[dai->id]);
2080 if (rt5668->master[dai->id] == 0)
2081 reg_val |= RT5668_I2S2_MS_S;
2082 snd_soc_component_update_bits(component, RT5668_I2S2_SDP,
2083 RT5668_I2S2_MS_MASK | RT5668_I2S_BP_MASK |
2084 RT5668_I2S_DF_MASK, reg_val);
2087 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2093 static int rt5668_set_component_sysclk(struct snd_soc_component *component,
2094 int clk_id, int source, unsigned int freq, int dir)
2096 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
2097 unsigned int reg_val = 0, src = 0;
2099 if (freq == rt5668->sysclk && clk_id == rt5668->sysclk_src)
2103 case RT5668_SCLK_S_MCLK:
2104 reg_val |= RT5668_SCLK_SRC_MCLK;
2105 src = RT5668_CLK_SRC_MCLK;
2107 case RT5668_SCLK_S_PLL1:
2108 reg_val |= RT5668_SCLK_SRC_PLL1;
2109 src = RT5668_CLK_SRC_PLL1;
2111 case RT5668_SCLK_S_PLL2:
2112 reg_val |= RT5668_SCLK_SRC_PLL2;
2113 src = RT5668_CLK_SRC_PLL2;
2115 case RT5668_SCLK_S_RCCLK:
2116 reg_val |= RT5668_SCLK_SRC_RCCLK;
2117 src = RT5668_CLK_SRC_RCCLK;
2120 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2123 snd_soc_component_update_bits(component, RT5668_GLB_CLK,
2124 RT5668_SCLK_SRC_MASK, reg_val);
2126 if (rt5668->master[RT5668_AIF2]) {
2127 snd_soc_component_update_bits(component,
2128 RT5668_I2S_M_CLK_CTRL_1, RT5668_I2S2_SRC_MASK,
2129 src << RT5668_I2S2_SRC_SFT);
2132 rt5668->sysclk = freq;
2133 rt5668->sysclk_src = clk_id;
2135 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
2141 static int rt5668_set_component_pll(struct snd_soc_component *component,
2142 int pll_id, int source, unsigned int freq_in,
2143 unsigned int freq_out)
2145 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
2146 struct rl6231_pll_code pll_code;
2149 if (source == rt5668->pll_src && freq_in == rt5668->pll_in &&
2150 freq_out == rt5668->pll_out)
2153 if (!freq_in || !freq_out) {
2154 dev_dbg(component->dev, "PLL disabled\n");
2157 rt5668->pll_out = 0;
2158 snd_soc_component_update_bits(component, RT5668_GLB_CLK,
2159 RT5668_SCLK_SRC_MASK, RT5668_SCLK_SRC_MCLK);
2164 case RT5668_PLL1_S_MCLK:
2165 snd_soc_component_update_bits(component, RT5668_GLB_CLK,
2166 RT5668_PLL1_SRC_MASK, RT5668_PLL1_SRC_MCLK);
2168 case RT5668_PLL1_S_BCLK1:
2169 snd_soc_component_update_bits(component, RT5668_GLB_CLK,
2170 RT5668_PLL1_SRC_MASK, RT5668_PLL1_SRC_BCLK1);
2173 dev_err(component->dev, "Unknown PLL Source %d\n", source);
2177 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2179 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
2183 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
2184 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2185 pll_code.n_code, pll_code.k_code);
2187 snd_soc_component_write(component, RT5668_PLL_CTRL_1,
2188 pll_code.n_code << RT5668_PLL_N_SFT | pll_code.k_code);
2189 snd_soc_component_write(component, RT5668_PLL_CTRL_2,
2190 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5668_PLL_M_SFT |
2191 pll_code.m_bp << RT5668_PLL_M_BP_SFT);
2193 rt5668->pll_in = freq_in;
2194 rt5668->pll_out = freq_out;
2195 rt5668->pll_src = source;
2200 static int rt5668_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
2202 struct snd_soc_component *component = dai->component;
2203 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
2205 rt5668->bclk[dai->id] = ratio;
2209 snd_soc_component_update_bits(component, RT5668_ADDA_CLK_2,
2210 RT5668_I2S2_BCLK_MS2_MASK,
2211 RT5668_I2S2_BCLK_MS2_64);
2214 snd_soc_component_update_bits(component, RT5668_ADDA_CLK_2,
2215 RT5668_I2S2_BCLK_MS2_MASK,
2216 RT5668_I2S2_BCLK_MS2_32);
2219 dev_err(dai->dev, "Invalid bclk ratio %d\n", ratio);
2226 static int rt5668_set_bias_level(struct snd_soc_component *component,
2227 enum snd_soc_bias_level level)
2229 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
2232 case SND_SOC_BIAS_PREPARE:
2233 regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_1,
2234 RT5668_PWR_MB | RT5668_PWR_BG,
2235 RT5668_PWR_MB | RT5668_PWR_BG);
2236 regmap_update_bits(rt5668->regmap, RT5668_PWR_DIG_1,
2237 RT5668_DIG_GATE_CTRL | RT5668_PWR_LDO,
2238 RT5668_DIG_GATE_CTRL | RT5668_PWR_LDO);
2241 case SND_SOC_BIAS_STANDBY:
2242 regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_1,
2243 RT5668_PWR_MB, RT5668_PWR_MB);
2244 regmap_update_bits(rt5668->regmap, RT5668_PWR_DIG_1,
2245 RT5668_DIG_GATE_CTRL, RT5668_DIG_GATE_CTRL);
2247 case SND_SOC_BIAS_OFF:
2248 regmap_update_bits(rt5668->regmap, RT5668_PWR_DIG_1,
2249 RT5668_DIG_GATE_CTRL | RT5668_PWR_LDO, 0);
2250 regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_1,
2251 RT5668_PWR_MB | RT5668_PWR_BG, 0);
2261 static int rt5668_probe(struct snd_soc_component *component)
2263 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
2265 rt5668->component = component;
2270 static void rt5668_remove(struct snd_soc_component *component)
2272 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
2274 rt5668_reset(rt5668->regmap);
2278 static int rt5668_suspend(struct snd_soc_component *component)
2280 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
2282 regcache_cache_only(rt5668->regmap, true);
2283 regcache_mark_dirty(rt5668->regmap);
2287 static int rt5668_resume(struct snd_soc_component *component)
2289 struct rt5668_priv *rt5668 = snd_soc_component_get_drvdata(component);
2291 regcache_cache_only(rt5668->regmap, false);
2292 regcache_sync(rt5668->regmap);
2297 #define rt5668_suspend NULL
2298 #define rt5668_resume NULL
2301 #define RT5668_STEREO_RATES SNDRV_PCM_RATE_8000_192000
2302 #define RT5668_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2303 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2305 static const struct snd_soc_dai_ops rt5668_aif1_dai_ops = {
2306 .hw_params = rt5668_hw_params,
2307 .set_fmt = rt5668_set_dai_fmt,
2308 .set_tdm_slot = rt5668_set_tdm_slot,
2311 static const struct snd_soc_dai_ops rt5668_aif2_dai_ops = {
2312 .hw_params = rt5668_hw_params,
2313 .set_fmt = rt5668_set_dai_fmt,
2314 .set_bclk_ratio = rt5668_set_bclk_ratio,
2317 static struct snd_soc_dai_driver rt5668_dai[] = {
2319 .name = "rt5668-aif1",
2322 .stream_name = "AIF1 Playback",
2325 .rates = RT5668_STEREO_RATES,
2326 .formats = RT5668_FORMATS,
2329 .stream_name = "AIF1 Capture",
2332 .rates = RT5668_STEREO_RATES,
2333 .formats = RT5668_FORMATS,
2335 .ops = &rt5668_aif1_dai_ops,
2338 .name = "rt5668-aif2",
2341 .stream_name = "AIF2 Capture",
2344 .rates = RT5668_STEREO_RATES,
2345 .formats = RT5668_FORMATS,
2347 .ops = &rt5668_aif2_dai_ops,
2351 static const struct snd_soc_component_driver soc_component_dev_rt5668 = {
2352 .probe = rt5668_probe,
2353 .remove = rt5668_remove,
2354 .suspend = rt5668_suspend,
2355 .resume = rt5668_resume,
2356 .set_bias_level = rt5668_set_bias_level,
2357 .controls = rt5668_snd_controls,
2358 .num_controls = ARRAY_SIZE(rt5668_snd_controls),
2359 .dapm_widgets = rt5668_dapm_widgets,
2360 .num_dapm_widgets = ARRAY_SIZE(rt5668_dapm_widgets),
2361 .dapm_routes = rt5668_dapm_routes,
2362 .num_dapm_routes = ARRAY_SIZE(rt5668_dapm_routes),
2363 .set_sysclk = rt5668_set_component_sysclk,
2364 .set_pll = rt5668_set_component_pll,
2365 .set_jack = rt5668_set_jack_detect,
2366 .use_pmdown_time = 1,
2368 .non_legacy_dai_naming = 1,
2371 static const struct regmap_config rt5668_regmap = {
2374 .max_register = RT5668_I2C_MODE,
2375 .volatile_reg = rt5668_volatile_register,
2376 .readable_reg = rt5668_readable_register,
2377 .cache_type = REGCACHE_RBTREE,
2378 .reg_defaults = rt5668_reg,
2379 .num_reg_defaults = ARRAY_SIZE(rt5668_reg),
2380 .use_single_rw = true,
2383 static const struct i2c_device_id rt5668_i2c_id[] = {
2387 MODULE_DEVICE_TABLE(i2c, rt5668_i2c_id);
2389 static int rt5668_parse_dt(struct rt5668_priv *rt5668, struct device *dev)
2392 of_property_read_u32(dev->of_node, "realtek,dmic1-data-pin",
2393 &rt5668->pdata.dmic1_data_pin);
2394 of_property_read_u32(dev->of_node, "realtek,dmic1-clk-pin",
2395 &rt5668->pdata.dmic1_clk_pin);
2396 of_property_read_u32(dev->of_node, "realtek,jd-src",
2397 &rt5668->pdata.jd_src);
2399 rt5668->pdata.ldo1_en = of_get_named_gpio(dev->of_node,
2400 "realtek,ldo1-en-gpios", 0);
2405 static void rt5668_calibrate(struct rt5668_priv *rt5668)
2409 mutex_lock(&rt5668->calibrate_mutex);
2411 rt5668_reset(rt5668->regmap);
2412 regmap_write(rt5668->regmap, RT5668_PWR_ANLG_1, 0xa2bf);
2413 usleep_range(15000, 20000);
2414 regmap_write(rt5668->regmap, RT5668_PWR_ANLG_1, 0xf2bf);
2415 regmap_write(rt5668->regmap, RT5668_MICBIAS_2, 0x0380);
2416 regmap_write(rt5668->regmap, RT5668_PWR_DIG_1, 0x8001);
2417 regmap_write(rt5668->regmap, RT5668_TEST_MODE_CTRL_1, 0x0000);
2418 regmap_write(rt5668->regmap, RT5668_STO1_DAC_MIXER, 0x2080);
2419 regmap_write(rt5668->regmap, RT5668_STO1_ADC_MIXER, 0x4040);
2420 regmap_write(rt5668->regmap, RT5668_DEPOP_1, 0x0069);
2421 regmap_write(rt5668->regmap, RT5668_CHOP_DAC, 0x3000);
2422 regmap_write(rt5668->regmap, RT5668_HP_CTRL_2, 0x6000);
2423 regmap_write(rt5668->regmap, RT5668_HP_CHARGE_PUMP_1, 0x0f26);
2424 regmap_write(rt5668->regmap, RT5668_CALIB_ADC_CTRL, 0x7f05);
2425 regmap_write(rt5668->regmap, RT5668_STO1_ADC_MIXER, 0x686c);
2426 regmap_write(rt5668->regmap, RT5668_CAL_REC, 0x0d0d);
2427 regmap_write(rt5668->regmap, RT5668_HP_CALIB_CTRL_9, 0x000f);
2428 regmap_write(rt5668->regmap, RT5668_PWR_DIG_1, 0x8d01);
2429 regmap_write(rt5668->regmap, RT5668_HP_CALIB_CTRL_2, 0x0321);
2430 regmap_write(rt5668->regmap, RT5668_HP_LOGIC_CTRL_2, 0x0004);
2431 regmap_write(rt5668->regmap, RT5668_HP_CALIB_CTRL_1, 0x7c00);
2432 regmap_write(rt5668->regmap, RT5668_HP_CALIB_CTRL_3, 0x06a1);
2433 regmap_write(rt5668->regmap, RT5668_A_DAC1_MUX, 0x0311);
2434 regmap_write(rt5668->regmap, RT5668_RESET_HPF_CTRL, 0x0000);
2435 regmap_write(rt5668->regmap, RT5668_ADC_STO1_HP_CTRL_1, 0x3320);
2437 regmap_write(rt5668->regmap, RT5668_HP_CALIB_CTRL_1, 0xfc00);
2439 for (count = 0; count < 60; count++) {
2440 regmap_read(rt5668->regmap, RT5668_HP_CALIB_STA_1, &value);
2441 if (!(value & 0x8000))
2444 usleep_range(10000, 10005);
2448 pr_err("HP Calibration Failure\n");
2450 /* restore settings */
2451 regmap_write(rt5668->regmap, RT5668_STO1_ADC_MIXER, 0xc0c4);
2452 regmap_write(rt5668->regmap, RT5668_PWR_DIG_1, 0x0000);
2454 mutex_unlock(&rt5668->calibrate_mutex);
2458 static int rt5668_i2c_probe(struct i2c_client *i2c,
2459 const struct i2c_device_id *id)
2461 struct rt5668_platform_data *pdata = dev_get_platdata(&i2c->dev);
2462 struct rt5668_priv *rt5668;
2466 rt5668 = devm_kzalloc(&i2c->dev, sizeof(struct rt5668_priv),
2472 i2c_set_clientdata(i2c, rt5668);
2475 rt5668->pdata = *pdata;
2477 rt5668_parse_dt(rt5668, &i2c->dev);
2479 rt5668->regmap = devm_regmap_init_i2c(i2c, &rt5668_regmap);
2480 if (IS_ERR(rt5668->regmap)) {
2481 ret = PTR_ERR(rt5668->regmap);
2482 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2487 for (i = 0; i < ARRAY_SIZE(rt5668->supplies); i++)
2488 rt5668->supplies[i].supply = rt5668_supply_names[i];
2490 ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(rt5668->supplies),
2493 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
2497 ret = regulator_bulk_enable(ARRAY_SIZE(rt5668->supplies),
2500 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
2504 if (gpio_is_valid(rt5668->pdata.ldo1_en)) {
2505 if (devm_gpio_request_one(&i2c->dev, rt5668->pdata.ldo1_en,
2506 GPIOF_OUT_INIT_HIGH, "rt5668"))
2507 dev_err(&i2c->dev, "Fail gpio_request gpio_ldo\n");
2510 /* Sleep for 300 ms miniumum */
2511 usleep_range(300000, 350000);
2513 regmap_write(rt5668->regmap, RT5668_I2C_MODE, 0x1);
2514 usleep_range(10000, 15000);
2516 regmap_read(rt5668->regmap, RT5668_DEVICE_ID, &val);
2517 if (val != DEVICE_ID) {
2518 pr_err("Device with ID register %x is not rt5668\n", val);
2522 rt5668_reset(rt5668->regmap);
2524 rt5668_calibrate(rt5668);
2526 regmap_write(rt5668->regmap, RT5668_DEPOP_1, 0x0000);
2529 if (rt5668->pdata.dmic1_data_pin != RT5668_DMIC1_NULL) {
2530 switch (rt5668->pdata.dmic1_data_pin) {
2531 case RT5668_DMIC1_DATA_GPIO2: /* share with LRCK2 */
2532 regmap_update_bits(rt5668->regmap, RT5668_DMIC_CTRL_1,
2533 RT5668_DMIC_1_DP_MASK, RT5668_DMIC_1_DP_GPIO2);
2534 regmap_update_bits(rt5668->regmap, RT5668_GPIO_CTRL_1,
2535 RT5668_GP2_PIN_MASK, RT5668_GP2_PIN_DMIC_SDA);
2538 case RT5668_DMIC1_DATA_GPIO5: /* share with DACDAT1 */
2539 regmap_update_bits(rt5668->regmap, RT5668_DMIC_CTRL_1,
2540 RT5668_DMIC_1_DP_MASK, RT5668_DMIC_1_DP_GPIO5);
2541 regmap_update_bits(rt5668->regmap, RT5668_GPIO_CTRL_1,
2542 RT5668_GP5_PIN_MASK, RT5668_GP5_PIN_DMIC_SDA);
2546 dev_dbg(&i2c->dev, "invalid DMIC_DAT pin\n");
2550 switch (rt5668->pdata.dmic1_clk_pin) {
2551 case RT5668_DMIC1_CLK_GPIO1: /* share with IRQ */
2552 regmap_update_bits(rt5668->regmap, RT5668_GPIO_CTRL_1,
2553 RT5668_GP1_PIN_MASK, RT5668_GP1_PIN_DMIC_CLK);
2556 case RT5668_DMIC1_CLK_GPIO3: /* share with BCLK2 */
2557 regmap_update_bits(rt5668->regmap, RT5668_GPIO_CTRL_1,
2558 RT5668_GP3_PIN_MASK, RT5668_GP3_PIN_DMIC_CLK);
2562 dev_dbg(&i2c->dev, "invalid DMIC_CLK pin\n");
2567 regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_1,
2568 RT5668_LDO1_DVO_MASK | RT5668_HP_DRIVER_MASK,
2569 RT5668_LDO1_DVO_14 | RT5668_HP_DRIVER_5X);
2570 regmap_write(rt5668->regmap, RT5668_MICBIAS_2, 0x0380);
2571 regmap_update_bits(rt5668->regmap, RT5668_GPIO_CTRL_1,
2572 RT5668_GP4_PIN_MASK | RT5668_GP5_PIN_MASK,
2573 RT5668_GP4_PIN_ADCDAT1 | RT5668_GP5_PIN_DACDAT1);
2574 regmap_write(rt5668->regmap, RT5668_TEST_MODE_CTRL_1, 0x0000);
2576 INIT_DELAYED_WORK(&rt5668->jack_detect_work,
2577 rt5668_jack_detect_handler);
2578 INIT_DELAYED_WORK(&rt5668->jd_check_work,
2579 rt5668_jd_check_handler);
2581 mutex_init(&rt5668->calibrate_mutex);
2584 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
2585 rt5668_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
2586 | IRQF_ONESHOT, "rt5668", rt5668);
2588 dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
2592 return snd_soc_register_component(&i2c->dev, &soc_component_dev_rt5668,
2593 rt5668_dai, ARRAY_SIZE(rt5668_dai));
2596 static int rt5668_i2c_remove(struct i2c_client *i2c)
2598 snd_soc_unregister_component(&i2c->dev);
2603 static void rt5668_i2c_shutdown(struct i2c_client *client)
2605 struct rt5668_priv *rt5668 = i2c_get_clientdata(client);
2607 rt5668_reset(rt5668->regmap);
2611 static const struct of_device_id rt5668_of_match[] = {
2612 {.compatible = "realtek,rt5668b"},
2615 MODULE_DEVICE_TABLE(of, rt5668_of_match);
2619 static const struct acpi_device_id rt5668_acpi_match[] = {
2623 MODULE_DEVICE_TABLE(acpi, rt5668_acpi_match);
2626 static struct i2c_driver rt5668_i2c_driver = {
2629 .of_match_table = of_match_ptr(rt5668_of_match),
2630 .acpi_match_table = ACPI_PTR(rt5668_acpi_match),
2632 .probe = rt5668_i2c_probe,
2633 .remove = rt5668_i2c_remove,
2634 .shutdown = rt5668_i2c_shutdown,
2635 .id_table = rt5668_i2c_id,
2637 module_i2c_driver(rt5668_i2c_driver);
2639 MODULE_DESCRIPTION("ASoC RT5668B driver");
2640 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2641 MODULE_LICENSE("GPL v2");
projects / releases.git / blob