sound/soc/intel/boards/cht_bsw_rt5672.c

   1 /*
   2  *  cht_bsw_rt5672.c - ASoc Machine driver for Intel Cherryview-based platforms
   3  *                     Cherrytrail and Braswell, with RT5672 codec.
   4  *
   5  *  Copyright (C) 2014 Intel Corp
   6  *  Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
   7  *          Mengdong Lin <mengdong.lin@intel.com>
   8  *
   9  *  This program is free software; you can redistribute it and/or modify
  10  *  it under the terms of the GNU General Public License as published by
  11  *  the Free Software Foundation; version 2 of the License.
  12  *
  13  *  This program is distributed in the hope that it will be useful, but
  14  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  *  General Public License for more details.
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/slab.h>
  22 #include <linux/clk.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include <sound/soc.h>
  26 #include <sound/jack.h>
  27 #include <sound/soc-acpi.h>
  28 #include "../../codecs/rt5670.h"
  29 #include "../atom/sst-atom-controls.h"
  30
  31
  32 /* The platform clock #3 outputs 19.2Mhz clock to codec as I2S MCLK */
  33 #define CHT_PLAT_CLK_3_HZ       19200000
  34 #define CHT_CODEC_DAI   "rt5670-aif1"
  35
  36 struct cht_mc_private {
  37         struct snd_soc_jack headset;
  38         char codec_name[SND_ACPI_I2C_ID_LEN];
  39         struct clk *mclk;
  40 };
  41
  42 /* Headset jack detection DAPM pins */
  43 static struct snd_soc_jack_pin cht_bsw_headset_pins[] = {
  44         {
  45                 .pin = "Headset Mic",
  46                 .mask = SND_JACK_MICROPHONE,
  47         },
  48         {
  49                 .pin = "Headphone",
  50                 .mask = SND_JACK_HEADPHONE,
  51         },
  52 };
  53
  54 static int platform_clock_control(struct snd_soc_dapm_widget *w,
  55                 struct snd_kcontrol *k, int  event)
  56 {
  57         struct snd_soc_dapm_context *dapm = w->dapm;
  58         struct snd_soc_card *card = dapm->card;
  59         struct snd_soc_dai *codec_dai;
  60         struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
  61         int ret;
  62
  63         codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
  64         if (!codec_dai) {
  65                 dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
  66                 return -EIO;
  67         }
  68
  69         if (SND_SOC_DAPM_EVENT_ON(event)) {
  70                 if (ctx->mclk) {
  71                         ret = clk_prepare_enable(ctx->mclk);
  72                         if (ret < 0) {
  73                                 dev_err(card->dev,
  74                                         "could not configure MCLK state");
  75                                 return ret;
  76                         }
  77                 }
  78
  79                 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
  80                 ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
  81                                 CHT_PLAT_CLK_3_HZ, 48000 * 512);
  82                 if (ret < 0) {
  83                         dev_err(card->dev, "can't set codec pll: %d\n", ret);
  84                         return ret;
  85                 }
  86
  87                 /* set codec sysclk source to PLL */
  88                 ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
  89                         48000 * 512, SND_SOC_CLOCK_IN);
  90                 if (ret < 0) {
  91                         dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
  92                         return ret;
  93                 }
  94         } else {
  95                 /* Set codec sysclk source to its internal clock because codec
  96                  * PLL will be off when idle and MCLK will also be off by ACPI
  97                  * when codec is runtime suspended. Codec needs clock for jack
  98                  * detection and button press.
  99                  */
 100                 snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_RCCLK,
 101                                        48000 * 512, SND_SOC_CLOCK_IN);
 102
 103                 if (ctx->mclk)
 104                         clk_disable_unprepare(ctx->mclk);
 105         }
 106         return 0;
 107 }
 108
 109 static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
 110         SND_SOC_DAPM_HP("Headphone", NULL),
 111         SND_SOC_DAPM_MIC("Headset Mic", NULL),
 112         SND_SOC_DAPM_MIC("Int Mic", NULL),
 113         SND_SOC_DAPM_SPK("Ext Spk", NULL),
 114         SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
 115                         platform_clock_control, SND_SOC_DAPM_PRE_PMU |
 116                         SND_SOC_DAPM_POST_PMD),
 117 };
 118
 119 static const struct snd_soc_dapm_route cht_audio_map[] = {
 120         {"IN1P", NULL, "Headset Mic"},
 121         {"IN1N", NULL, "Headset Mic"},
 122         {"DMIC L1", NULL, "Int Mic"},
 123         {"DMIC R1", NULL, "Int Mic"},
 124         {"Headphone", NULL, "HPOL"},
 125         {"Headphone", NULL, "HPOR"},
 126         {"Ext Spk", NULL, "SPOLP"},
 127         {"Ext Spk", NULL, "SPOLN"},
 128         {"Ext Spk", NULL, "SPORP"},
 129         {"Ext Spk", NULL, "SPORN"},
 130         {"AIF1 Playback", NULL, "ssp2 Tx"},
 131         {"ssp2 Tx", NULL, "codec_out0"},
 132         {"ssp2 Tx", NULL, "codec_out1"},
 133         {"codec_in0", NULL, "ssp2 Rx"},
 134         {"codec_in1", NULL, "ssp2 Rx"},
 135         {"ssp2 Rx", NULL, "AIF1 Capture"},
 136         {"Headphone", NULL, "Platform Clock"},
 137         {"Headset Mic", NULL, "Platform Clock"},
 138         {"Int Mic", NULL, "Platform Clock"},
 139         {"Ext Spk", NULL, "Platform Clock"},
 140 };
 141
 142 static const struct snd_kcontrol_new cht_mc_controls[] = {
 143         SOC_DAPM_PIN_SWITCH("Headphone"),
 144         SOC_DAPM_PIN_SWITCH("Headset Mic"),
 145         SOC_DAPM_PIN_SWITCH("Int Mic"),
 146         SOC_DAPM_PIN_SWITCH("Ext Spk"),
 147 };
 148
 149 static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
 150                                         struct snd_pcm_hw_params *params)
 151 {
 152         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 153         struct snd_soc_dai *codec_dai = rtd->codec_dai;
 154         int ret;
 155
 156         /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
 157         ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
 158                                   CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
 159         if (ret < 0) {
 160                 dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
 161                 return ret;
 162         }
 163
 164         /* set codec sysclk source to PLL */
 165         ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
 166                                      params_rate(params) * 512,
 167                                      SND_SOC_CLOCK_IN);
 168         if (ret < 0) {
 169                 dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
 170                 return ret;
 171         }
 172         return 0;
 173 }
 174
 175 static const struct acpi_gpio_params headset_gpios = { 0, 0, false };
 176
 177 static const struct acpi_gpio_mapping cht_rt5672_gpios[] = {
 178         { "headset-gpios", &headset_gpios, 1 },
 179         {},
 180 };
 181
 182 static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
 183 {
 184         int ret;
 185         struct snd_soc_dai *codec_dai = runtime->codec_dai;
 186         struct snd_soc_component *component = codec_dai->component;
 187         struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
 188
 189         if (devm_acpi_dev_add_driver_gpios(component->dev, cht_rt5672_gpios))
 190                 dev_warn(runtime->dev, "Unable to add GPIO mapping table\n");
 191
 192         /* Select codec ASRC clock source to track I2S1 clock, because codec
 193          * is in slave mode and 100fs I2S format (BCLK = 100 * LRCLK) cannot
 194          * be supported by RT5672. Otherwise, ASRC will be disabled and cause
 195          * noise.
 196          */
 197         rt5670_sel_asrc_clk_src(component,
 198                                 RT5670_DA_STEREO_FILTER
 199                                 | RT5670_DA_MONO_L_FILTER
 200                                 | RT5670_DA_MONO_R_FILTER
 201                                 | RT5670_AD_STEREO_FILTER
 202                                 | RT5670_AD_MONO_L_FILTER
 203                                 | RT5670_AD_MONO_R_FILTER,
 204                                 RT5670_CLK_SEL_I2S1_ASRC);
 205
 206         ret = snd_soc_card_jack_new(runtime->card, "Headset",
 207                                     SND_JACK_HEADSET | SND_JACK_BTN_0 |
 208                                     SND_JACK_BTN_1 | SND_JACK_BTN_2,
 209                                     &ctx->headset,
 210                                     cht_bsw_headset_pins,
 211                                     ARRAY_SIZE(cht_bsw_headset_pins));
 212         if (ret)
 213                 return ret;
 214
 215         rt5670_set_jack_detect(component, &ctx->headset);
 216         if (ctx->mclk) {
 217                 /*
 218                  * The firmware might enable the clock at
 219                  * boot (this information may or may not
 220                  * be reflected in the enable clock register).
 221                  * To change the rate we must disable the clock
 222                  * first to cover these cases. Due to common
 223                  * clock framework restrictions that do not allow
 224                  * to disable a clock that has not been enabled,
 225                  * we need to enable the clock first.
 226                  */
 227                 ret = clk_prepare_enable(ctx->mclk);
 228                 if (!ret)
 229                         clk_disable_unprepare(ctx->mclk);
 230
 231                 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
 232
 233                 if (ret) {
 234                         dev_err(runtime->dev, "unable to set MCLK rate\n");
 235                         return ret;
 236                 }
 237         }
 238         return 0;
 239 }
 240
 241 static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
 242                             struct snd_pcm_hw_params *params)
 243 {
 244         struct snd_interval *rate = hw_param_interval(params,
 245                         SNDRV_PCM_HW_PARAM_RATE);
 246         struct snd_interval *channels = hw_param_interval(params,
 247                                                 SNDRV_PCM_HW_PARAM_CHANNELS);
 248         int ret;
 249
 250         /* The DSP will covert the FE rate to 48k, stereo, 24bits */
 251         rate->min = rate->max = 48000;
 252         channels->min = channels->max = 2;
 253
 254         /* set SSP2 to 24-bit */
 255         params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
 256
 257         /*
 258          * Default mode for SSP configuration is TDM 4 slot
 259          */
 260         ret = snd_soc_dai_set_fmt(rtd->codec_dai,
 261                                   SND_SOC_DAIFMT_DSP_B |
 262                                   SND_SOC_DAIFMT_IB_NF |
 263                                   SND_SOC_DAIFMT_CBS_CFS);
 264         if (ret < 0) {
 265                 dev_err(rtd->dev, "can't set format to TDM %d\n", ret);
 266                 return ret;
 267         }
 268
 269         /* TDM 4 slots 24 bit, set Rx & Tx bitmask to 4 active slots */
 270         ret = snd_soc_dai_set_tdm_slot(rtd->codec_dai, 0xF, 0xF, 4, 24);
 271         if (ret < 0) {
 272                 dev_err(rtd->dev, "can't set codec TDM slot %d\n", ret);
 273                 return ret;
 274         }
 275
 276         return 0;
 277 }
 278
 279 static int cht_aif1_startup(struct snd_pcm_substream *substream)
 280 {
 281         return snd_pcm_hw_constraint_single(substream->runtime,
 282                         SNDRV_PCM_HW_PARAM_RATE, 48000);
 283 }
 284
 285 static const struct snd_soc_ops cht_aif1_ops = {
 286         .startup = cht_aif1_startup,
 287 };
 288
 289 static const struct snd_soc_ops cht_be_ssp2_ops = {
 290         .hw_params = cht_aif1_hw_params,
 291 };
 292
 293 static struct snd_soc_dai_link cht_dailink[] = {
 294         /* Front End DAI links */
 295         [MERR_DPCM_AUDIO] = {
 296                 .name = "Audio Port",
 297                 .stream_name = "Audio",
 298                 .cpu_dai_name = "media-cpu-dai",
 299                 .codec_dai_name = "snd-soc-dummy-dai",
 300                 .codec_name = "snd-soc-dummy",
 301                 .platform_name = "sst-mfld-platform",
 302                 .nonatomic = true,
 303                 .dynamic = 1,
 304                 .dpcm_playback = 1,
 305                 .dpcm_capture = 1,
 306                 .ops = &cht_aif1_ops,
 307         },
 308         [MERR_DPCM_DEEP_BUFFER] = {
 309                 .name = "Deep-Buffer Audio Port",
 310                 .stream_name = "Deep-Buffer Audio",
 311                 .cpu_dai_name = "deepbuffer-cpu-dai",
 312                 .codec_dai_name = "snd-soc-dummy-dai",
 313                 .codec_name = "snd-soc-dummy",
 314                 .platform_name = "sst-mfld-platform",
 315                 .nonatomic = true,
 316                 .dynamic = 1,
 317                 .dpcm_playback = 1,
 318                 .ops = &cht_aif1_ops,
 319         },
 320
 321         /* Back End DAI links */
 322         {
 323                 /* SSP2 - Codec */
 324                 .name = "SSP2-Codec",
 325                 .id = 0,
 326                 .cpu_dai_name = "ssp2-port",
 327                 .platform_name = "sst-mfld-platform",
 328                 .no_pcm = 1,
 329                 .nonatomic = true,
 330                 .codec_dai_name = "rt5670-aif1",
 331                 .codec_name = "i2c-10EC5670:00",
 332                 .init = cht_codec_init,
 333                 .be_hw_params_fixup = cht_codec_fixup,
 334                 .dpcm_playback = 1,
 335                 .dpcm_capture = 1,
 336                 .ops = &cht_be_ssp2_ops,
 337         },
 338 };
 339
 340 static int cht_suspend_pre(struct snd_soc_card *card)
 341 {
 342         struct snd_soc_component *component;
 343         struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
 344
 345         list_for_each_entry(component, &card->component_dev_list, card_list) {
 346                 if (!strncmp(component->name,
 347                              ctx->codec_name, sizeof(ctx->codec_name))) {
 348
 349                         dev_dbg(component->dev, "disabling jack detect before going to suspend.\n");
 350                         rt5670_jack_suspend(component);
 351                         break;
 352                 }
 353         }
 354         return 0;
 355 }
 356
 357 static int cht_resume_post(struct snd_soc_card *card)
 358 {
 359         struct snd_soc_component *component;
 360         struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
 361
 362         list_for_each_entry(component, &card->component_dev_list, card_list) {
 363                 if (!strncmp(component->name,
 364                              ctx->codec_name, sizeof(ctx->codec_name))) {
 365
 366                         dev_dbg(component->dev, "enabling jack detect for resume.\n");
 367                         rt5670_jack_resume(component);
 368                         break;
 369                 }
 370         }
 371
 372         return 0;
 373 }
 374
 375 /* SoC card */
 376 static struct snd_soc_card snd_soc_card_cht = {
 377         .name = "cht-bsw-rt5672",
 378         .owner = THIS_MODULE,
 379         .dai_link = cht_dailink,
 380         .num_links = ARRAY_SIZE(cht_dailink),
 381         .dapm_widgets = cht_dapm_widgets,
 382         .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
 383         .dapm_routes = cht_audio_map,
 384         .num_dapm_routes = ARRAY_SIZE(cht_audio_map),
 385         .controls = cht_mc_controls,
 386         .num_controls = ARRAY_SIZE(cht_mc_controls),
 387         .suspend_pre = cht_suspend_pre,
 388         .resume_post = cht_resume_post,
 389 };
 390
 391 #define RT5672_I2C_DEFAULT      "i2c-10EC5670:00"
 392
 393 static int snd_cht_mc_probe(struct platform_device *pdev)
 394 {
 395         int ret_val = 0;
 396         struct cht_mc_private *drv;
 397         struct snd_soc_acpi_mach *mach = pdev->dev.platform_data;
 398         const char *i2c_name;
 399         int i;
 400
 401         drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC);
 402         if (!drv)
 403                 return -ENOMEM;
 404
 405         strcpy(drv->codec_name, RT5672_I2C_DEFAULT);
 406
 407         /* fixup codec name based on HID */
 408         if (mach) {
 409                 i2c_name = acpi_dev_get_first_match_name(mach->id, NULL, -1);
 410                 if (i2c_name) {
 411                         snprintf(drv->codec_name, sizeof(drv->codec_name),
 412                                  "i2c-%s", i2c_name);
 413                         for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) {
 414                                 if (!strcmp(cht_dailink[i].codec_name,
 415                                             RT5672_I2C_DEFAULT)) {
 416                                         cht_dailink[i].codec_name =
 417                                                 drv->codec_name;
 418                                         break;
 419                                 }
 420                         }
 421                 }
 422         }
 423
 424         drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
 425         if (IS_ERR(drv->mclk)) {
 426                 dev_err(&pdev->dev,
 427                         "Failed to get MCLK from pmc_plt_clk_3: %ld\n",
 428                         PTR_ERR(drv->mclk));
 429                 return PTR_ERR(drv->mclk);
 430         }
 431         snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
 432
 433         /* register the soc card */
 434         snd_soc_card_cht.dev = &pdev->dev;
 435         ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
 436         if (ret_val) {
 437                 dev_err(&pdev->dev,
 438                         "snd_soc_register_card failed %d\n", ret_val);
 439                 return ret_val;
 440         }
 441         platform_set_drvdata(pdev, &snd_soc_card_cht);
 442         return ret_val;
 443 }
 444
 445 static struct platform_driver snd_cht_mc_driver = {
 446         .driver = {
 447                 .name = "cht-bsw-rt5672",
 448         },
 449         .probe = snd_cht_mc_probe,
 450 };
 451
 452 module_platform_driver(snd_cht_mc_driver);
 453
 454 MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
 455 MODULE_AUTHOR("Subhransu S. Prusty, Mengdong Lin");
 456 MODULE_LICENSE("GPL v2");
 457 MODULE_ALIAS("platform:cht-bsw-rt5672");