sound/soc/samsung/i2s.c

   1 /* sound/soc/samsung/i2s.c
   2  *
   3  * ALSA SoC Audio Layer - Samsung I2S Controller driver
   4  *
   5  * Copyright (c) 2010 Samsung Electronics Co. Ltd.
   6  *      Jaswinder Singh <jassisinghbrar@gmail.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <dt-bindings/sound/samsung-i2s.h>
  14 #include <linux/delay.h>
  15 #include <linux/slab.h>
  16 #include <linux/clk.h>
  17 #include <linux/clk-provider.h>
  18 #include <linux/io.h>
  19 #include <linux/module.h>
  20 #include <linux/of.h>
  21 #include <linux/of_gpio.h>
  22 #include <linux/pm_runtime.h>
  23
  24 #include <sound/soc.h>
  25 #include <sound/pcm_params.h>
  26
  27 #include <linux/platform_data/asoc-s3c.h>
  28
  29 #include "dma.h"
  30 #include "idma.h"
  31 #include "i2s.h"
  32 #include "i2s-regs.h"
  33
  34 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  35
  36 enum samsung_dai_type {
  37         TYPE_PRI,
  38         TYPE_SEC,
  39 };
  40
  41 struct samsung_i2s_variant_regs {
  42         unsigned int    bfs_off;
  43         unsigned int    rfs_off;
  44         unsigned int    sdf_off;
  45         unsigned int    txr_off;
  46         unsigned int    rclksrc_off;
  47         unsigned int    mss_off;
  48         unsigned int    cdclkcon_off;
  49         unsigned int    lrp_off;
  50         unsigned int    bfs_mask;
  51         unsigned int    rfs_mask;
  52         unsigned int    ftx0cnt_off;
  53 };
  54
  55 struct samsung_i2s_dai_data {
  56         int dai_type;
  57         u32 quirks;
  58         const struct samsung_i2s_variant_regs *i2s_variant_regs;
  59 };
  60
  61 struct i2s_dai {
  62         /* Platform device for this DAI */
  63         struct platform_device *pdev;
  64         /* Memory mapped SFR region */
  65         void __iomem    *addr;
  66         /* Rate of RCLK source clock */
  67         unsigned long rclk_srcrate;
  68         /* Frame Clock */
  69         unsigned frmclk;
  70         /*
  71          * Specifically requested RCLK,BCLK by MACHINE Driver.
  72          * 0 indicates CPU driver is free to choose any value.
  73          */
  74         unsigned rfs, bfs;
  75         /* I2S Controller's core clock */
  76         struct clk *clk;
  77         /* Clock for generating I2S signals */
  78         struct clk *op_clk;
  79         /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  80         struct i2s_dai *pri_dai;
  81         /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  82         struct i2s_dai *sec_dai;
  83 #define DAI_OPENED      (1 << 0) /* Dai is opened */
  84 #define DAI_MANAGER     (1 << 1) /* Dai is the manager */
  85         unsigned mode;
  86         /* Driver for this DAI */
  87         struct snd_soc_dai_driver i2s_dai_drv;
  88         /* DMA parameters */
  89         struct s3c_dma_params dma_playback;
  90         struct s3c_dma_params dma_capture;
  91         struct s3c_dma_params idma_playback;
  92         u32     quirks;
  93         u32     suspend_i2smod;
  94         u32     suspend_i2scon;
  95         u32     suspend_i2spsr;
  96         const struct samsung_i2s_variant_regs *variant_regs;
  97
  98         /* Spinlock protecting access to the device's registers */
  99         spinlock_t spinlock;
 100         spinlock_t *lock;
 101
 102         /* Below fields are only valid if this is the primary FIFO */
 103         struct clk *clk_table[3];
 104         struct clk_onecell_data clk_data;
 105 };
 106
 107 /* Lock for cross i/f checks */
 108 static DEFINE_SPINLOCK(lock);
 109
 110 /* If this is the 'overlay' stereo DAI */
 111 static inline bool is_secondary(struct i2s_dai *i2s)
 112 {
 113         return i2s->pri_dai ? true : false;
 114 }
 115
 116 /* If operating in SoC-Slave mode */
 117 static inline bool is_slave(struct i2s_dai *i2s)
 118 {
 119         u32 mod = readl(i2s->addr + I2SMOD);
 120         return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
 121 }
 122
 123 /* If this interface of the controller is transmitting data */
 124 static inline bool tx_active(struct i2s_dai *i2s)
 125 {
 126         u32 active;
 127
 128         if (!i2s)
 129                 return false;
 130
 131         active = readl(i2s->addr + I2SCON);
 132
 133         if (is_secondary(i2s))
 134                 active &= CON_TXSDMA_ACTIVE;
 135         else
 136                 active &= CON_TXDMA_ACTIVE;
 137
 138         return active ? true : false;
 139 }
 140
 141 /* Return pointer to the other DAI */
 142 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
 143 {
 144         return i2s->pri_dai ? : i2s->sec_dai;
 145 }
 146
 147 /* If the other interface of the controller is transmitting data */
 148 static inline bool other_tx_active(struct i2s_dai *i2s)
 149 {
 150         struct i2s_dai *other = get_other_dai(i2s);
 151
 152         return tx_active(other);
 153 }
 154
 155 /* If any interface of the controller is transmitting data */
 156 static inline bool any_tx_active(struct i2s_dai *i2s)
 157 {
 158         return tx_active(i2s) || other_tx_active(i2s);
 159 }
 160
 161 /* If this interface of the controller is receiving data */
 162 static inline bool rx_active(struct i2s_dai *i2s)
 163 {
 164         u32 active;
 165
 166         if (!i2s)
 167                 return false;
 168
 169         active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
 170
 171         return active ? true : false;
 172 }
 173
 174 /* If the other interface of the controller is receiving data */
 175 static inline bool other_rx_active(struct i2s_dai *i2s)
 176 {
 177         struct i2s_dai *other = get_other_dai(i2s);
 178
 179         return rx_active(other);
 180 }
 181
 182 /* If any interface of the controller is receiving data */
 183 static inline bool any_rx_active(struct i2s_dai *i2s)
 184 {
 185         return rx_active(i2s) || other_rx_active(i2s);
 186 }
 187
 188 /* If the other DAI is transmitting or receiving data */
 189 static inline bool other_active(struct i2s_dai *i2s)
 190 {
 191         return other_rx_active(i2s) || other_tx_active(i2s);
 192 }
 193
 194 /* If this DAI is transmitting or receiving data */
 195 static inline bool this_active(struct i2s_dai *i2s)
 196 {
 197         return tx_active(i2s) || rx_active(i2s);
 198 }
 199
 200 /* If the controller is active anyway */
 201 static inline bool any_active(struct i2s_dai *i2s)
 202 {
 203         return this_active(i2s) || other_active(i2s);
 204 }
 205
 206 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
 207 {
 208         return snd_soc_dai_get_drvdata(dai);
 209 }
 210
 211 static inline bool is_opened(struct i2s_dai *i2s)
 212 {
 213         if (i2s && (i2s->mode & DAI_OPENED))
 214                 return true;
 215         else
 216                 return false;
 217 }
 218
 219 static inline bool is_manager(struct i2s_dai *i2s)
 220 {
 221         if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
 222                 return true;
 223         else
 224                 return false;
 225 }
 226
 227 /* Read RCLK of I2S (in multiples of LRCLK) */
 228 static inline unsigned get_rfs(struct i2s_dai *i2s)
 229 {
 230         u32 rfs;
 231         rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
 232         rfs &= i2s->variant_regs->rfs_mask;
 233
 234         switch (rfs) {
 235         case 7: return 192;
 236         case 6: return 96;
 237         case 5: return 128;
 238         case 4: return 64;
 239         case 3: return 768;
 240         case 2: return 384;
 241         case 1: return 512;
 242         default: return 256;
 243         }
 244 }
 245
 246 /* Write RCLK of I2S (in multiples of LRCLK) */
 247 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
 248 {
 249         u32 mod = readl(i2s->addr + I2SMOD);
 250         int rfs_shift = i2s->variant_regs->rfs_off;
 251
 252         mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
 253
 254         switch (rfs) {
 255         case 192:
 256                 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
 257                 break;
 258         case 96:
 259                 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
 260                 break;
 261         case 128:
 262                 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
 263                 break;
 264         case 64:
 265                 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
 266                 break;
 267         case 768:
 268                 mod |= (MOD_RCLK_768FS << rfs_shift);
 269                 break;
 270         case 512:
 271                 mod |= (MOD_RCLK_512FS << rfs_shift);
 272                 break;
 273         case 384:
 274                 mod |= (MOD_RCLK_384FS << rfs_shift);
 275                 break;
 276         default:
 277                 mod |= (MOD_RCLK_256FS << rfs_shift);
 278                 break;
 279         }
 280
 281         writel(mod, i2s->addr + I2SMOD);
 282 }
 283
 284 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
 285 static inline unsigned get_bfs(struct i2s_dai *i2s)
 286 {
 287         u32 bfs;
 288         bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
 289         bfs &= i2s->variant_regs->bfs_mask;
 290
 291         switch (bfs) {
 292         case 8: return 256;
 293         case 7: return 192;
 294         case 6: return 128;
 295         case 5: return 96;
 296         case 4: return 64;
 297         case 3: return 24;
 298         case 2: return 16;
 299         case 1: return 48;
 300         default: return 32;
 301         }
 302 }
 303
 304 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
 305 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
 306 {
 307         u32 mod = readl(i2s->addr + I2SMOD);
 308         int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
 309         int bfs_shift = i2s->variant_regs->bfs_off;
 310
 311         /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
 312         if (!tdm && bfs > 48) {
 313                 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
 314                 return;
 315         }
 316
 317         mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
 318
 319         switch (bfs) {
 320         case 48:
 321                 mod |= (MOD_BCLK_48FS << bfs_shift);
 322                 break;
 323         case 32:
 324                 mod |= (MOD_BCLK_32FS << bfs_shift);
 325                 break;
 326         case 24:
 327                 mod |= (MOD_BCLK_24FS << bfs_shift);
 328                 break;
 329         case 16:
 330                 mod |= (MOD_BCLK_16FS << bfs_shift);
 331                 break;
 332         case 64:
 333                 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
 334                 break;
 335         case 96:
 336                 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
 337                 break;
 338         case 128:
 339                 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
 340                 break;
 341         case 192:
 342                 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
 343                 break;
 344         case 256:
 345                 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
 346                 break;
 347         default:
 348                 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
 349                 return;
 350         }
 351
 352         writel(mod, i2s->addr + I2SMOD);
 353 }
 354
 355 /* Sample-Size */
 356 static inline int get_blc(struct i2s_dai *i2s)
 357 {
 358         int blc = readl(i2s->addr + I2SMOD);
 359
 360         blc = (blc >> 13) & 0x3;
 361
 362         switch (blc) {
 363         case 2: return 24;
 364         case 1: return 8;
 365         default: return 16;
 366         }
 367 }
 368
 369 /* TX Channel Control */
 370 static void i2s_txctrl(struct i2s_dai *i2s, int on)
 371 {
 372         void __iomem *addr = i2s->addr;
 373         int txr_off = i2s->variant_regs->txr_off;
 374         u32 con = readl(addr + I2SCON);
 375         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 376
 377         if (on) {
 378                 con |= CON_ACTIVE;
 379                 con &= ~CON_TXCH_PAUSE;
 380
 381                 if (is_secondary(i2s)) {
 382                         con |= CON_TXSDMA_ACTIVE;
 383                         con &= ~CON_TXSDMA_PAUSE;
 384                 } else {
 385                         con |= CON_TXDMA_ACTIVE;
 386                         con &= ~CON_TXDMA_PAUSE;
 387                 }
 388
 389                 if (any_rx_active(i2s))
 390                         mod |= 2 << txr_off;
 391                 else
 392                         mod |= 0 << txr_off;
 393         } else {
 394                 if (is_secondary(i2s)) {
 395                         con |=  CON_TXSDMA_PAUSE;
 396                         con &= ~CON_TXSDMA_ACTIVE;
 397                 } else {
 398                         con |=  CON_TXDMA_PAUSE;
 399                         con &= ~CON_TXDMA_ACTIVE;
 400                 }
 401
 402                 if (other_tx_active(i2s)) {
 403                         writel(con, addr + I2SCON);
 404                         return;
 405                 }
 406
 407                 con |=  CON_TXCH_PAUSE;
 408
 409                 if (any_rx_active(i2s))
 410                         mod |= 1 << txr_off;
 411                 else
 412                         con &= ~CON_ACTIVE;
 413         }
 414
 415         writel(mod, addr + I2SMOD);
 416         writel(con, addr + I2SCON);
 417 }
 418
 419 /* RX Channel Control */
 420 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
 421 {
 422         void __iomem *addr = i2s->addr;
 423         int txr_off = i2s->variant_regs->txr_off;
 424         u32 con = readl(addr + I2SCON);
 425         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 426
 427         if (on) {
 428                 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
 429                 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
 430
 431                 if (any_tx_active(i2s))
 432                         mod |= 2 << txr_off;
 433                 else
 434                         mod |= 1 << txr_off;
 435         } else {
 436                 con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
 437                 con &= ~CON_RXDMA_ACTIVE;
 438
 439                 if (any_tx_active(i2s))
 440                         mod |= 0 << txr_off;
 441                 else
 442                         con &= ~CON_ACTIVE;
 443         }
 444
 445         writel(mod, addr + I2SMOD);
 446         writel(con, addr + I2SCON);
 447 }
 448
 449 /* Flush FIFO of an interface */
 450 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
 451 {
 452         void __iomem *fic;
 453         u32 val;
 454
 455         if (!i2s)
 456                 return;
 457
 458         if (is_secondary(i2s))
 459                 fic = i2s->addr + I2SFICS;
 460         else
 461                 fic = i2s->addr + I2SFIC;
 462
 463         /* Flush the FIFO */
 464         writel(readl(fic) | flush, fic);
 465
 466         /* Be patient */
 467         val = msecs_to_loops(1) / 1000; /* 1 usec */
 468         while (--val)
 469                 cpu_relax();
 470
 471         writel(readl(fic) & ~flush, fic);
 472 }
 473
 474 static int i2s_set_sysclk(struct snd_soc_dai *dai,
 475           int clk_id, unsigned int rfs, int dir)
 476 {
 477         struct i2s_dai *i2s = to_info(dai);
 478         struct i2s_dai *other = get_other_dai(i2s);
 479         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
 480         unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
 481         unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
 482         u32 mod, mask, val = 0;
 483         unsigned long flags;
 484
 485         spin_lock_irqsave(i2s->lock, flags);
 486         mod = readl(i2s->addr + I2SMOD);
 487         spin_unlock_irqrestore(i2s->lock, flags);
 488
 489         switch (clk_id) {
 490         case SAMSUNG_I2S_OPCLK:
 491                 mask = MOD_OPCLK_MASK;
 492                 val = dir;
 493                 break;
 494         case SAMSUNG_I2S_CDCLK:
 495                 mask = 1 << i2s_regs->cdclkcon_off;
 496                 /* Shouldn't matter in GATING(CLOCK_IN) mode */
 497                 if (dir == SND_SOC_CLOCK_IN)
 498                         rfs = 0;
 499
 500                 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
 501                                 (any_active(i2s) &&
 502                                 (((dir == SND_SOC_CLOCK_IN)
 503                                         && !(mod & cdcon_mask)) ||
 504                                 ((dir == SND_SOC_CLOCK_OUT)
 505                                         && (mod & cdcon_mask))))) {
 506                         dev_err(&i2s->pdev->dev,
 507                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 508                         return -EAGAIN;
 509                 }
 510
 511                 if (dir == SND_SOC_CLOCK_IN)
 512                         val = 1 << i2s_regs->cdclkcon_off;
 513
 514                 i2s->rfs = rfs;
 515                 break;
 516
 517         case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
 518         case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
 519                 mask = 1 << i2s_regs->rclksrc_off;
 520
 521                 if ((i2s->quirks & QUIRK_NO_MUXPSR)
 522                                 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
 523                         clk_id = 0;
 524                 else
 525                         clk_id = 1;
 526
 527                 if (!any_active(i2s)) {
 528                         if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
 529                                 if ((clk_id && !(mod & rsrc_mask)) ||
 530                                         (!clk_id && (mod & rsrc_mask))) {
 531                                         clk_disable_unprepare(i2s->op_clk);
 532                                         clk_put(i2s->op_clk);
 533                                 } else {
 534                                         i2s->rclk_srcrate =
 535                                                 clk_get_rate(i2s->op_clk);
 536                                         return 0;
 537                                 }
 538                         }
 539
 540                         if (clk_id)
 541                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
 542                                                 "i2s_opclk1");
 543                         else
 544                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
 545                                                 "i2s_opclk0");
 546
 547                         if (WARN_ON(IS_ERR(i2s->op_clk)))
 548                                 return PTR_ERR(i2s->op_clk);
 549
 550                         clk_prepare_enable(i2s->op_clk);
 551                         i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
 552
 553                         /* Over-ride the other's */
 554                         if (other) {
 555                                 other->op_clk = i2s->op_clk;
 556                                 other->rclk_srcrate = i2s->rclk_srcrate;
 557                         }
 558                 } else if ((!clk_id && (mod & rsrc_mask))
 559                                 || (clk_id && !(mod & rsrc_mask))) {
 560                         dev_err(&i2s->pdev->dev,
 561                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 562                         return -EAGAIN;
 563                 } else {
 564                         /* Call can't be on the active DAI */
 565                         i2s->op_clk = other->op_clk;
 566                         i2s->rclk_srcrate = other->rclk_srcrate;
 567                         return 0;
 568                 }
 569
 570                 if (clk_id == 1)
 571                         val = 1 << i2s_regs->rclksrc_off;
 572                 break;
 573         default:
 574                 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
 575                 return -EINVAL;
 576         }
 577
 578         spin_lock_irqsave(i2s->lock, flags);
 579         mod = readl(i2s->addr + I2SMOD);
 580         mod = (mod & ~mask) | val;
 581         writel(mod, i2s->addr + I2SMOD);
 582         spin_unlock_irqrestore(i2s->lock, flags);
 583
 584         return 0;
 585 }
 586
 587 static int i2s_set_fmt(struct snd_soc_dai *dai,
 588         unsigned int fmt)
 589 {
 590         struct i2s_dai *i2s = to_info(dai);
 591         int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
 592         u32 mod, tmp = 0;
 593         unsigned long flags;
 594
 595         lrp_shift = i2s->variant_regs->lrp_off;
 596         sdf_shift = i2s->variant_regs->sdf_off;
 597         mod_slave = 1 << i2s->variant_regs->mss_off;
 598
 599         sdf_mask = MOD_SDF_MASK << sdf_shift;
 600         lrp_rlow = MOD_LR_RLOW << lrp_shift;
 601
 602         /* Format is priority */
 603         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 604         case SND_SOC_DAIFMT_RIGHT_J:
 605                 tmp |= lrp_rlow;
 606                 tmp |= (MOD_SDF_MSB << sdf_shift);
 607                 break;
 608         case SND_SOC_DAIFMT_LEFT_J:
 609                 tmp |= lrp_rlow;
 610                 tmp |= (MOD_SDF_LSB << sdf_shift);
 611                 break;
 612         case SND_SOC_DAIFMT_I2S:
 613                 tmp |= (MOD_SDF_IIS << sdf_shift);
 614                 break;
 615         default:
 616                 dev_err(&i2s->pdev->dev, "Format not supported\n");
 617                 return -EINVAL;
 618         }
 619
 620         /*
 621          * INV flag is relative to the FORMAT flag - if set it simply
 622          * flips the polarity specified by the Standard
 623          */
 624         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 625         case SND_SOC_DAIFMT_NB_NF:
 626                 break;
 627         case SND_SOC_DAIFMT_NB_IF:
 628                 if (tmp & lrp_rlow)
 629                         tmp &= ~lrp_rlow;
 630                 else
 631                         tmp |= lrp_rlow;
 632                 break;
 633         default:
 634                 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
 635                 return -EINVAL;
 636         }
 637
 638         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 639         case SND_SOC_DAIFMT_CBM_CFM:
 640                 tmp |= mod_slave;
 641                 break;
 642         case SND_SOC_DAIFMT_CBS_CFS:
 643                 /*
 644                  * Set default source clock in Master mode, only when the
 645                  * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
 646                  * clock configuration assigned in DT is not overwritten.
 647                  */
 648                 if (i2s->rclk_srcrate == 0 && i2s->clk_data.clks == NULL)
 649                         i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
 650                                                         0, SND_SOC_CLOCK_IN);
 651                 break;
 652         default:
 653                 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
 654                 return -EINVAL;
 655         }
 656
 657         spin_lock_irqsave(i2s->lock, flags);
 658         mod = readl(i2s->addr + I2SMOD);
 659         /*
 660          * Don't change the I2S mode if any controller is active on this
 661          * channel.
 662          */
 663         if (any_active(i2s) &&
 664                 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
 665                 spin_unlock_irqrestore(i2s->lock, flags);
 666                 dev_err(&i2s->pdev->dev,
 667                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 668                 return -EAGAIN;
 669         }
 670
 671         mod &= ~(sdf_mask | lrp_rlow | mod_slave);
 672         mod |= tmp;
 673         writel(mod, i2s->addr + I2SMOD);
 674         spin_unlock_irqrestore(i2s->lock, flags);
 675
 676         return 0;
 677 }
 678
 679 static int i2s_hw_params(struct snd_pcm_substream *substream,
 680         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 681 {
 682         struct i2s_dai *i2s = to_info(dai);
 683         u32 mod, mask = 0, val = 0;
 684         unsigned long flags;
 685
 686         if (!is_secondary(i2s))
 687                 mask |= (MOD_DC2_EN | MOD_DC1_EN);
 688
 689         switch (params_channels(params)) {
 690         case 6:
 691                 val |= MOD_DC2_EN;
 692         case 4:
 693                 val |= MOD_DC1_EN;
 694                 break;
 695         case 2:
 696                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 697                         i2s->dma_playback.dma_size = 4;
 698                 else
 699                         i2s->dma_capture.dma_size = 4;
 700                 break;
 701         case 1:
 702                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 703                         i2s->dma_playback.dma_size = 2;
 704                 else
 705                         i2s->dma_capture.dma_size = 2;
 706
 707                 break;
 708         default:
 709                 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
 710                                 params_channels(params));
 711                 return -EINVAL;
 712         }
 713
 714         if (is_secondary(i2s))
 715                 mask |= MOD_BLCS_MASK;
 716         else
 717                 mask |= MOD_BLCP_MASK;
 718
 719         if (is_manager(i2s))
 720                 mask |= MOD_BLC_MASK;
 721
 722         switch (params_width(params)) {
 723         case 8:
 724                 if (is_secondary(i2s))
 725                         val |= MOD_BLCS_8BIT;
 726                 else
 727                         val |= MOD_BLCP_8BIT;
 728                 if (is_manager(i2s))
 729                         val |= MOD_BLC_8BIT;
 730                 break;
 731         case 16:
 732                 if (is_secondary(i2s))
 733                         val |= MOD_BLCS_16BIT;
 734                 else
 735                         val |= MOD_BLCP_16BIT;
 736                 if (is_manager(i2s))
 737                         val |= MOD_BLC_16BIT;
 738                 break;
 739         case 24:
 740                 if (is_secondary(i2s))
 741                         val |= MOD_BLCS_24BIT;
 742                 else
 743                         val |= MOD_BLCP_24BIT;
 744                 if (is_manager(i2s))
 745                         val |= MOD_BLC_24BIT;
 746                 break;
 747         default:
 748                 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
 749                                 params_format(params));
 750                 return -EINVAL;
 751         }
 752
 753         spin_lock_irqsave(i2s->lock, flags);
 754         mod = readl(i2s->addr + I2SMOD);
 755         mod = (mod & ~mask) | val;
 756         writel(mod, i2s->addr + I2SMOD);
 757         spin_unlock_irqrestore(i2s->lock, flags);
 758
 759         samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
 760
 761         i2s->frmclk = params_rate(params);
 762
 763         return 0;
 764 }
 765
 766 /* We set constraints on the substream acc to the version of I2S */
 767 static int i2s_startup(struct snd_pcm_substream *substream,
 768           struct snd_soc_dai *dai)
 769 {
 770         struct i2s_dai *i2s = to_info(dai);
 771         struct i2s_dai *other = get_other_dai(i2s);
 772         unsigned long flags;
 773
 774         spin_lock_irqsave(&lock, flags);
 775
 776         i2s->mode |= DAI_OPENED;
 777
 778         if (is_manager(other))
 779                 i2s->mode &= ~DAI_MANAGER;
 780         else
 781                 i2s->mode |= DAI_MANAGER;
 782
 783         if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
 784                 writel(CON_RSTCLR, i2s->addr + I2SCON);
 785
 786         spin_unlock_irqrestore(&lock, flags);
 787
 788         return 0;
 789 }
 790
 791 static void i2s_shutdown(struct snd_pcm_substream *substream,
 792         struct snd_soc_dai *dai)
 793 {
 794         struct i2s_dai *i2s = to_info(dai);
 795         struct i2s_dai *other = get_other_dai(i2s);
 796         unsigned long flags;
 797
 798         spin_lock_irqsave(&lock, flags);
 799
 800         i2s->mode &= ~DAI_OPENED;
 801         i2s->mode &= ~DAI_MANAGER;
 802
 803         if (is_opened(other))
 804                 other->mode |= DAI_MANAGER;
 805
 806         /* Reset any constraint on RFS and BFS */
 807         i2s->rfs = 0;
 808         i2s->bfs = 0;
 809
 810         spin_unlock_irqrestore(&lock, flags);
 811 }
 812
 813 static int config_setup(struct i2s_dai *i2s)
 814 {
 815         struct i2s_dai *other = get_other_dai(i2s);
 816         unsigned rfs, bfs, blc;
 817         u32 psr;
 818
 819         blc = get_blc(i2s);
 820
 821         bfs = i2s->bfs;
 822
 823         if (!bfs && other)
 824                 bfs = other->bfs;
 825
 826         /* Select least possible multiple(2) if no constraint set */
 827         if (!bfs)
 828                 bfs = blc * 2;
 829
 830         rfs = i2s->rfs;
 831
 832         if (!rfs && other)
 833                 rfs = other->rfs;
 834
 835         if ((rfs == 256 || rfs == 512) && (blc == 24)) {
 836                 dev_err(&i2s->pdev->dev,
 837                         "%d-RFS not supported for 24-blc\n", rfs);
 838                 return -EINVAL;
 839         }
 840
 841         if (!rfs) {
 842                 if (bfs == 16 || bfs == 32)
 843                         rfs = 256;
 844                 else
 845                         rfs = 384;
 846         }
 847
 848         /* If already setup and running */
 849         if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
 850                 dev_err(&i2s->pdev->dev,
 851                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 852                 return -EAGAIN;
 853         }
 854
 855         set_bfs(i2s, bfs);
 856         set_rfs(i2s, rfs);
 857
 858         /* Don't bother with PSR in Slave mode */
 859         if (is_slave(i2s))
 860                 return 0;
 861
 862         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
 863                 struct clk *rclksrc = i2s->clk_table[CLK_I2S_RCLK_SRC];
 864
 865                 if (i2s->rclk_srcrate == 0 && rclksrc && !IS_ERR(rclksrc))
 866                         i2s->rclk_srcrate = clk_get_rate(rclksrc);
 867
 868                 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
 869                 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
 870                 dev_dbg(&i2s->pdev->dev,
 871                         "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
 872                                 i2s->rclk_srcrate, psr, rfs, bfs);
 873         }
 874
 875         return 0;
 876 }
 877
 878 static int i2s_trigger(struct snd_pcm_substream *substream,
 879         int cmd, struct snd_soc_dai *dai)
 880 {
 881         int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
 882         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 883         struct i2s_dai *i2s = to_info(rtd->cpu_dai);
 884         unsigned long flags;
 885
 886         switch (cmd) {
 887         case SNDRV_PCM_TRIGGER_START:
 888         case SNDRV_PCM_TRIGGER_RESUME:
 889         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 890                 spin_lock_irqsave(i2s->lock, flags);
 891
 892                 if (config_setup(i2s)) {
 893                         spin_unlock_irqrestore(i2s->lock, flags);
 894                         return -EINVAL;
 895                 }
 896
 897                 if (capture)
 898                         i2s_rxctrl(i2s, 1);
 899                 else
 900                         i2s_txctrl(i2s, 1);
 901
 902                 spin_unlock_irqrestore(i2s->lock, flags);
 903                 break;
 904         case SNDRV_PCM_TRIGGER_STOP:
 905         case SNDRV_PCM_TRIGGER_SUSPEND:
 906         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 907                 spin_lock_irqsave(i2s->lock, flags);
 908
 909                 if (capture) {
 910                         i2s_rxctrl(i2s, 0);
 911                         i2s_fifo(i2s, FIC_RXFLUSH);
 912                 } else {
 913                         i2s_txctrl(i2s, 0);
 914                         i2s_fifo(i2s, FIC_TXFLUSH);
 915                 }
 916
 917                 spin_unlock_irqrestore(i2s->lock, flags);
 918                 break;
 919         }
 920
 921         return 0;
 922 }
 923
 924 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
 925         int div_id, int div)
 926 {
 927         struct i2s_dai *i2s = to_info(dai);
 928         struct i2s_dai *other = get_other_dai(i2s);
 929
 930         switch (div_id) {
 931         case SAMSUNG_I2S_DIV_BCLK:
 932                 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
 933                         || (other && other->bfs && (other->bfs != div))) {
 934                         dev_err(&i2s->pdev->dev,
 935                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 936                         return -EAGAIN;
 937                 }
 938                 i2s->bfs = div;
 939                 break;
 940         default:
 941                 dev_err(&i2s->pdev->dev,
 942                         "Invalid clock divider(%d)\n", div_id);
 943                 return -EINVAL;
 944         }
 945
 946         return 0;
 947 }
 948
 949 static snd_pcm_sframes_t
 950 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
 951 {
 952         struct i2s_dai *i2s = to_info(dai);
 953         u32 reg = readl(i2s->addr + I2SFIC);
 954         snd_pcm_sframes_t delay;
 955         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
 956
 957         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
 958                 delay = FIC_RXCOUNT(reg);
 959         else if (is_secondary(i2s))
 960                 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
 961         else
 962                 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
 963
 964         return delay;
 965 }
 966
 967 #ifdef CONFIG_PM
 968 static int i2s_suspend(struct snd_soc_dai *dai)
 969 {
 970         struct i2s_dai *i2s = to_info(dai);
 971
 972         i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
 973         i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
 974         i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
 975
 976         return 0;
 977 }
 978
 979 static int i2s_resume(struct snd_soc_dai *dai)
 980 {
 981         struct i2s_dai *i2s = to_info(dai);
 982
 983         writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
 984         writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
 985         writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
 986
 987         return 0;
 988 }
 989 #else
 990 #define i2s_suspend NULL
 991 #define i2s_resume  NULL
 992 #endif
 993
 994 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
 995 {
 996         struct i2s_dai *i2s = to_info(dai);
 997         struct i2s_dai *other = get_other_dai(i2s);
 998         unsigned long flags;
 999
1000         if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
1001                 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
1002                                            NULL);
1003         } else {
1004                 samsung_asoc_init_dma_data(dai, &i2s->dma_playback,
1005                                            &i2s->dma_capture);
1006
1007                 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1008                         writel(CON_RSTCLR, i2s->addr + I2SCON);
1009
1010                 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1011                         idma_reg_addr_init(i2s->addr,
1012                                         i2s->sec_dai->idma_playback.dma_addr);
1013         }
1014
1015         /* Reset any constraint on RFS and BFS */
1016         i2s->rfs = 0;
1017         i2s->bfs = 0;
1018         i2s->rclk_srcrate = 0;
1019
1020         spin_lock_irqsave(i2s->lock, flags);
1021         i2s_txctrl(i2s, 0);
1022         i2s_rxctrl(i2s, 0);
1023         i2s_fifo(i2s, FIC_TXFLUSH);
1024         i2s_fifo(other, FIC_TXFLUSH);
1025         i2s_fifo(i2s, FIC_RXFLUSH);
1026         spin_unlock_irqrestore(i2s->lock, flags);
1027
1028         /* Gate CDCLK by default */
1029         if (!is_opened(other))
1030                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1031                                 0, SND_SOC_CLOCK_IN);
1032
1033         return 0;
1034 }
1035
1036 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1037 {
1038         struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1039         unsigned long flags;
1040
1041         if (!is_secondary(i2s)) {
1042                 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1043                         spin_lock_irqsave(i2s->lock, flags);
1044                         writel(0, i2s->addr + I2SCON);
1045                         spin_unlock_irqrestore(i2s->lock, flags);
1046                 }
1047         }
1048
1049         return 0;
1050 }
1051
1052 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1053         .trigger = i2s_trigger,
1054         .hw_params = i2s_hw_params,
1055         .set_fmt = i2s_set_fmt,
1056         .set_clkdiv = i2s_set_clkdiv,
1057         .set_sysclk = i2s_set_sysclk,
1058         .startup = i2s_startup,
1059         .shutdown = i2s_shutdown,
1060         .delay = i2s_delay,
1061 };
1062
1063 static const struct snd_soc_component_driver samsung_i2s_component = {
1064         .name           = "samsung-i2s",
1065 };
1066
1067 #define SAMSUNG_I2S_RATES       SNDRV_PCM_RATE_8000_96000
1068
1069 #define SAMSUNG_I2S_FMTS        (SNDRV_PCM_FMTBIT_S8 | \
1070                                         SNDRV_PCM_FMTBIT_S16_LE | \
1071                                         SNDRV_PCM_FMTBIT_S24_LE)
1072
1073 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1074 {
1075         struct i2s_dai *i2s;
1076         int ret;
1077
1078         i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1079         if (i2s == NULL)
1080                 return NULL;
1081
1082         i2s->pdev = pdev;
1083         i2s->pri_dai = NULL;
1084         i2s->sec_dai = NULL;
1085         i2s->i2s_dai_drv.symmetric_rates = 1;
1086         i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1087         i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1088         i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1089         i2s->i2s_dai_drv.suspend = i2s_suspend;
1090         i2s->i2s_dai_drv.resume = i2s_resume;
1091         i2s->i2s_dai_drv.playback.channels_min = 1;
1092         i2s->i2s_dai_drv.playback.channels_max = 2;
1093         i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1094         i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1095
1096         if (!sec) {
1097                 i2s->i2s_dai_drv.capture.channels_min = 1;
1098                 i2s->i2s_dai_drv.capture.channels_max = 2;
1099                 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1100                 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1101                 dev_set_drvdata(&i2s->pdev->dev, i2s);
1102         } else {        /* Create a new platform_device for Secondary */
1103                 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
1104                 if (!i2s->pdev)
1105                         return NULL;
1106
1107                 i2s->pdev->dev.parent = &pdev->dev;
1108
1109                 platform_set_drvdata(i2s->pdev, i2s);
1110                 ret = platform_device_add(i2s->pdev);
1111                 if (ret < 0)
1112                         return NULL;
1113         }
1114
1115         return i2s;
1116 }
1117
1118 static const struct of_device_id exynos_i2s_match[];
1119
1120 static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
1121                                                 struct platform_device *pdev)
1122 {
1123         if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
1124                 const struct of_device_id *match;
1125                 match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
1126                 return match ? match->data : NULL;
1127         } else {
1128                 return (struct samsung_i2s_dai_data *)
1129                                 platform_get_device_id(pdev)->driver_data;
1130         }
1131 }
1132
1133 #ifdef CONFIG_PM
1134 static int i2s_runtime_suspend(struct device *dev)
1135 {
1136         struct i2s_dai *i2s = dev_get_drvdata(dev);
1137
1138         clk_disable_unprepare(i2s->clk);
1139
1140         return 0;
1141 }
1142
1143 static int i2s_runtime_resume(struct device *dev)
1144 {
1145         struct i2s_dai *i2s = dev_get_drvdata(dev);
1146
1147         clk_prepare_enable(i2s->clk);
1148
1149         return 0;
1150 }
1151 #endif /* CONFIG_PM */
1152
1153 static void i2s_unregister_clocks(struct i2s_dai *i2s)
1154 {
1155         int i;
1156
1157         for (i = 0; i < i2s->clk_data.clk_num; i++) {
1158                 if (!IS_ERR(i2s->clk_table[i]))
1159                         clk_unregister(i2s->clk_table[i]);
1160         }
1161 }
1162
1163 static void i2s_unregister_clock_provider(struct platform_device *pdev)
1164 {
1165         struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
1166
1167         of_clk_del_provider(pdev->dev.of_node);
1168         i2s_unregister_clocks(i2s);
1169 }
1170
1171 static int i2s_register_clock_provider(struct platform_device *pdev)
1172 {
1173         struct device *dev = &pdev->dev;
1174         struct i2s_dai *i2s = dev_get_drvdata(dev);
1175         const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1176         const char *p_names[2] = { NULL };
1177         const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1178         struct clk *rclksrc;
1179         int ret, i;
1180
1181         /* Register the clock provider only if it's expected in the DTB */
1182         if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1183                 return 0;
1184
1185         /* Get the RCLKSRC mux clock parent clock names */
1186         for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1187                 rclksrc = clk_get(dev, clk_name[i]);
1188                 if (IS_ERR(rclksrc))
1189                         continue;
1190                 p_names[i] = __clk_get_name(rclksrc);
1191                 clk_put(rclksrc);
1192         }
1193
1194         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1195                 /* Activate the prescaler */
1196                 u32 val = readl(i2s->addr + I2SPSR);
1197                 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1198
1199                 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(NULL,
1200                                 "i2s_rclksrc", p_names, ARRAY_SIZE(p_names),
1201                                 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1202                                 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1203                                 1, 0, i2s->lock);
1204
1205                 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(NULL,
1206                                 "i2s_presc", "i2s_rclksrc",
1207                                 CLK_SET_RATE_PARENT,
1208                                 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1209
1210                 p_names[0] = "i2s_presc";
1211                 i2s->clk_data.clk_num = 2;
1212         }
1213         of_property_read_string_index(dev->of_node,
1214                                 "clock-output-names", 0, &clk_name[0]);
1215
1216         i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(NULL, clk_name[0],
1217                                 p_names[0], CLK_SET_RATE_PARENT,
1218                                 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1219                                 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1220
1221         i2s->clk_data.clk_num += 1;
1222         i2s->clk_data.clks = i2s->clk_table;
1223
1224         ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1225                                   &i2s->clk_data);
1226         if (ret < 0) {
1227                 dev_err(dev, "failed to add clock provider: %d\n", ret);
1228                 i2s_unregister_clocks(i2s);
1229         }
1230
1231         return ret;
1232 }
1233
1234 static int samsung_i2s_probe(struct platform_device *pdev)
1235 {
1236         struct i2s_dai *pri_dai, *sec_dai = NULL;
1237         struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1238         struct samsung_i2s *i2s_cfg = NULL;
1239         struct resource *res;
1240         u32 regs_base, quirks = 0, idma_addr = 0;
1241         struct device_node *np = pdev->dev.of_node;
1242         const struct samsung_i2s_dai_data *i2s_dai_data;
1243         int ret;
1244
1245         /* Call during Seconday interface registration */
1246         i2s_dai_data = samsung_i2s_get_driver_data(pdev);
1247
1248         if (i2s_dai_data->dai_type == TYPE_SEC) {
1249                 sec_dai = dev_get_drvdata(&pdev->dev);
1250                 if (!sec_dai) {
1251                         dev_err(&pdev->dev, "Unable to get drvdata\n");
1252                         return -EFAULT;
1253                 }
1254                 ret = devm_snd_soc_register_component(&sec_dai->pdev->dev,
1255                                                 &samsung_i2s_component,
1256                                                 &sec_dai->i2s_dai_drv, 1);
1257                 if (ret != 0)
1258                         return ret;
1259
1260                 return samsung_asoc_dma_platform_register(&pdev->dev);
1261         }
1262
1263         pri_dai = i2s_alloc_dai(pdev, false);
1264         if (!pri_dai) {
1265                 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1266                 return -ENOMEM;
1267         }
1268
1269         spin_lock_init(&pri_dai->spinlock);
1270         pri_dai->lock = &pri_dai->spinlock;
1271
1272         if (!np) {
1273                 if (i2s_pdata == NULL) {
1274                         dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1275                         return -EINVAL;
1276                 }
1277
1278                 pri_dai->dma_playback.slave = i2s_pdata->dma_playback;
1279                 pri_dai->dma_capture.slave = i2s_pdata->dma_capture;
1280
1281                 if (&i2s_pdata->type)
1282                         i2s_cfg = &i2s_pdata->type.i2s;
1283
1284                 if (i2s_cfg) {
1285                         quirks = i2s_cfg->quirks;
1286                         idma_addr = i2s_cfg->idma_addr;
1287                 }
1288         } else {
1289                 quirks = i2s_dai_data->quirks;
1290                 if (of_property_read_u32(np, "samsung,idma-addr",
1291                                          &idma_addr)) {
1292                         if (quirks & QUIRK_SUPPORTS_IDMA) {
1293                                 dev_info(&pdev->dev, "idma address is not"\
1294                                                 "specified");
1295                         }
1296                 }
1297         }
1298
1299         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1300         pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1301         if (IS_ERR(pri_dai->addr))
1302                 return PTR_ERR(pri_dai->addr);
1303
1304         regs_base = res->start;
1305
1306         pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1307         if (IS_ERR(pri_dai->clk)) {
1308                 dev_err(&pdev->dev, "Failed to get iis clock\n");
1309                 return PTR_ERR(pri_dai->clk);
1310         }
1311
1312         ret = clk_prepare_enable(pri_dai->clk);
1313         if (ret != 0) {
1314                 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1315                 return ret;
1316         }
1317         pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
1318         pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
1319         pri_dai->dma_playback.ch_name = "tx";
1320         pri_dai->dma_capture.ch_name = "rx";
1321         pri_dai->dma_playback.dma_size = 4;
1322         pri_dai->dma_capture.dma_size = 4;
1323         pri_dai->quirks = quirks;
1324         pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1325
1326         if (quirks & QUIRK_PRI_6CHAN)
1327                 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1328
1329         if (quirks & QUIRK_SEC_DAI) {
1330                 sec_dai = i2s_alloc_dai(pdev, true);
1331                 if (!sec_dai) {
1332                         dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1333                         return -ENOMEM;
1334                 }
1335
1336                 sec_dai->lock = &pri_dai->spinlock;
1337                 sec_dai->variant_regs = pri_dai->variant_regs;
1338                 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
1339                 sec_dai->dma_playback.ch_name = "tx-sec";
1340
1341                 if (!np)
1342                         sec_dai->dma_playback.slave = i2s_pdata->dma_play_sec;
1343
1344                 sec_dai->dma_playback.dma_size = 4;
1345                 sec_dai->addr = pri_dai->addr;
1346                 sec_dai->clk = pri_dai->clk;
1347                 sec_dai->quirks = quirks;
1348                 sec_dai->idma_playback.dma_addr = idma_addr;
1349                 sec_dai->pri_dai = pri_dai;
1350                 pri_dai->sec_dai = sec_dai;
1351         }
1352
1353         if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1354                 dev_err(&pdev->dev, "Unable to configure gpio\n");
1355                 return -EINVAL;
1356         }
1357
1358         devm_snd_soc_register_component(&pri_dai->pdev->dev,
1359                                         &samsung_i2s_component,
1360                                         &pri_dai->i2s_dai_drv, 1);
1361
1362         pm_runtime_enable(&pdev->dev);
1363
1364         ret = samsung_asoc_dma_platform_register(&pdev->dev);
1365         if (ret != 0)
1366                 return ret;
1367
1368         return i2s_register_clock_provider(pdev);
1369 }
1370
1371 static int samsung_i2s_remove(struct platform_device *pdev)
1372 {
1373         struct i2s_dai *i2s, *other;
1374
1375         i2s = dev_get_drvdata(&pdev->dev);
1376         other = get_other_dai(i2s);
1377
1378         if (other) {
1379                 other->pri_dai = NULL;
1380                 other->sec_dai = NULL;
1381         } else {
1382                 pm_runtime_disable(&pdev->dev);
1383         }
1384
1385         if (!is_secondary(i2s)) {
1386                 i2s_unregister_clock_provider(pdev);
1387                 clk_disable_unprepare(i2s->clk);
1388         }
1389
1390         i2s->pri_dai = NULL;
1391         i2s->sec_dai = NULL;
1392
1393         return 0;
1394 }
1395
1396 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1397         .bfs_off = 1,
1398         .rfs_off = 3,
1399         .sdf_off = 5,
1400         .txr_off = 8,
1401         .rclksrc_off = 10,
1402         .mss_off = 11,
1403         .cdclkcon_off = 12,
1404         .lrp_off = 7,
1405         .bfs_mask = 0x3,
1406         .rfs_mask = 0x3,
1407         .ftx0cnt_off = 8,
1408 };
1409
1410 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1411         .bfs_off = 0,
1412         .rfs_off = 4,
1413         .sdf_off = 6,
1414         .txr_off = 8,
1415         .rclksrc_off = 10,
1416         .mss_off = 11,
1417         .cdclkcon_off = 12,
1418         .lrp_off = 15,
1419         .bfs_mask = 0xf,
1420         .rfs_mask = 0x3,
1421         .ftx0cnt_off = 8,
1422 };
1423
1424 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1425         .bfs_off = 0,
1426         .rfs_off = 4,
1427         .sdf_off = 7,
1428         .txr_off = 9,
1429         .rclksrc_off = 11,
1430         .mss_off = 12,
1431         .cdclkcon_off = 22,
1432         .lrp_off = 15,
1433         .bfs_mask = 0xf,
1434         .rfs_mask = 0x7,
1435         .ftx0cnt_off = 0,
1436 };
1437
1438 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1439         .bfs_off = 0,
1440         .rfs_off = 3,
1441         .sdf_off = 6,
1442         .txr_off = 8,
1443         .rclksrc_off = 10,
1444         .mss_off = 11,
1445         .cdclkcon_off = 12,
1446         .lrp_off = 15,
1447         .bfs_mask = 0x7,
1448         .rfs_mask = 0x7,
1449         .ftx0cnt_off = 8,
1450 };
1451
1452 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1453         .dai_type = TYPE_PRI,
1454         .quirks = QUIRK_NO_MUXPSR,
1455         .i2s_variant_regs = &i2sv3_regs,
1456 };
1457
1458 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1459         .dai_type = TYPE_PRI,
1460         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1461                         QUIRK_SUPPORTS_IDMA,
1462         .i2s_variant_regs = &i2sv3_regs,
1463 };
1464
1465 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1466         .dai_type = TYPE_PRI,
1467         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1468                         QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1469         .i2s_variant_regs = &i2sv6_regs,
1470 };
1471
1472 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1473         .dai_type = TYPE_PRI,
1474         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1475                         QUIRK_SUPPORTS_TDM,
1476         .i2s_variant_regs = &i2sv7_regs,
1477 };
1478
1479 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1480         .dai_type = TYPE_PRI,
1481         .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1482         .i2s_variant_regs = &i2sv5_i2s1_regs,
1483 };
1484
1485 static const struct samsung_i2s_dai_data samsung_dai_type_pri = {
1486         .dai_type = TYPE_PRI,
1487 };
1488
1489 static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1490         .dai_type = TYPE_SEC,
1491 };
1492
1493 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1494         {
1495                 .name           = "samsung-i2s",
1496                 .driver_data    = (kernel_ulong_t)&i2sv3_dai_type,
1497         }, {
1498                 .name           = "samsung-i2s-sec",
1499                 .driver_data    = (kernel_ulong_t)&samsung_dai_type_sec,
1500         }, {
1501                 .name           = "samsung-i2sv4",
1502                 .driver_data    = (kernel_ulong_t)&i2sv5_dai_type,
1503         },
1504         {},
1505 };
1506 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1507
1508 #ifdef CONFIG_OF
1509 static const struct of_device_id exynos_i2s_match[] = {
1510         {
1511                 .compatible = "samsung,s3c6410-i2s",
1512                 .data = &i2sv3_dai_type,
1513         }, {
1514                 .compatible = "samsung,s5pv210-i2s",
1515                 .data = &i2sv5_dai_type,
1516         }, {
1517                 .compatible = "samsung,exynos5420-i2s",
1518                 .data = &i2sv6_dai_type,
1519         }, {
1520                 .compatible = "samsung,exynos7-i2s",
1521                 .data = &i2sv7_dai_type,
1522         }, {
1523                 .compatible = "samsung,exynos7-i2s1",
1524                 .data = &i2sv5_dai_type_i2s1,
1525         },
1526         {},
1527 };
1528 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1529 #endif
1530
1531 static const struct dev_pm_ops samsung_i2s_pm = {
1532         SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1533                                 i2s_runtime_resume, NULL)
1534 };
1535
1536 static struct platform_driver samsung_i2s_driver = {
1537         .probe  = samsung_i2s_probe,
1538         .remove = samsung_i2s_remove,
1539         .id_table = samsung_i2s_driver_ids,
1540         .driver = {
1541                 .name = "samsung-i2s",
1542                 .of_match_table = of_match_ptr(exynos_i2s_match),
1543                 .pm = &samsung_i2s_pm,
1544         },
1545 };
1546
1547 module_platform_driver(samsung_i2s_driver);
1548
1549 /* Module information */
1550 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1551 MODULE_DESCRIPTION("Samsung I2S Interface");
1552 MODULE_ALIAS("platform:samsung-i2s");
1553 MODULE_LICENSE("GPL");