tools/perf/pmu-events/arch/x86/broadwell/memory.json

   1 [
   2     {
   3         "PublicDescription": "This event counts speculative cache-line split load uops dispatched to the L1 cache.",
   4         "EventCode": "0x05",
   5         "Counter": "0,1,2,3",
   6         "UMask": "0x1",
   7         "EventName": "MISALIGN_MEM_REF.LOADS",
   8         "SampleAfterValue": "2000003",
   9         "BriefDescription": "Speculative cache line split load uops dispatched to L1 cache",
  10         "CounterHTOff": "0,1,2,3,4,5,6,7"
  11     },
  12     {
  13         "PublicDescription": "This event counts speculative cache line split store-address (STA) uops dispatched to the L1 cache.",
  14         "EventCode": "0x05",
  15         "Counter": "0,1,2,3",
  16         "UMask": "0x2",
  17         "EventName": "MISALIGN_MEM_REF.STORES",
  18         "SampleAfterValue": "2000003",
  19         "BriefDescription": "Speculative cache line split STA uops dispatched to L1 cache",
  20         "CounterHTOff": "0,1,2,3,4,5,6,7"
  21     },
  22     {
  23         "PublicDescription": "Number of times a TSX line had a cache conflict.",
  24         "EventCode": "0x54",
  25         "Counter": "0,1,2,3",
  26         "UMask": "0x1",
  27         "EventName": "TX_MEM.ABORT_CONFLICT",
  28         "SampleAfterValue": "2000003",
  29         "BriefDescription": "Number of times a TSX line had a cache conflict",
  30         "CounterHTOff": "0,1,2,3,4,5,6,7"
  31     },
  32     {
  33         "PublicDescription": "Number of times a TSX Abort was triggered due to an evicted line caused by a transaction overflow.",
  34         "EventCode": "0x54",
  35         "Counter": "0,1,2,3",
  36         "UMask": "0x2",
  37         "EventName": "TX_MEM.ABORT_CAPACITY_WRITE",
  38         "SampleAfterValue": "2000003",
  39         "BriefDescription": "Number of times a TSX Abort was triggered due to an evicted line caused by a transaction overflow",
  40         "CounterHTOff": "0,1,2,3,4,5,6,7"
  41     },
  42     {
  43         "PublicDescription": "Number of times a TSX Abort was triggered due to a non-release/commit store to lock.",
  44         "EventCode": "0x54",
  45         "Counter": "0,1,2,3",
  46         "UMask": "0x4",
  47         "EventName": "TX_MEM.ABORT_HLE_STORE_TO_ELIDED_LOCK",
  48         "SampleAfterValue": "2000003",
  49         "BriefDescription": "Number of times a TSX Abort was triggered due to a non-release/commit store to lock",
  50         "CounterHTOff": "0,1,2,3,4,5,6,7"
  51     },
  52     {
  53         "PublicDescription": "Number of times a TSX Abort was triggered due to commit but Lock Buffer not empty.",
  54         "EventCode": "0x54",
  55         "Counter": "0,1,2,3",
  56         "UMask": "0x8",
  57         "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_NOT_EMPTY",
  58         "SampleAfterValue": "2000003",
  59         "BriefDescription": "Number of times a TSX Abort was triggered due to commit but Lock Buffer not empty",
  60         "CounterHTOff": "0,1,2,3,4,5,6,7"
  61     },
  62     {
  63         "PublicDescription": "Number of times a TSX Abort was triggered due to release/commit but data and address mismatch.",
  64         "EventCode": "0x54",
  65         "Counter": "0,1,2,3",
  66         "UMask": "0x10",
  67         "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_MISMATCH",
  68         "SampleAfterValue": "2000003",
  69         "BriefDescription": "Number of times a TSX Abort was triggered due to release/commit but data and address mismatch",
  70         "CounterHTOff": "0,1,2,3,4,5,6,7"
  71     },
  72     {
  73         "PublicDescription": "Number of times a TSX Abort was triggered due to attempting an unsupported alignment from Lock Buffer.",
  74         "EventCode": "0x54",
  75         "Counter": "0,1,2,3",
  76         "UMask": "0x20",
  77         "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_UNSUPPORTED_ALIGNMENT",
  78         "SampleAfterValue": "2000003",
  79         "BriefDescription": "Number of times a TSX Abort was triggered due to attempting an unsupported alignment from Lock Buffer",
  80         "CounterHTOff": "0,1,2,3,4,5,6,7"
  81     },
  82     {
  83         "PublicDescription": "Number of times we could not allocate Lock Buffer.",
  84         "EventCode": "0x54",
  85         "Counter": "0,1,2,3",
  86         "UMask": "0x40",
  87         "EventName": "TX_MEM.HLE_ELISION_BUFFER_FULL",
  88         "SampleAfterValue": "2000003",
  89         "BriefDescription": "Number of times we could not allocate Lock Buffer",
  90         "CounterHTOff": "0,1,2,3,4,5,6,7"
  91     },
  92     {
  93         "PublicDescription": "Unfriendly TSX abort triggered by  a flowmarker.",
  94         "EventCode": "0x5d",
  95         "Counter": "0,1,2,3",
  96         "UMask": "0x1",
  97         "EventName": "TX_EXEC.MISC1",
  98         "SampleAfterValue": "2000003",
  99         "BriefDescription": "Counts the number of times a class of instructions that may cause a transactional abort was executed. Since this is the count of execution, it may not always cause a transactional abort.",
 100         "CounterHTOff": "0,1,2,3,4,5,6,7"
 101     },
 102     {
 103         "PublicDescription": "Unfriendly TSX abort triggered by  a vzeroupper instruction.",
 104         "EventCode": "0x5d",
 105         "Counter": "0,1,2,3",
 106         "UMask": "0x2",
 107         "EventName": "TX_EXEC.MISC2",
 108         "SampleAfterValue": "2000003",
 109         "BriefDescription": "Counts the number of times a class of instructions (e.g., vzeroupper) that may cause a transactional abort was executed inside a transactional region",
 110         "CounterHTOff": "0,1,2,3,4,5,6,7"
 111     },
 112     {
 113         "PublicDescription": "Unfriendly TSX abort triggered by a nest count that is too deep.",
 114         "EventCode": "0x5d",
 115         "Counter": "0,1,2,3",
 116         "UMask": "0x4",
 117         "EventName": "TX_EXEC.MISC3",
 118         "SampleAfterValue": "2000003",
 119         "BriefDescription": "Counts the number of times an instruction execution caused the transactional nest count supported to be exceeded",
 120         "CounterHTOff": "0,1,2,3,4,5,6,7"
 121     },
 122     {
 123         "PublicDescription": "RTM region detected inside HLE.",
 124         "EventCode": "0x5d",
 125         "Counter": "0,1,2,3",
 126         "UMask": "0x8",
 127         "EventName": "TX_EXEC.MISC4",
 128         "SampleAfterValue": "2000003",
 129         "BriefDescription": "Counts the number of times a XBEGIN instruction was executed inside an HLE transactional region.",
 130         "CounterHTOff": "0,1,2,3,4,5,6,7"
 131     },
 132     {
 133         "EventCode": "0x5d",
 134         "Counter": "0,1,2,3",
 135         "UMask": "0x10",
 136         "EventName": "TX_EXEC.MISC5",
 137         "SampleAfterValue": "2000003",
 138         "BriefDescription": "Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region.",
 139         "CounterHTOff": "0,1,2,3,4,5,6,7"
 140     },
 141     {
 142         "PublicDescription": "This event counts the number of memory ordering Machine Clears detected. Memory Ordering Machine Clears can result from one of the following:\n1. memory disambiguation,\n2. external snoop, or\n3. cross SMT-HW-thread snoop (stores) hitting load buffer.",
 143         "EventCode": "0xC3",
 144         "Counter": "0,1,2,3",
 145         "UMask": "0x2",
 146         "EventName": "MACHINE_CLEARS.MEMORY_ORDERING",
 147         "SampleAfterValue": "100003",
 148         "BriefDescription": "Counts the number of machine clears due to memory order conflicts.",
 149         "CounterHTOff": "0,1,2,3,4,5,6,7"
 150     },
 151     {
 152         "PublicDescription": "Number of times we entered an HLE region\n does not count nested transactions.",
 153         "EventCode": "0xc8",
 154         "Counter": "0,1,2,3",
 155         "UMask": "0x1",
 156         "EventName": "HLE_RETIRED.START",
 157         "SampleAfterValue": "2000003",
 158         "BriefDescription": "Number of times we entered an HLE region; does not count nested transactions",
 159         "CounterHTOff": "0,1,2,3,4,5,6,7"
 160     },
 161     {
 162         "PublicDescription": "Number of times HLE commit succeeded.",
 163         "EventCode": "0xc8",
 164         "Counter": "0,1,2,3",
 165         "UMask": "0x2",
 166         "EventName": "HLE_RETIRED.COMMIT",
 167         "SampleAfterValue": "2000003",
 168         "BriefDescription": "Number of times HLE commit succeeded",
 169         "CounterHTOff": "0,1,2,3,4,5,6,7"
 170     },
 171     {
 172         "PEBS": "1",
 173         "PublicDescription": "Number of times HLE abort was triggered.",
 174         "EventCode": "0xc8",
 175         "Counter": "0,1,2,3",
 176         "UMask": "0x4",
 177         "EventName": "HLE_RETIRED.ABORTED",
 178         "SampleAfterValue": "2000003",
 179         "BriefDescription": "Number of times HLE abort was triggered",
 180         "CounterHTOff": "0,1,2,3,4,5,6,7"
 181     },
 182     {
 183         "PublicDescription": "Number of times an HLE abort was attributed to a Memory condition (See TSX_Memory event for additional details).",
 184         "EventCode": "0xc8",
 185         "Counter": "0,1,2,3",
 186         "UMask": "0x8",
 187         "EventName": "HLE_RETIRED.ABORTED_MISC1",
 188         "SampleAfterValue": "2000003",
 189         "BriefDescription": "Number of times an HLE execution aborted due to various memory events (e.g., read/write capacity and conflicts).",
 190         "CounterHTOff": "0,1,2,3,4,5,6,7"
 191     },
 192     {
 193         "PublicDescription": "Number of times the TSX watchdog signaled an HLE abort.",
 194         "EventCode": "0xc8",
 195         "Counter": "0,1,2,3",
 196         "UMask": "0x10",
 197         "EventName": "HLE_RETIRED.ABORTED_MISC2",
 198         "SampleAfterValue": "2000003",
 199         "BriefDescription": "Number of times an HLE execution aborted due to uncommon conditions",
 200         "CounterHTOff": "0,1,2,3,4,5,6,7"
 201     },
 202     {
 203         "PublicDescription": "Number of times a disallowed operation caused an HLE abort.",
 204         "EventCode": "0xc8",
 205         "Counter": "0,1,2,3",
 206         "UMask": "0x20",
 207         "EventName": "HLE_RETIRED.ABORTED_MISC3",
 208         "SampleAfterValue": "2000003",
 209         "BriefDescription": "Number of times an HLE execution aborted due to HLE-unfriendly instructions",
 210         "CounterHTOff": "0,1,2,3,4,5,6,7"
 211     },
 212     {
 213         "PublicDescription": "Number of times HLE caused a fault.",
 214         "EventCode": "0xc8",
 215         "Counter": "0,1,2,3",
 216         "UMask": "0x40",
 217         "EventName": "HLE_RETIRED.ABORTED_MISC4",
 218         "SampleAfterValue": "2000003",
 219         "BriefDescription": "Number of times an HLE execution aborted due to incompatible memory type",
 220         "CounterHTOff": "0,1,2,3,4,5,6,7"
 221     },
 222     {
 223         "PublicDescription": "Number of times HLE aborted and was not due to the abort conditions in subevents 3-6.",
 224         "EventCode": "0xc8",
 225         "Counter": "0,1,2,3",
 226         "UMask": "0x80",
 227         "EventName": "HLE_RETIRED.ABORTED_MISC5",
 228         "SampleAfterValue": "2000003",
 229         "BriefDescription": "Number of times an HLE execution aborted due to none of the previous 4 categories (e.g. interrupts)",
 230         "CounterHTOff": "0,1,2,3,4,5,6,7"
 231     },
 232     {
 233         "PublicDescription": "Number of times we entered an RTM region\n does not count nested transactions.",
 234         "EventCode": "0xc9",
 235         "Counter": "0,1,2,3",
 236         "UMask": "0x1",
 237         "EventName": "RTM_RETIRED.START",
 238         "SampleAfterValue": "2000003",
 239         "BriefDescription": "Number of times we entered an RTM region; does not count nested transactions",
 240         "CounterHTOff": "0,1,2,3"
 241     },
 242     {
 243         "PublicDescription": "Number of times RTM commit succeeded.",
 244         "EventCode": "0xc9",
 245         "Counter": "0,1,2,3",
 246         "UMask": "0x2",
 247         "EventName": "RTM_RETIRED.COMMIT",
 248         "SampleAfterValue": "2000003",
 249         "BriefDescription": "Number of times RTM commit succeeded",
 250         "CounterHTOff": "0,1,2,3"
 251     },
 252     {
 253         "PEBS": "1",
 254         "PublicDescription": "Number of times RTM abort was triggered .",
 255         "EventCode": "0xc9",
 256         "Counter": "0,1,2,3",
 257         "UMask": "0x4",
 258         "EventName": "RTM_RETIRED.ABORTED",
 259         "SampleAfterValue": "2000003",
 260         "BriefDescription": "Number of times RTM abort was triggered",
 261         "CounterHTOff": "0,1,2,3"
 262     },
 263     {
 264         "PublicDescription": "Number of times an RTM abort was attributed to a Memory condition (See TSX_Memory event for additional details).",
 265         "EventCode": "0xc9",
 266         "Counter": "0,1,2,3",
 267         "UMask": "0x8",
 268         "EventName": "RTM_RETIRED.ABORTED_MISC1",
 269         "SampleAfterValue": "2000003",
 270         "BriefDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts)",
 271         "CounterHTOff": "0,1,2,3"
 272     },
 273     {
 274         "PublicDescription": "Number of times the TSX watchdog signaled an RTM abort.",
 275         "EventCode": "0xc9",
 276         "Counter": "0,1,2,3",
 277         "UMask": "0x10",
 278         "EventName": "RTM_RETIRED.ABORTED_MISC2",
 279         "SampleAfterValue": "2000003",
 280         "BriefDescription": "Number of times an RTM execution aborted due to various memory events (e.g., read/write capacity and conflicts).",
 281         "CounterHTOff": "0,1,2,3"
 282     },
 283     {
 284         "PublicDescription": "Number of times a disallowed operation caused an RTM abort.",
 285         "EventCode": "0xc9",
 286         "Counter": "0,1,2,3",
 287         "UMask": "0x20",
 288         "EventName": "RTM_RETIRED.ABORTED_MISC3",
 289         "SampleAfterValue": "2000003",
 290         "BriefDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions",
 291         "CounterHTOff": "0,1,2,3"
 292     },
 293     {
 294         "PublicDescription": "Number of times a RTM caused a fault.",
 295         "EventCode": "0xc9",
 296         "Counter": "0,1,2,3",
 297         "UMask": "0x40",
 298         "EventName": "RTM_RETIRED.ABORTED_MISC4",
 299         "SampleAfterValue": "2000003",
 300         "BriefDescription": "Number of times an RTM execution aborted due to incompatible memory type",
 301         "CounterHTOff": "0,1,2,3"
 302     },
 303     {
 304         "PublicDescription": "Number of times RTM aborted and was not due to the abort conditions in subevents 3-6.",
 305         "EventCode": "0xc9",
 306         "Counter": "0,1,2,3",
 307         "UMask": "0x80",
 308         "EventName": "RTM_RETIRED.ABORTED_MISC5",
 309         "SampleAfterValue": "2000003",
 310         "BriefDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt)",
 311         "CounterHTOff": "0,1,2,3"
 312     },
 313     {
 314         "PEBS": "2",
 315         "PublicDescription": "This event counts loads with latency value being above four.",
 316         "EventCode": "0xCD",
 317         "MSRValue": "0x4",
 318         "Counter": "3",
 319         "UMask": "0x1",
 320         "Errata": "BDM100, BDM35",
 321         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4",
 322         "MSRIndex": "0x3F6",
 323         "SampleAfterValue": "100003",
 324         "BriefDescription": "Loads with latency value being above 4",
 325         "TakenAlone": "1",
 326         "CounterHTOff": "3"
 327     },
 328     {
 329         "PEBS": "2",
 330         "PublicDescription": "This event counts loads with latency value being above eight.",
 331         "EventCode": "0xCD",
 332         "MSRValue": "0x8",
 333         "Counter": "3",
 334         "UMask": "0x1",
 335         "Errata": "BDM100, BDM35",
 336         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8",
 337         "MSRIndex": "0x3F6",
 338         "SampleAfterValue": "50021",
 339         "BriefDescription": "Loads with latency value being above 8",
 340         "TakenAlone": "1",
 341         "CounterHTOff": "3"
 342     },
 343     {
 344         "PEBS": "2",
 345         "PublicDescription": "This event counts loads with latency value being above 16.",
 346         "EventCode": "0xCD",
 347         "MSRValue": "0x10",
 348         "Counter": "3",
 349         "UMask": "0x1",
 350         "Errata": "BDM100, BDM35",
 351         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16",
 352         "MSRIndex": "0x3F6",
 353         "SampleAfterValue": "20011",
 354         "BriefDescription": "Loads with latency value being above 16",
 355         "TakenAlone": "1",
 356         "CounterHTOff": "3"
 357     },
 358     {
 359         "PEBS": "2",
 360         "PublicDescription": "This event counts loads with latency value being above 32.",
 361         "EventCode": "0xCD",
 362         "MSRValue": "0x20",
 363         "Counter": "3",
 364         "UMask": "0x1",
 365         "Errata": "BDM100, BDM35",
 366         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32",
 367         "MSRIndex": "0x3F6",
 368         "SampleAfterValue": "100007",
 369         "BriefDescription": "Loads with latency value being above 32",
 370         "TakenAlone": "1",
 371         "CounterHTOff": "3"
 372     },
 373     {
 374         "PEBS": "2",
 375         "PublicDescription": "This event counts loads with latency value being above 64.",
 376         "EventCode": "0xCD",
 377         "MSRValue": "0x40",
 378         "Counter": "3",
 379         "UMask": "0x1",
 380         "Errata": "BDM100, BDM35",
 381         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64",
 382         "MSRIndex": "0x3F6",
 383         "SampleAfterValue": "2003",
 384         "BriefDescription": "Loads with latency value being above 64",
 385         "TakenAlone": "1",
 386         "CounterHTOff": "3"
 387     },
 388     {
 389         "PEBS": "2",
 390         "PublicDescription": "This event counts loads with latency value being above 128.",
 391         "EventCode": "0xCD",
 392         "MSRValue": "0x80",
 393         "Counter": "3",
 394         "UMask": "0x1",
 395         "Errata": "BDM100, BDM35",
 396         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128",
 397         "MSRIndex": "0x3F6",
 398         "SampleAfterValue": "1009",
 399         "BriefDescription": "Loads with latency value being above 128",
 400         "TakenAlone": "1",
 401         "CounterHTOff": "3"
 402     },
 403     {
 404         "PEBS": "2",
 405         "PublicDescription": "This event counts loads with latency value being above 256.",
 406         "EventCode": "0xCD",
 407         "MSRValue": "0x100",
 408         "Counter": "3",
 409         "UMask": "0x1",
 410         "Errata": "BDM100, BDM35",
 411         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256",
 412         "MSRIndex": "0x3F6",
 413         "SampleAfterValue": "503",
 414         "BriefDescription": "Loads with latency value being above 256",
 415         "TakenAlone": "1",
 416         "CounterHTOff": "3"
 417     },
 418     {
 419         "PEBS": "2",
 420         "PublicDescription": "This event counts loads with latency value being above 512.",
 421         "EventCode": "0xCD",
 422         "MSRValue": "0x200",
 423         "Counter": "3",
 424         "UMask": "0x1",
 425         "Errata": "BDM100, BDM35",
 426         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512",
 427         "MSRIndex": "0x3F6",
 428         "SampleAfterValue": "101",
 429         "BriefDescription": "Loads with latency value being above 512",
 430         "TakenAlone": "1",
 431         "CounterHTOff": "3"
 432     },
 433     {
 434         "EventCode": "0xB7, 0xBB",
 435         "MSRValue": "0x2000020001 ",
 436         "Counter": "0,1,2,3",
 437         "UMask": "0x1",
 438         "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_NON_DRAM",
 439         "MSRIndex": "0x1a6,0x1a7",
 440         "SampleAfterValue": "100003",
 441         "BriefDescription": "DEMAND_DATA_RD & SUPPLIER_NONE & SNOOP_NON_DRAM",
 442         "Offcore": "1",
 443         "CounterHTOff": "0,1,2,3"
 444     },
 445     {
 446         "EventCode": "0xB7, 0xBB",
 447         "MSRValue": "0x20003c0001 ",
 448         "Counter": "0,1,2,3",
 449         "UMask": "0x1",
 450         "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_NON_DRAM",
 451         "MSRIndex": "0x1a6,0x1a7",
 452         "SampleAfterValue": "100003",
 453         "BriefDescription": "Counts demand data reads that hit in the L3 and the target was non-DRAM system address.",
 454         "Offcore": "1",
 455         "CounterHTOff": "0,1,2,3"
 456     },
 457     {
 458         "EventCode": "0xB7, 0xBB",
 459         "MSRValue": "0x0084000001 ",
 460         "Counter": "0,1,2,3",
 461         "UMask": "0x1",
 462         "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
 463         "MSRIndex": "0x1a6,0x1a7",
 464         "SampleAfterValue": "100003",
 465         "BriefDescription": "DEMAND_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
 466         "Offcore": "1",
 467         "CounterHTOff": "0,1,2,3"
 468     },
 469     {
 470         "EventCode": "0xB7, 0xBB",
 471         "MSRValue": "0x0104000001 ",
 472         "Counter": "0,1,2,3",
 473         "UMask": "0x1",
 474         "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
 475         "MSRIndex": "0x1a6,0x1a7",
 476         "SampleAfterValue": "100003",
 477         "BriefDescription": "DEMAND_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
 478         "Offcore": "1",
 479         "CounterHTOff": "0,1,2,3"
 480     },
 481     {
 482         "EventCode": "0xB7, 0xBB",
 483         "MSRValue": "0x0204000001 ",
 484         "Counter": "0,1,2,3",
 485         "UMask": "0x1",
 486         "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
 487         "MSRIndex": "0x1a6,0x1a7",
 488         "SampleAfterValue": "100003",
 489         "BriefDescription": "DEMAND_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
 490         "Offcore": "1",
 491         "CounterHTOff": "0,1,2,3"
 492     },
 493     {
 494         "EventCode": "0xB7, 0xBB",
 495         "MSRValue": "0x0404000001 ",
 496         "Counter": "0,1,2,3",
 497         "UMask": "0x1",
 498         "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
 499         "MSRIndex": "0x1a6,0x1a7",
 500         "SampleAfterValue": "100003",
 501         "BriefDescription": "DEMAND_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
 502         "Offcore": "1",
 503         "CounterHTOff": "0,1,2,3"
 504     },
 505     {
 506         "EventCode": "0xB7, 0xBB",
 507         "MSRValue": "0x1004000001 ",
 508         "Counter": "0,1,2,3",
 509         "UMask": "0x1",
 510         "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
 511         "MSRIndex": "0x1a6,0x1a7",
 512         "SampleAfterValue": "100003",
 513         "BriefDescription": "DEMAND_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
 514         "Offcore": "1",
 515         "CounterHTOff": "0,1,2,3"
 516     },
 517     {
 518         "EventCode": "0xB7, 0xBB",
 519         "MSRValue": "0x2004000001 ",
 520         "Counter": "0,1,2,3",
 521         "UMask": "0x1",
 522         "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
 523         "MSRIndex": "0x1a6,0x1a7",
 524         "SampleAfterValue": "100003",
 525         "BriefDescription": "DEMAND_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
 526         "Offcore": "1",
 527         "CounterHTOff": "0,1,2,3"
 528     },
 529     {
 530         "EventCode": "0xB7, 0xBB",
 531         "MSRValue": "0x3f84000001 ",
 532         "Counter": "0,1,2,3",
 533         "UMask": "0x1",
 534         "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
 535         "MSRIndex": "0x1a6,0x1a7",
 536         "SampleAfterValue": "100003",
 537         "BriefDescription": "DEMAND_DATA_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
 538         "Offcore": "1",
 539         "CounterHTOff": "0,1,2,3"
 540     },
 541     {
 542         "EventCode": "0xB7, 0xBB",
 543         "MSRValue": "0x00bc000001 ",
 544         "Counter": "0,1,2,3",
 545         "UMask": "0x1",
 546         "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE",
 547         "MSRIndex": "0x1a6,0x1a7",
 548         "SampleAfterValue": "100003",
 549         "BriefDescription": "Counts demand data reads that miss the L3 with no details on snoop-related information.",
 550         "Offcore": "1",
 551         "CounterHTOff": "0,1,2,3"
 552     },
 553     {
 554         "EventCode": "0xB7, 0xBB",
 555         "MSRValue": "0x013c000001 ",
 556         "Counter": "0,1,2,3",
 557         "UMask": "0x1",
 558         "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_NOT_NEEDED",
 559         "MSRIndex": "0x1a6,0x1a7",
 560         "SampleAfterValue": "100003",
 561         "BriefDescription": "DEMAND_DATA_RD & L3_MISS & SNOOP_NOT_NEEDED",
 562         "Offcore": "1",
 563         "CounterHTOff": "0,1,2,3"
 564     },
 565     {
 566         "EventCode": "0xB7, 0xBB",
 567         "MSRValue": "0x023c000001 ",
 568         "Counter": "0,1,2,3",
 569         "UMask": "0x1",
 570         "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS",
 571         "MSRIndex": "0x1a6,0x1a7",
 572         "SampleAfterValue": "100003",
 573         "BriefDescription": "Counts demand data reads that miss the L3 with a snoop miss response.",
 574         "Offcore": "1",
 575         "CounterHTOff": "0,1,2,3"
 576     },
 577     {
 578         "EventCode": "0xB7, 0xBB",
 579         "MSRValue": "0x043c000001 ",
 580         "Counter": "0,1,2,3",
 581         "UMask": "0x1",
 582         "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_HIT_NO_FWD",
 583         "MSRIndex": "0x1a6,0x1a7",
 584         "SampleAfterValue": "100003",
 585         "BriefDescription": "DEMAND_DATA_RD & L3_MISS & SNOOP_HIT_NO_FWD",
 586         "Offcore": "1",
 587         "CounterHTOff": "0,1,2,3"
 588     },
 589     {
 590         "EventCode": "0xB7, 0xBB",
 591         "MSRValue": "0x20003c0002 ",
 592         "Counter": "0,1,2,3",
 593         "UMask": "0x1",
 594         "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_NON_DRAM",
 595         "MSRIndex": "0x1a6,0x1a7",
 596         "SampleAfterValue": "100003",
 597         "BriefDescription": "Counts all demand data writes (RFOs) that hit in the L3 and the target was non-DRAM system address.",
 598         "Offcore": "1",
 599         "CounterHTOff": "0,1,2,3"
 600     },
 601     {
 602         "EventCode": "0xB7, 0xBB",
 603         "MSRValue": "0x3f84000002 ",
 604         "Counter": "0,1,2,3",
 605         "UMask": "0x1",
 606         "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
 607         "MSRIndex": "0x1a6,0x1a7",
 608         "SampleAfterValue": "100003",
 609         "BriefDescription": "DEMAND_RFO & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
 610         "Offcore": "1",
 611         "CounterHTOff": "0,1,2,3"
 612     },
 613     {
 614         "EventCode": "0xB7, 0xBB",
 615         "MSRValue": "0x00bc000002 ",
 616         "Counter": "0,1,2,3",
 617         "UMask": "0x1",
 618         "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_NONE",
 619         "MSRIndex": "0x1a6,0x1a7",
 620         "SampleAfterValue": "100003",
 621         "BriefDescription": "Counts all demand data writes (RFOs) that miss the L3 with no details on snoop-related information.",
 622         "Offcore": "1",
 623         "CounterHTOff": "0,1,2,3"
 624     },
 625     {
 626         "EventCode": "0xB7, 0xBB",
 627         "MSRValue": "0x013c000002 ",
 628         "Counter": "0,1,2,3",
 629         "UMask": "0x1",
 630         "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_NOT_NEEDED",
 631         "MSRIndex": "0x1a6,0x1a7",
 632         "SampleAfterValue": "100003",
 633         "BriefDescription": "DEMAND_RFO & L3_MISS & SNOOP_NOT_NEEDED",
 634         "Offcore": "1",
 635         "CounterHTOff": "0,1,2,3"
 636     },
 637     {
 638         "EventCode": "0xB7, 0xBB",
 639         "MSRValue": "0x023c000002 ",
 640         "Counter": "0,1,2,3",
 641         "UMask": "0x1",
 642         "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_MISS",
 643         "MSRIndex": "0x1a6,0x1a7",
 644         "SampleAfterValue": "100003",
 645         "BriefDescription": "Counts all demand data writes (RFOs) that miss the L3 with a snoop miss response.",
 646         "Offcore": "1",
 647         "CounterHTOff": "0,1,2,3"
 648     },
 649     {
 650         "EventCode": "0xB7, 0xBB",
 651         "MSRValue": "0x043c000002 ",
 652         "Counter": "0,1,2,3",
 653         "UMask": "0x1",
 654         "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_HIT_NO_FWD",
 655         "MSRIndex": "0x1a6,0x1a7",
 656         "SampleAfterValue": "100003",
 657         "BriefDescription": "DEMAND_RFO & L3_MISS & SNOOP_HIT_NO_FWD",
 658         "Offcore": "1",
 659         "CounterHTOff": "0,1,2,3"
 660     },
 661     {
 662         "EventCode": "0xB7, 0xBB",
 663         "MSRValue": "0x2000020004 ",
 664         "Counter": "0,1,2,3",
 665         "UMask": "0x1",
 666         "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_NON_DRAM",
 667         "MSRIndex": "0x1a6,0x1a7",
 668         "SampleAfterValue": "100003",
 669         "BriefDescription": "DEMAND_CODE_RD & SUPPLIER_NONE & SNOOP_NON_DRAM",
 670         "Offcore": "1",
 671         "CounterHTOff": "0,1,2,3"
 672     },
 673     {
 674         "EventCode": "0xB7, 0xBB",
 675         "MSRValue": "0x20003c0004 ",
 676         "Counter": "0,1,2,3",
 677         "UMask": "0x1",
 678         "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_NON_DRAM",
 679         "MSRIndex": "0x1a6,0x1a7",
 680         "SampleAfterValue": "100003",
 681         "BriefDescription": "Counts all demand code reads that hit in the L3 and the target was non-DRAM system address.",
 682         "Offcore": "1",
 683         "CounterHTOff": "0,1,2,3"
 684     },
 685     {
 686         "EventCode": "0xB7, 0xBB",
 687         "MSRValue": "0x0084000004 ",
 688         "Counter": "0,1,2,3",
 689         "UMask": "0x1",
 690         "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
 691         "MSRIndex": "0x1a6,0x1a7",
 692         "SampleAfterValue": "100003",
 693         "BriefDescription": "DEMAND_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
 694         "Offcore": "1",
 695         "CounterHTOff": "0,1,2,3"
 696     },
 697     {
 698         "EventCode": "0xB7, 0xBB",
 699         "MSRValue": "0x0104000004 ",
 700         "Counter": "0,1,2,3",
 701         "UMask": "0x1",
 702         "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
 703         "MSRIndex": "0x1a6,0x1a7",
 704         "SampleAfterValue": "100003",
 705         "BriefDescription": "DEMAND_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
 706         "Offcore": "1",
 707         "CounterHTOff": "0,1,2,3"
 708     },
 709     {
 710         "EventCode": "0xB7, 0xBB",
 711         "MSRValue": "0x0204000004 ",
 712         "Counter": "0,1,2,3",
 713         "UMask": "0x1",
 714         "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
 715         "MSRIndex": "0x1a6,0x1a7",
 716         "SampleAfterValue": "100003",
 717         "BriefDescription": "DEMAND_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
 718         "Offcore": "1",
 719         "CounterHTOff": "0,1,2,3"
 720     },
 721     {
 722         "EventCode": "0xB7, 0xBB",
 723         "MSRValue": "0x0404000004 ",
 724         "Counter": "0,1,2,3",
 725         "UMask": "0x1",
 726         "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
 727         "MSRIndex": "0x1a6,0x1a7",
 728         "SampleAfterValue": "100003",
 729         "BriefDescription": "DEMAND_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
 730         "Offcore": "1",
 731         "CounterHTOff": "0,1,2,3"
 732     },
 733     {
 734         "EventCode": "0xB7, 0xBB",
 735         "MSRValue": "0x1004000004 ",
 736         "Counter": "0,1,2,3",
 737         "UMask": "0x1",
 738         "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
 739         "MSRIndex": "0x1a6,0x1a7",
 740         "SampleAfterValue": "100003",
 741         "BriefDescription": "DEMAND_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
 742         "Offcore": "1",
 743         "CounterHTOff": "0,1,2,3"
 744     },
 745     {
 746         "EventCode": "0xB7, 0xBB",
 747         "MSRValue": "0x2004000004 ",
 748         "Counter": "0,1,2,3",
 749         "UMask": "0x1",
 750         "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
 751         "MSRIndex": "0x1a6,0x1a7",
 752         "SampleAfterValue": "100003",
 753         "BriefDescription": "DEMAND_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
 754         "Offcore": "1",
 755         "CounterHTOff": "0,1,2,3"
 756     },
 757     {
 758         "EventCode": "0xB7, 0xBB",
 759         "MSRValue": "0x3f84000004 ",
 760         "Counter": "0,1,2,3",
 761         "UMask": "0x1",
 762         "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
 763         "MSRIndex": "0x1a6,0x1a7",
 764         "SampleAfterValue": "100003",
 765         "BriefDescription": "DEMAND_CODE_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
 766         "Offcore": "1",
 767         "CounterHTOff": "0,1,2,3"
 768     },
 769     {
 770         "EventCode": "0xB7, 0xBB",
 771         "MSRValue": "0x00bc000004 ",
 772         "Counter": "0,1,2,3",
 773         "UMask": "0x1",
 774         "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE",
 775         "MSRIndex": "0x1a6,0x1a7",
 776         "SampleAfterValue": "100003",
 777         "BriefDescription": "Counts all demand code reads that miss the L3 with no details on snoop-related information.",
 778         "Offcore": "1",
 779         "CounterHTOff": "0,1,2,3"
 780     },
 781     {
 782         "EventCode": "0xB7, 0xBB",
 783         "MSRValue": "0x013c000004 ",
 784         "Counter": "0,1,2,3",
 785         "UMask": "0x1",
 786         "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_NOT_NEEDED",
 787         "MSRIndex": "0x1a6,0x1a7",
 788         "SampleAfterValue": "100003",
 789         "BriefDescription": "DEMAND_CODE_RD & L3_MISS & SNOOP_NOT_NEEDED",
 790         "Offcore": "1",
 791         "CounterHTOff": "0,1,2,3"
 792     },
 793     {
 794         "EventCode": "0xB7, 0xBB",
 795         "MSRValue": "0x023c000004 ",
 796         "Counter": "0,1,2,3",
 797         "UMask": "0x1",
 798         "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS",
 799         "MSRIndex": "0x1a6,0x1a7",
 800         "SampleAfterValue": "100003",
 801         "BriefDescription": "Counts all demand code reads that miss the L3 with a snoop miss response.",
 802         "Offcore": "1",
 803         "CounterHTOff": "0,1,2,3"
 804     },
 805     {
 806         "EventCode": "0xB7, 0xBB",
 807         "MSRValue": "0x043c000004 ",
 808         "Counter": "0,1,2,3",
 809         "UMask": "0x1",
 810         "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_HIT_NO_FWD",
 811         "MSRIndex": "0x1a6,0x1a7",
 812         "SampleAfterValue": "100003",
 813         "BriefDescription": "DEMAND_CODE_RD & L3_MISS & SNOOP_HIT_NO_FWD",
 814         "Offcore": "1",
 815         "CounterHTOff": "0,1,2,3"
 816     },
 817     {
 818         "EventCode": "0xB7, 0xBB",
 819         "MSRValue": "0x2000020008 ",
 820         "Counter": "0,1,2,3",
 821         "UMask": "0x1",
 822         "EventName": "OFFCORE_RESPONSE.COREWB.SUPPLIER_NONE.SNOOP_NON_DRAM",
 823         "MSRIndex": "0x1a6,0x1a7",
 824         "SampleAfterValue": "100003",
 825         "BriefDescription": "COREWB & SUPPLIER_NONE & SNOOP_NON_DRAM",
 826         "Offcore": "1",
 827         "CounterHTOff": "0,1,2,3"
 828     },
 829     {
 830         "EventCode": "0xB7, 0xBB",
 831         "MSRValue": "0x20003c0008 ",
 832         "Counter": "0,1,2,3",
 833         "UMask": "0x1",
 834         "EventName": "OFFCORE_RESPONSE.COREWB.L3_HIT.SNOOP_NON_DRAM",
 835         "MSRIndex": "0x1a6,0x1a7",
 836         "SampleAfterValue": "100003",
 837         "BriefDescription": "Counts writebacks (modified to exclusive) that hit in the L3 and the target was non-DRAM system address.",
 838         "Offcore": "1",
 839         "CounterHTOff": "0,1,2,3"
 840     },
 841     {
 842         "EventCode": "0xB7, 0xBB",
 843         "MSRValue": "0x0084000008 ",
 844         "Counter": "0,1,2,3",
 845         "UMask": "0x1",
 846         "EventName": "OFFCORE_RESPONSE.COREWB.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
 847         "MSRIndex": "0x1a6,0x1a7",
 848         "SampleAfterValue": "100003",
 849         "BriefDescription": "COREWB & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
 850         "Offcore": "1",
 851         "CounterHTOff": "0,1,2,3"
 852     },
 853     {
 854         "EventCode": "0xB7, 0xBB",
 855         "MSRValue": "0x0104000008 ",
 856         "Counter": "0,1,2,3",
 857         "UMask": "0x1",
 858         "EventName": "OFFCORE_RESPONSE.COREWB.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
 859         "MSRIndex": "0x1a6,0x1a7",
 860         "SampleAfterValue": "100003",
 861         "BriefDescription": "COREWB & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
 862         "Offcore": "1",
 863         "CounterHTOff": "0,1,2,3"
 864     },
 865     {
 866         "EventCode": "0xB7, 0xBB",
 867         "MSRValue": "0x0204000008 ",
 868         "Counter": "0,1,2,3",
 869         "UMask": "0x1",
 870         "EventName": "OFFCORE_RESPONSE.COREWB.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
 871         "MSRIndex": "0x1a6,0x1a7",
 872         "SampleAfterValue": "100003",
 873         "BriefDescription": "COREWB & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
 874         "Offcore": "1",
 875         "CounterHTOff": "0,1,2,3"
 876     },
 877     {
 878         "EventCode": "0xB7, 0xBB",
 879         "MSRValue": "0x0404000008 ",
 880         "Counter": "0,1,2,3",
 881         "UMask": "0x1",
 882         "EventName": "OFFCORE_RESPONSE.COREWB.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
 883         "MSRIndex": "0x1a6,0x1a7",
 884         "SampleAfterValue": "100003",
 885         "BriefDescription": "COREWB & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
 886         "Offcore": "1",
 887         "CounterHTOff": "0,1,2,3"
 888     },
 889     {
 890         "EventCode": "0xB7, 0xBB",
 891         "MSRValue": "0x1004000008 ",
 892         "Counter": "0,1,2,3",
 893         "UMask": "0x1",
 894         "EventName": "OFFCORE_RESPONSE.COREWB.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
 895         "MSRIndex": "0x1a6,0x1a7",
 896         "SampleAfterValue": "100003",
 897         "BriefDescription": "COREWB & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
 898         "Offcore": "1",
 899         "CounterHTOff": "0,1,2,3"
 900     },
 901     {
 902         "EventCode": "0xB7, 0xBB",
 903         "MSRValue": "0x2004000008 ",
 904         "Counter": "0,1,2,3",
 905         "UMask": "0x1",
 906         "EventName": "OFFCORE_RESPONSE.COREWB.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
 907         "MSRIndex": "0x1a6,0x1a7",
 908         "SampleAfterValue": "100003",
 909         "BriefDescription": "COREWB & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
 910         "Offcore": "1",
 911         "CounterHTOff": "0,1,2,3"
 912     },
 913     {
 914         "EventCode": "0xB7, 0xBB",
 915         "MSRValue": "0x3f84000008 ",
 916         "Counter": "0,1,2,3",
 917         "UMask": "0x1",
 918         "EventName": "OFFCORE_RESPONSE.COREWB.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
 919         "MSRIndex": "0x1a6,0x1a7",
 920         "SampleAfterValue": "100003",
 921         "BriefDescription": "COREWB & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
 922         "Offcore": "1",
 923         "CounterHTOff": "0,1,2,3"
 924     },
 925     {
 926         "EventCode": "0xB7, 0xBB",
 927         "MSRValue": "0x00bc000008 ",
 928         "Counter": "0,1,2,3",
 929         "UMask": "0x1",
 930         "EventName": "OFFCORE_RESPONSE.COREWB.L3_MISS.SNOOP_NONE",
 931         "MSRIndex": "0x1a6,0x1a7",
 932         "SampleAfterValue": "100003",
 933         "BriefDescription": "Counts writebacks (modified to exclusive) that miss the L3 with no details on snoop-related information.",
 934         "Offcore": "1",
 935         "CounterHTOff": "0,1,2,3"
 936     },
 937     {
 938         "EventCode": "0xB7, 0xBB",
 939         "MSRValue": "0x013c000008 ",
 940         "Counter": "0,1,2,3",
 941         "UMask": "0x1",
 942         "EventName": "OFFCORE_RESPONSE.COREWB.L3_MISS.SNOOP_NOT_NEEDED",
 943         "MSRIndex": "0x1a6,0x1a7",
 944         "SampleAfterValue": "100003",
 945         "BriefDescription": "COREWB & L3_MISS & SNOOP_NOT_NEEDED",
 946         "Offcore": "1",
 947         "CounterHTOff": "0,1,2,3"
 948     },
 949     {
 950         "EventCode": "0xB7, 0xBB",
 951         "MSRValue": "0x023c000008 ",
 952         "Counter": "0,1,2,3",
 953         "UMask": "0x1",
 954         "EventName": "OFFCORE_RESPONSE.COREWB.L3_MISS.SNOOP_MISS",
 955         "MSRIndex": "0x1a6,0x1a7",
 956         "SampleAfterValue": "100003",
 957         "BriefDescription": "Counts writebacks (modified to exclusive) that miss the L3 with a snoop miss response.",
 958         "Offcore": "1",
 959         "CounterHTOff": "0,1,2,3"
 960     },
 961     {
 962         "EventCode": "0xB7, 0xBB",
 963         "MSRValue": "0x043c000008 ",
 964         "Counter": "0,1,2,3",
 965         "UMask": "0x1",
 966         "EventName": "OFFCORE_RESPONSE.COREWB.L3_MISS.SNOOP_HIT_NO_FWD",
 967         "MSRIndex": "0x1a6,0x1a7",
 968         "SampleAfterValue": "100003",
 969         "BriefDescription": "COREWB & L3_MISS & SNOOP_HIT_NO_FWD",
 970         "Offcore": "1",
 971         "CounterHTOff": "0,1,2,3"
 972     },
 973     {
 974         "EventCode": "0xB7, 0xBB",
 975         "MSRValue": "0x2000020010 ",
 976         "Counter": "0,1,2,3",
 977         "UMask": "0x1",
 978         "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.SUPPLIER_NONE.SNOOP_NON_DRAM",
 979         "MSRIndex": "0x1a6,0x1a7",
 980         "SampleAfterValue": "100003",
 981         "BriefDescription": "PF_L2_DATA_RD & SUPPLIER_NONE & SNOOP_NON_DRAM",
 982         "Offcore": "1",
 983         "CounterHTOff": "0,1,2,3"
 984     },
 985     {
 986         "EventCode": "0xB7, 0xBB",
 987         "MSRValue": "0x20003c0010 ",
 988         "Counter": "0,1,2,3",
 989         "UMask": "0x1",
 990         "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT.SNOOP_NON_DRAM",
 991         "MSRIndex": "0x1a6,0x1a7",
 992         "SampleAfterValue": "100003",
 993         "BriefDescription": "Counts prefetch (that bring data to L2) data reads that hit in the L3 and the target was non-DRAM system address.",
 994         "Offcore": "1",
 995         "CounterHTOff": "0,1,2,3"
 996     },
 997     {
 998         "EventCode": "0xB7, 0xBB",
 999         "MSRValue": "0x0084000010 ",
1000         "Counter": "0,1,2,3",
1001         "UMask": "0x1",
1002         "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
1003         "MSRIndex": "0x1a6,0x1a7",
1004         "SampleAfterValue": "100003",
1005         "BriefDescription": "PF_L2_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
1006         "Offcore": "1",
1007         "CounterHTOff": "0,1,2,3"
1008     },
1009     {
1010         "EventCode": "0xB7, 0xBB",
1011         "MSRValue": "0x0104000010 ",
1012         "Counter": "0,1,2,3",
1013         "UMask": "0x1",
1014         "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
1015         "MSRIndex": "0x1a6,0x1a7",
1016         "SampleAfterValue": "100003",
1017         "BriefDescription": "PF_L2_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
1018         "Offcore": "1",
1019         "CounterHTOff": "0,1,2,3"
1020     },
1021     {
1022         "EventCode": "0xB7, 0xBB",
1023         "MSRValue": "0x0204000010 ",
1024         "Counter": "0,1,2,3",
1025         "UMask": "0x1",
1026         "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
1027         "MSRIndex": "0x1a6,0x1a7",
1028         "SampleAfterValue": "100003",
1029         "BriefDescription": "PF_L2_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
1030         "Offcore": "1",
1031         "CounterHTOff": "0,1,2,3"
1032     },
1033     {
1034         "EventCode": "0xB7, 0xBB",
1035         "MSRValue": "0x0404000010 ",
1036         "Counter": "0,1,2,3",
1037         "UMask": "0x1",
1038         "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
1039         "MSRIndex": "0x1a6,0x1a7",
1040         "SampleAfterValue": "100003",
1041         "BriefDescription": "PF_L2_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
1042         "Offcore": "1",
1043         "CounterHTOff": "0,1,2,3"
1044     },
1045     {
1046         "EventCode": "0xB7, 0xBB",
1047         "MSRValue": "0x1004000010 ",
1048         "Counter": "0,1,2,3",
1049         "UMask": "0x1",
1050         "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
1051         "MSRIndex": "0x1a6,0x1a7",
1052         "SampleAfterValue": "100003",
1053         "BriefDescription": "PF_L2_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
1054         "Offcore": "1",
1055         "CounterHTOff": "0,1,2,3"
1056     },
1057     {
1058         "EventCode": "0xB7, 0xBB",
1059         "MSRValue": "0x2004000010 ",
1060         "Counter": "0,1,2,3",
1061         "UMask": "0x1",
1062         "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
1063         "MSRIndex": "0x1a6,0x1a7",
1064         "SampleAfterValue": "100003",
1065         "BriefDescription": "PF_L2_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
1066         "Offcore": "1",
1067         "CounterHTOff": "0,1,2,3"
1068     },
1069     {
1070         "EventCode": "0xB7, 0xBB",
1071         "MSRValue": "0x3f84000010 ",
1072         "Counter": "0,1,2,3",
1073         "UMask": "0x1",
1074         "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
1075         "MSRIndex": "0x1a6,0x1a7",
1076         "SampleAfterValue": "100003",
1077         "BriefDescription": "PF_L2_DATA_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
1078         "Offcore": "1",
1079         "CounterHTOff": "0,1,2,3"
1080     },
1081     {
1082         "EventCode": "0xB7, 0xBB",
1083         "MSRValue": "0x00bc000010 ",
1084         "Counter": "0,1,2,3",
1085         "UMask": "0x1",
1086         "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE",
1087         "MSRIndex": "0x1a6,0x1a7",
1088         "SampleAfterValue": "100003",
1089         "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the L3 with no details on snoop-related information.",
1090         "Offcore": "1",
1091         "CounterHTOff": "0,1,2,3"
1092     },
1093     {
1094         "EventCode": "0xB7, 0xBB",
1095         "MSRValue": "0x013c000010 ",
1096         "Counter": "0,1,2,3",
1097         "UMask": "0x1",
1098         "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.SNOOP_NOT_NEEDED",
1099         "MSRIndex": "0x1a6,0x1a7",
1100         "SampleAfterValue": "100003",
1101         "BriefDescription": "PF_L2_DATA_RD & L3_MISS & SNOOP_NOT_NEEDED",
1102         "Offcore": "1",
1103         "CounterHTOff": "0,1,2,3"
1104     },
1105     {
1106         "EventCode": "0xB7, 0xBB",
1107         "MSRValue": "0x023c000010 ",
1108         "Counter": "0,1,2,3",
1109         "UMask": "0x1",
1110         "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS",
1111         "MSRIndex": "0x1a6,0x1a7",
1112         "SampleAfterValue": "100003",
1113         "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the L3 with a snoop miss response.",
1114         "Offcore": "1",
1115         "CounterHTOff": "0,1,2,3"
1116     },
1117     {
1118         "EventCode": "0xB7, 0xBB",
1119         "MSRValue": "0x043c000010 ",
1120         "Counter": "0,1,2,3",
1121         "UMask": "0x1",
1122         "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.SNOOP_HIT_NO_FWD",
1123         "MSRIndex": "0x1a6,0x1a7",
1124         "SampleAfterValue": "100003",
1125         "BriefDescription": "PF_L2_DATA_RD & L3_MISS & SNOOP_HIT_NO_FWD",
1126         "Offcore": "1",
1127         "CounterHTOff": "0,1,2,3"
1128     },
1129     {
1130         "EventCode": "0xB7, 0xBB",
1131         "MSRValue": "0x2000020020 ",
1132         "Counter": "0,1,2,3",
1133         "UMask": "0x1",
1134         "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.SUPPLIER_NONE.SNOOP_NON_DRAM",
1135         "MSRIndex": "0x1a6,0x1a7",
1136         "SampleAfterValue": "100003",
1137         "BriefDescription": "PF_L2_RFO & SUPPLIER_NONE & SNOOP_NON_DRAM",
1138         "Offcore": "1",
1139         "CounterHTOff": "0,1,2,3"
1140     },
1141     {
1142         "EventCode": "0xB7, 0xBB",
1143         "MSRValue": "0x20003c0020 ",
1144         "Counter": "0,1,2,3",
1145         "UMask": "0x1",
1146         "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT.SNOOP_NON_DRAM",
1147         "MSRIndex": "0x1a6,0x1a7",
1148         "SampleAfterValue": "100003",
1149         "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs that hit in the L3 and the target was non-DRAM system address.",
1150         "Offcore": "1",
1151         "CounterHTOff": "0,1,2,3"
1152     },
1153     {
1154         "EventCode": "0xB7, 0xBB",
1155         "MSRValue": "0x0084000020 ",
1156         "Counter": "0,1,2,3",
1157         "UMask": "0x1",
1158         "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
1159         "MSRIndex": "0x1a6,0x1a7",
1160         "SampleAfterValue": "100003",
1161         "BriefDescription": "PF_L2_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
1162         "Offcore": "1",
1163         "CounterHTOff": "0,1,2,3"
1164     },
1165     {
1166         "EventCode": "0xB7, 0xBB",
1167         "MSRValue": "0x0104000020 ",
1168         "Counter": "0,1,2,3",
1169         "UMask": "0x1",
1170         "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
1171         "MSRIndex": "0x1a6,0x1a7",
1172         "SampleAfterValue": "100003",
1173         "BriefDescription": "PF_L2_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
1174         "Offcore": "1",
1175         "CounterHTOff": "0,1,2,3"
1176     },
1177     {
1178         "EventCode": "0xB7, 0xBB",
1179         "MSRValue": "0x0204000020 ",
1180         "Counter": "0,1,2,3",
1181         "UMask": "0x1",
1182         "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
1183         "MSRIndex": "0x1a6,0x1a7",
1184         "SampleAfterValue": "100003",
1185         "BriefDescription": "PF_L2_RFO & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
1186         "Offcore": "1",
1187         "CounterHTOff": "0,1,2,3"
1188     },
1189     {
1190         "EventCode": "0xB7, 0xBB",
1191         "MSRValue": "0x0404000020 ",
1192         "Counter": "0,1,2,3",
1193         "UMask": "0x1",
1194         "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
1195         "MSRIndex": "0x1a6,0x1a7",
1196         "SampleAfterValue": "100003",
1197         "BriefDescription": "PF_L2_RFO & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
1198         "Offcore": "1",
1199         "CounterHTOff": "0,1,2,3"
1200     },
1201     {
1202         "EventCode": "0xB7, 0xBB",
1203         "MSRValue": "0x1004000020 ",
1204         "Counter": "0,1,2,3",
1205         "UMask": "0x1",
1206         "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
1207         "MSRIndex": "0x1a6,0x1a7",
1208         "SampleAfterValue": "100003",
1209         "BriefDescription": "PF_L2_RFO & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
1210         "Offcore": "1",
1211         "CounterHTOff": "0,1,2,3"
1212     },
1213     {
1214         "EventCode": "0xB7, 0xBB",
1215         "MSRValue": "0x2004000020 ",
1216         "Counter": "0,1,2,3",
1217         "UMask": "0x1",
1218         "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
1219         "MSRIndex": "0x1a6,0x1a7",
1220         "SampleAfterValue": "100003",
1221         "BriefDescription": "PF_L2_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
1222         "Offcore": "1",
1223         "CounterHTOff": "0,1,2,3"
1224     },
1225     {
1226         "EventCode": "0xB7, 0xBB",
1227         "MSRValue": "0x3f84000020 ",
1228         "Counter": "0,1,2,3",
1229         "UMask": "0x1",
1230         "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
1231         "MSRIndex": "0x1a6,0x1a7",
1232         "SampleAfterValue": "100003",
1233         "BriefDescription": "PF_L2_RFO & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
1234         "Offcore": "1",
1235         "CounterHTOff": "0,1,2,3"
1236     },
1237     {
1238         "EventCode": "0xB7, 0xBB",
1239         "MSRValue": "0x00bc000020 ",
1240         "Counter": "0,1,2,3",
1241         "UMask": "0x1",
1242         "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.SNOOP_NONE",
1243         "MSRIndex": "0x1a6,0x1a7",
1244         "SampleAfterValue": "100003",
1245         "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs that miss the L3 with no details on snoop-related information.",
1246         "Offcore": "1",
1247         "CounterHTOff": "0,1,2,3"
1248     },
1249     {
1250         "EventCode": "0xB7, 0xBB",
1251         "MSRValue": "0x013c000020 ",
1252         "Counter": "0,1,2,3",
1253         "UMask": "0x1",
1254         "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.SNOOP_NOT_NEEDED",
1255         "MSRIndex": "0x1a6,0x1a7",
1256         "SampleAfterValue": "100003",
1257         "BriefDescription": "PF_L2_RFO & L3_MISS & SNOOP_NOT_NEEDED",
1258         "Offcore": "1",
1259         "CounterHTOff": "0,1,2,3"
1260     },
1261     {
1262         "EventCode": "0xB7, 0xBB",
1263         "MSRValue": "0x023c000020 ",
1264         "Counter": "0,1,2,3",
1265         "UMask": "0x1",
1266         "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.SNOOP_MISS",
1267         "MSRIndex": "0x1a6,0x1a7",
1268         "SampleAfterValue": "100003",
1269         "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs that miss the L3 with a snoop miss response.",
1270         "Offcore": "1",
1271         "CounterHTOff": "0,1,2,3"
1272     },
1273     {
1274         "EventCode": "0xB7, 0xBB",
1275         "MSRValue": "0x043c000020 ",
1276         "Counter": "0,1,2,3",
1277         "UMask": "0x1",
1278         "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.SNOOP_HIT_NO_FWD",
1279         "MSRIndex": "0x1a6,0x1a7",
1280         "SampleAfterValue": "100003",
1281         "BriefDescription": "PF_L2_RFO & L3_MISS & SNOOP_HIT_NO_FWD",
1282         "Offcore": "1",
1283         "CounterHTOff": "0,1,2,3"
1284     },
1285     {
1286         "EventCode": "0xB7, 0xBB",
1287         "MSRValue": "0x2000020040 ",
1288         "Counter": "0,1,2,3",
1289         "UMask": "0x1",
1290         "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.SUPPLIER_NONE.SNOOP_NON_DRAM",
1291         "MSRIndex": "0x1a6,0x1a7",
1292         "SampleAfterValue": "100003",
1293         "BriefDescription": "PF_L2_CODE_RD & SUPPLIER_NONE & SNOOP_NON_DRAM",
1294         "Offcore": "1",
1295         "CounterHTOff": "0,1,2,3"
1296     },
1297     {
1298         "EventCode": "0xB7, 0xBB",
1299         "MSRValue": "0x20003c0040 ",
1300         "Counter": "0,1,2,3",
1301         "UMask": "0x1",
1302         "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L3_HIT.SNOOP_NON_DRAM",
1303         "MSRIndex": "0x1a6,0x1a7",
1304         "SampleAfterValue": "100003",
1305         "BriefDescription": "Counts all prefetch (that bring data to LLC only) code reads that hit in the L3 and the target was non-DRAM system address.",
1306         "Offcore": "1",
1307         "CounterHTOff": "0,1,2,3"
1308     },
1309     {
1310         "EventCode": "0xB7, 0xBB",
1311         "MSRValue": "0x0084000040 ",
1312         "Counter": "0,1,2,3",
1313         "UMask": "0x1",
1314         "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
1315         "MSRIndex": "0x1a6,0x1a7",
1316         "SampleAfterValue": "100003",
1317         "BriefDescription": "PF_L2_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
1318         "Offcore": "1",
1319         "CounterHTOff": "0,1,2,3"
1320     },
1321     {
1322         "EventCode": "0xB7, 0xBB",
1323         "MSRValue": "0x0104000040 ",
1324         "Counter": "0,1,2,3",
1325         "UMask": "0x1",
1326         "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
1327         "MSRIndex": "0x1a6,0x1a7",
1328         "SampleAfterValue": "100003",
1329         "BriefDescription": "PF_L2_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
1330         "Offcore": "1",
1331         "CounterHTOff": "0,1,2,3"
1332     },
1333     {
1334         "EventCode": "0xB7, 0xBB",
1335         "MSRValue": "0x0204000040 ",
1336         "Counter": "0,1,2,3",
1337         "UMask": "0x1",
1338         "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
1339         "MSRIndex": "0x1a6,0x1a7",
1340         "SampleAfterValue": "100003",
1341         "BriefDescription": "PF_L2_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
1342         "Offcore": "1",
1343         "CounterHTOff": "0,1,2,3"
1344     },
1345     {
1346         "EventCode": "0xB7, 0xBB",
1347         "MSRValue": "0x0404000040 ",
1348         "Counter": "0,1,2,3",
1349         "UMask": "0x1",
1350         "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
1351         "MSRIndex": "0x1a6,0x1a7",
1352         "SampleAfterValue": "100003",
1353         "BriefDescription": "PF_L2_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
1354         "Offcore": "1",
1355         "CounterHTOff": "0,1,2,3"
1356     },
1357     {
1358         "EventCode": "0xB7, 0xBB",
1359         "MSRValue": "0x1004000040 ",
1360         "Counter": "0,1,2,3",
1361         "UMask": "0x1",
1362         "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
1363         "MSRIndex": "0x1a6,0x1a7",
1364         "SampleAfterValue": "100003",
1365         "BriefDescription": "PF_L2_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
1366         "Offcore": "1",
1367         "CounterHTOff": "0,1,2,3"
1368     },
1369     {
1370         "EventCode": "0xB7, 0xBB",
1371         "MSRValue": "0x2004000040 ",
1372         "Counter": "0,1,2,3",
1373         "UMask": "0x1",
1374         "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
1375         "MSRIndex": "0x1a6,0x1a7",
1376         "SampleAfterValue": "100003",
1377         "BriefDescription": "PF_L2_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
1378         "Offcore": "1",
1379         "CounterHTOff": "0,1,2,3"
1380     },
1381     {
1382         "EventCode": "0xB7, 0xBB",
1383         "MSRValue": "0x3f84000040 ",
1384         "Counter": "0,1,2,3",
1385         "UMask": "0x1",
1386         "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
1387         "MSRIndex": "0x1a6,0x1a7",
1388         "SampleAfterValue": "100003",
1389         "BriefDescription": "PF_L2_CODE_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
1390         "Offcore": "1",
1391         "CounterHTOff": "0,1,2,3"
1392     },
1393     {
1394         "EventCode": "0xB7, 0xBB",
1395         "MSRValue": "0x00bc000040 ",
1396         "Counter": "0,1,2,3",
1397         "UMask": "0x1",
1398         "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L3_MISS.SNOOP_NONE",
1399         "MSRIndex": "0x1a6,0x1a7",
1400         "SampleAfterValue": "100003",
1401         "BriefDescription": "Counts all prefetch (that bring data to LLC only) code reads that miss the L3 with no details on snoop-related information.",
1402         "Offcore": "1",
1403         "CounterHTOff": "0,1,2,3"
1404     },
1405     {
1406         "EventCode": "0xB7, 0xBB",
1407         "MSRValue": "0x013c000040 ",
1408         "Counter": "0,1,2,3",
1409         "UMask": "0x1",
1410         "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L3_MISS.SNOOP_NOT_NEEDED",
1411         "MSRIndex": "0x1a6,0x1a7",
1412         "SampleAfterValue": "100003",
1413         "BriefDescription": "PF_L2_CODE_RD & L3_MISS & SNOOP_NOT_NEEDED",
1414         "Offcore": "1",
1415         "CounterHTOff": "0,1,2,3"
1416     },
1417     {
1418         "EventCode": "0xB7, 0xBB",
1419         "MSRValue": "0x023c000040 ",
1420         "Counter": "0,1,2,3",
1421         "UMask": "0x1",
1422         "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L3_MISS.SNOOP_MISS",
1423         "MSRIndex": "0x1a6,0x1a7",
1424         "SampleAfterValue": "100003",
1425         "BriefDescription": "Counts all prefetch (that bring data to LLC only) code reads that miss the L3 with a snoop miss response.",
1426         "Offcore": "1",
1427         "CounterHTOff": "0,1,2,3"
1428     },
1429     {
1430         "EventCode": "0xB7, 0xBB",
1431         "MSRValue": "0x043c000040 ",
1432         "Counter": "0,1,2,3",
1433         "UMask": "0x1",
1434         "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.L3_MISS.SNOOP_HIT_NO_FWD",
1435         "MSRIndex": "0x1a6,0x1a7",
1436         "SampleAfterValue": "100003",
1437         "BriefDescription": "PF_L2_CODE_RD & L3_MISS & SNOOP_HIT_NO_FWD",
1438         "Offcore": "1",
1439         "CounterHTOff": "0,1,2,3"
1440     },
1441     {
1442         "EventCode": "0xB7, 0xBB",
1443         "MSRValue": "0x2000020080 ",
1444         "Counter": "0,1,2,3",
1445         "UMask": "0x1",
1446         "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.SUPPLIER_NONE.SNOOP_NON_DRAM",
1447         "MSRIndex": "0x1a6,0x1a7",
1448         "SampleAfterValue": "100003",
1449         "BriefDescription": "PF_L3_DATA_RD & SUPPLIER_NONE & SNOOP_NON_DRAM",
1450         "Offcore": "1",
1451         "CounterHTOff": "0,1,2,3"
1452     },
1453     {
1454         "EventCode": "0xB7, 0xBB",
1455         "MSRValue": "0x20003c0080 ",
1456         "Counter": "0,1,2,3",
1457         "UMask": "0x1",
1458         "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT.SNOOP_NON_DRAM",
1459         "MSRIndex": "0x1a6,0x1a7",
1460         "SampleAfterValue": "100003",
1461         "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads that hit in the L3 and the target was non-DRAM system address.",
1462         "Offcore": "1",
1463         "CounterHTOff": "0,1,2,3"
1464     },
1465     {
1466         "EventCode": "0xB7, 0xBB",
1467         "MSRValue": "0x0084000080 ",
1468         "Counter": "0,1,2,3",
1469         "UMask": "0x1",
1470         "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
1471         "MSRIndex": "0x1a6,0x1a7",
1472         "SampleAfterValue": "100003",
1473         "BriefDescription": "PF_L3_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
1474         "Offcore": "1",
1475         "CounterHTOff": "0,1,2,3"
1476     },
1477     {
1478         "EventCode": "0xB7, 0xBB",
1479         "MSRValue": "0x0104000080 ",
1480         "Counter": "0,1,2,3",
1481         "UMask": "0x1",
1482         "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
1483         "MSRIndex": "0x1a6,0x1a7",
1484         "SampleAfterValue": "100003",
1485         "BriefDescription": "PF_L3_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
1486         "Offcore": "1",
1487         "CounterHTOff": "0,1,2,3"
1488     },
1489     {
1490         "EventCode": "0xB7, 0xBB",
1491         "MSRValue": "0x0204000080 ",
1492         "Counter": "0,1,2,3",
1493         "UMask": "0x1",
1494         "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
1495         "MSRIndex": "0x1a6,0x1a7",
1496         "SampleAfterValue": "100003",
1497         "BriefDescription": "PF_L3_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
1498         "Offcore": "1",
1499         "CounterHTOff": "0,1,2,3"
1500     },
1501     {
1502         "EventCode": "0xB7, 0xBB",
1503         "MSRValue": "0x0404000080 ",
1504         "Counter": "0,1,2,3",
1505         "UMask": "0x1",
1506         "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
1507         "MSRIndex": "0x1a6,0x1a7",
1508         "SampleAfterValue": "100003",
1509         "BriefDescription": "PF_L3_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
1510         "Offcore": "1",
1511         "CounterHTOff": "0,1,2,3"
1512     },
1513     {
1514         "EventCode": "0xB7, 0xBB",
1515         "MSRValue": "0x1004000080 ",
1516         "Counter": "0,1,2,3",
1517         "UMask": "0x1",
1518         "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
1519         "MSRIndex": "0x1a6,0x1a7",
1520         "SampleAfterValue": "100003",
1521         "BriefDescription": "PF_L3_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
1522         "Offcore": "1",
1523         "CounterHTOff": "0,1,2,3"
1524     },
1525     {
1526         "EventCode": "0xB7, 0xBB",
1527         "MSRValue": "0x2004000080 ",
1528         "Counter": "0,1,2,3",
1529         "UMask": "0x1",
1530         "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
1531         "MSRIndex": "0x1a6,0x1a7",
1532         "SampleAfterValue": "100003",
1533         "BriefDescription": "PF_L3_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
1534         "Offcore": "1",
1535         "CounterHTOff": "0,1,2,3"
1536     },
1537     {
1538         "EventCode": "0xB7, 0xBB",
1539         "MSRValue": "0x3f84000080 ",
1540         "Counter": "0,1,2,3",
1541         "UMask": "0x1",
1542         "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
1543         "MSRIndex": "0x1a6,0x1a7",
1544         "SampleAfterValue": "100003",
1545         "BriefDescription": "PF_L3_DATA_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
1546         "Offcore": "1",
1547         "CounterHTOff": "0,1,2,3"
1548     },
1549     {
1550         "EventCode": "0xB7, 0xBB",
1551         "MSRValue": "0x00bc000080 ",
1552         "Counter": "0,1,2,3",
1553         "UMask": "0x1",
1554         "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE",
1555         "MSRIndex": "0x1a6,0x1a7",
1556         "SampleAfterValue": "100003",
1557         "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads that miss the L3 with no details on snoop-related information.",
1558         "Offcore": "1",
1559         "CounterHTOff": "0,1,2,3"
1560     },
1561     {
1562         "EventCode": "0xB7, 0xBB",
1563         "MSRValue": "0x013c000080 ",
1564         "Counter": "0,1,2,3",
1565         "UMask": "0x1",
1566         "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.SNOOP_NOT_NEEDED",
1567         "MSRIndex": "0x1a6,0x1a7",
1568         "SampleAfterValue": "100003",
1569         "BriefDescription": "PF_L3_DATA_RD & L3_MISS & SNOOP_NOT_NEEDED",
1570         "Offcore": "1",
1571         "CounterHTOff": "0,1,2,3"
1572     },
1573     {
1574         "EventCode": "0xB7, 0xBB",
1575         "MSRValue": "0x023c000080 ",
1576         "Counter": "0,1,2,3",
1577         "UMask": "0x1",
1578         "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS",
1579         "MSRIndex": "0x1a6,0x1a7",
1580         "SampleAfterValue": "100003",
1581         "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads that miss the L3 with a snoop miss response.",
1582         "Offcore": "1",
1583         "CounterHTOff": "0,1,2,3"
1584     },
1585     {
1586         "EventCode": "0xB7, 0xBB",
1587         "MSRValue": "0x043c000080 ",
1588         "Counter": "0,1,2,3",
1589         "UMask": "0x1",
1590         "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.SNOOP_HIT_NO_FWD",
1591         "MSRIndex": "0x1a6,0x1a7",
1592         "SampleAfterValue": "100003",
1593         "BriefDescription": "PF_L3_DATA_RD & L3_MISS & SNOOP_HIT_NO_FWD",
1594         "Offcore": "1",
1595         "CounterHTOff": "0,1,2,3"
1596     },
1597     {
1598         "EventCode": "0xB7, 0xBB",
1599         "MSRValue": "0x2000020100 ",
1600         "Counter": "0,1,2,3",
1601         "UMask": "0x1",
1602         "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.SUPPLIER_NONE.SNOOP_NON_DRAM",
1603         "MSRIndex": "0x1a6,0x1a7",
1604         "SampleAfterValue": "100003",
1605         "BriefDescription": "PF_L3_RFO & SUPPLIER_NONE & SNOOP_NON_DRAM",
1606         "Offcore": "1",
1607         "CounterHTOff": "0,1,2,3"
1608     },
1609     {
1610         "EventCode": "0xB7, 0xBB",
1611         "MSRValue": "0x20003c0100 ",
1612         "Counter": "0,1,2,3",
1613         "UMask": "0x1",
1614         "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT.SNOOP_NON_DRAM",
1615         "MSRIndex": "0x1a6,0x1a7",
1616         "SampleAfterValue": "100003",
1617         "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs that hit in the L3 and the target was non-DRAM system address.",
1618         "Offcore": "1",
1619         "CounterHTOff": "0,1,2,3"
1620     },
1621     {
1622         "EventCode": "0xB7, 0xBB",
1623         "MSRValue": "0x0084000100 ",
1624         "Counter": "0,1,2,3",
1625         "UMask": "0x1",
1626         "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
1627         "MSRIndex": "0x1a6,0x1a7",
1628         "SampleAfterValue": "100003",
1629         "BriefDescription": "PF_L3_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
1630         "Offcore": "1",
1631         "CounterHTOff": "0,1,2,3"
1632     },
1633     {
1634         "EventCode": "0xB7, 0xBB",
1635         "MSRValue": "0x0104000100 ",
1636         "Counter": "0,1,2,3",
1637         "UMask": "0x1",
1638         "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
1639         "MSRIndex": "0x1a6,0x1a7",
1640         "SampleAfterValue": "100003",
1641         "BriefDescription": "PF_L3_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
1642         "Offcore": "1",
1643         "CounterHTOff": "0,1,2,3"
1644     },
1645     {
1646         "EventCode": "0xB7, 0xBB",
1647         "MSRValue": "0x0204000100 ",
1648         "Counter": "0,1,2,3",
1649         "UMask": "0x1",
1650         "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
1651         "MSRIndex": "0x1a6,0x1a7",
1652         "SampleAfterValue": "100003",
1653         "BriefDescription": "PF_L3_RFO & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
1654         "Offcore": "1",
1655         "CounterHTOff": "0,1,2,3"
1656     },
1657     {
1658         "EventCode": "0xB7, 0xBB",
1659         "MSRValue": "0x0404000100 ",
1660         "Counter": "0,1,2,3",
1661         "UMask": "0x1",
1662         "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
1663         "MSRIndex": "0x1a6,0x1a7",
1664         "SampleAfterValue": "100003",
1665         "BriefDescription": "PF_L3_RFO & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
1666         "Offcore": "1",
1667         "CounterHTOff": "0,1,2,3"
1668     },
1669     {
1670         "EventCode": "0xB7, 0xBB",
1671         "MSRValue": "0x1004000100 ",
1672         "Counter": "0,1,2,3",
1673         "UMask": "0x1",
1674         "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
1675         "MSRIndex": "0x1a6,0x1a7",
1676         "SampleAfterValue": "100003",
1677         "BriefDescription": "PF_L3_RFO & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
1678         "Offcore": "1",
1679         "CounterHTOff": "0,1,2,3"
1680     },
1681     {
1682         "EventCode": "0xB7, 0xBB",
1683         "MSRValue": "0x2004000100 ",
1684         "Counter": "0,1,2,3",
1685         "UMask": "0x1",
1686         "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
1687         "MSRIndex": "0x1a6,0x1a7",
1688         "SampleAfterValue": "100003",
1689         "BriefDescription": "PF_L3_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
1690         "Offcore": "1",
1691         "CounterHTOff": "0,1,2,3"
1692     },
1693     {
1694         "EventCode": "0xB7, 0xBB",
1695         "MSRValue": "0x3f84000100 ",
1696         "Counter": "0,1,2,3",
1697         "UMask": "0x1",
1698         "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
1699         "MSRIndex": "0x1a6,0x1a7",
1700         "SampleAfterValue": "100003",
1701         "BriefDescription": "PF_L3_RFO & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
1702         "Offcore": "1",
1703         "CounterHTOff": "0,1,2,3"
1704     },
1705     {
1706         "EventCode": "0xB7, 0xBB",
1707         "MSRValue": "0x00bc000100 ",
1708         "Counter": "0,1,2,3",
1709         "UMask": "0x1",
1710         "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.SNOOP_NONE",
1711         "MSRIndex": "0x1a6,0x1a7",
1712         "SampleAfterValue": "100003",
1713         "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs that miss the L3 with no details on snoop-related information.",
1714         "Offcore": "1",
1715         "CounterHTOff": "0,1,2,3"
1716     },
1717     {
1718         "EventCode": "0xB7, 0xBB",
1719         "MSRValue": "0x013c000100 ",
1720         "Counter": "0,1,2,3",
1721         "UMask": "0x1",
1722         "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.SNOOP_NOT_NEEDED",
1723         "MSRIndex": "0x1a6,0x1a7",
1724         "SampleAfterValue": "100003",
1725         "BriefDescription": "PF_L3_RFO & L3_MISS & SNOOP_NOT_NEEDED",
1726         "Offcore": "1",
1727         "CounterHTOff": "0,1,2,3"
1728     },
1729     {
1730         "EventCode": "0xB7, 0xBB",
1731         "MSRValue": "0x023c000100 ",
1732         "Counter": "0,1,2,3",
1733         "UMask": "0x1",
1734         "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.SNOOP_MISS",
1735         "MSRIndex": "0x1a6,0x1a7",
1736         "SampleAfterValue": "100003",
1737         "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs that miss the L3 with a snoop miss response.",
1738         "Offcore": "1",
1739         "CounterHTOff": "0,1,2,3"
1740     },
1741     {
1742         "EventCode": "0xB7, 0xBB",
1743         "MSRValue": "0x043c000100 ",
1744         "Counter": "0,1,2,3",
1745         "UMask": "0x1",
1746         "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.SNOOP_HIT_NO_FWD",
1747         "MSRIndex": "0x1a6,0x1a7",
1748         "SampleAfterValue": "100003",
1749         "BriefDescription": "PF_L3_RFO & L3_MISS & SNOOP_HIT_NO_FWD",
1750         "Offcore": "1",
1751         "CounterHTOff": "0,1,2,3"
1752     },
1753     {
1754         "EventCode": "0xB7, 0xBB",
1755         "MSRValue": "0x2000020200 ",
1756         "Counter": "0,1,2,3",
1757         "UMask": "0x1",
1758         "EventName": "OFFCORE_RESPONSE.PF_L3_CODE_RD.SUPPLIER_NONE.SNOOP_NON_DRAM",
1759         "MSRIndex": "0x1a6,0x1a7",
1760         "SampleAfterValue": "100003",
1761         "BriefDescription": "PF_L3_CODE_RD & SUPPLIER_NONE & SNOOP_NON_DRAM",
1762         "Offcore": "1",
1763         "CounterHTOff": "0,1,2,3"
1764     },
1765     {
1766         "EventCode": "0xB7, 0xBB",
1767         "MSRValue": "0x20003c0200 ",
1768         "Counter": "0,1,2,3",
1769         "UMask": "0x1",
1770         "EventName": "OFFCORE_RESPONSE.PF_L3_CODE_RD.L3_HIT.SNOOP_NON_DRAM",
1771         "MSRIndex": "0x1a6,0x1a7",
1772         "SampleAfterValue": "100003",
1773         "BriefDescription": "Counts prefetch (that bring data to LLC only) code reads that hit in the L3 and the target was non-DRAM system address.",
1774         "Offcore": "1",
1775         "CounterHTOff": "0,1,2,3"
1776     },
1777     {
1778         "EventCode": "0xB7, 0xBB",
1779         "MSRValue": "0x0084000200 ",
1780         "Counter": "0,1,2,3",
1781         "UMask": "0x1",
1782         "EventName": "OFFCORE_RESPONSE.PF_L3_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
1783         "MSRIndex": "0x1a6,0x1a7",
1784         "SampleAfterValue": "100003",
1785         "BriefDescription": "PF_L3_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
1786         "Offcore": "1",
1787         "CounterHTOff": "0,1,2,3"
1788     },
1789     {
1790         "EventCode": "0xB7, 0xBB",
1791         "MSRValue": "0x0104000200 ",
1792         "Counter": "0,1,2,3",
1793         "UMask": "0x1",
1794         "EventName": "OFFCORE_RESPONSE.PF_L3_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
1795         "MSRIndex": "0x1a6,0x1a7",
1796         "SampleAfterValue": "100003",
1797         "BriefDescription": "PF_L3_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
1798         "Offcore": "1",
1799         "CounterHTOff": "0,1,2,3"
1800     },
1801     {
1802         "EventCode": "0xB7, 0xBB",
1803         "MSRValue": "0x0204000200 ",
1804         "Counter": "0,1,2,3",
1805         "UMask": "0x1",
1806         "EventName": "OFFCORE_RESPONSE.PF_L3_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
1807         "MSRIndex": "0x1a6,0x1a7",
1808         "SampleAfterValue": "100003",
1809         "BriefDescription": "PF_L3_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
1810         "Offcore": "1",
1811         "CounterHTOff": "0,1,2,3"
1812     },
1813     {
1814         "EventCode": "0xB7, 0xBB",
1815         "MSRValue": "0x0404000200 ",
1816         "Counter": "0,1,2,3",
1817         "UMask": "0x1",
1818         "EventName": "OFFCORE_RESPONSE.PF_L3_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
1819         "MSRIndex": "0x1a6,0x1a7",
1820         "SampleAfterValue": "100003",
1821         "BriefDescription": "PF_L3_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
1822         "Offcore": "1",
1823         "CounterHTOff": "0,1,2,3"
1824     },
1825     {
1826         "EventCode": "0xB7, 0xBB",
1827         "MSRValue": "0x1004000200 ",
1828         "Counter": "0,1,2,3",
1829         "UMask": "0x1",
1830         "EventName": "OFFCORE_RESPONSE.PF_L3_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
1831         "MSRIndex": "0x1a6,0x1a7",
1832         "SampleAfterValue": "100003",
1833         "BriefDescription": "PF_L3_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
1834         "Offcore": "1",
1835         "CounterHTOff": "0,1,2,3"
1836     },
1837     {
1838         "EventCode": "0xB7, 0xBB",
1839         "MSRValue": "0x2004000200 ",
1840         "Counter": "0,1,2,3",
1841         "UMask": "0x1",
1842         "EventName": "OFFCORE_RESPONSE.PF_L3_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
1843         "MSRIndex": "0x1a6,0x1a7",
1844         "SampleAfterValue": "100003",
1845         "BriefDescription": "PF_L3_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
1846         "Offcore": "1",
1847         "CounterHTOff": "0,1,2,3"
1848     },
1849     {
1850         "EventCode": "0xB7, 0xBB",
1851         "MSRValue": "0x3f84000200 ",
1852         "Counter": "0,1,2,3",
1853         "UMask": "0x1",
1854         "EventName": "OFFCORE_RESPONSE.PF_L3_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
1855         "MSRIndex": "0x1a6,0x1a7",
1856         "SampleAfterValue": "100003",
1857         "BriefDescription": "PF_L3_CODE_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
1858         "Offcore": "1",
1859         "CounterHTOff": "0,1,2,3"
1860     },
1861     {
1862         "EventCode": "0xB7, 0xBB",
1863         "MSRValue": "0x00bc000200 ",
1864         "Counter": "0,1,2,3",
1865         "UMask": "0x1",
1866         "EventName": "OFFCORE_RESPONSE.PF_L3_CODE_RD.L3_MISS.SNOOP_NONE",
1867         "MSRIndex": "0x1a6,0x1a7",
1868         "SampleAfterValue": "100003",
1869         "BriefDescription": "Counts prefetch (that bring data to LLC only) code reads that miss the L3 with no details on snoop-related information.",
1870         "Offcore": "1",
1871         "CounterHTOff": "0,1,2,3"
1872     },
1873     {
1874         "EventCode": "0xB7, 0xBB",
1875         "MSRValue": "0x013c000200 ",
1876         "Counter": "0,1,2,3",
1877         "UMask": "0x1",
1878         "EventName": "OFFCORE_RESPONSE.PF_L3_CODE_RD.L3_MISS.SNOOP_NOT_NEEDED",
1879         "MSRIndex": "0x1a6,0x1a7",
1880         "SampleAfterValue": "100003",
1881         "BriefDescription": "PF_L3_CODE_RD & L3_MISS & SNOOP_NOT_NEEDED",
1882         "Offcore": "1",
1883         "CounterHTOff": "0,1,2,3"
1884     },
1885     {
1886         "EventCode": "0xB7, 0xBB",
1887         "MSRValue": "0x023c000200 ",
1888         "Counter": "0,1,2,3",
1889         "UMask": "0x1",
1890         "EventName": "OFFCORE_RESPONSE.PF_L3_CODE_RD.L3_MISS.SNOOP_MISS",
1891         "MSRIndex": "0x1a6,0x1a7",
1892         "SampleAfterValue": "100003",
1893         "BriefDescription": "Counts prefetch (that bring data to LLC only) code reads that miss the L3 with a snoop miss response.",
1894         "Offcore": "1",
1895         "CounterHTOff": "0,1,2,3"
1896     },
1897     {
1898         "EventCode": "0xB7, 0xBB",
1899         "MSRValue": "0x043c000200 ",
1900         "Counter": "0,1,2,3",
1901         "UMask": "0x1",
1902         "EventName": "OFFCORE_RESPONSE.PF_L3_CODE_RD.L3_MISS.SNOOP_HIT_NO_FWD",
1903         "MSRIndex": "0x1a6,0x1a7",
1904         "SampleAfterValue": "100003",
1905         "BriefDescription": "PF_L3_CODE_RD & L3_MISS & SNOOP_HIT_NO_FWD",
1906         "Offcore": "1",
1907         "CounterHTOff": "0,1,2,3"
1908     },
1909     {
1910         "EventCode": "0xB7, 0xBB",
1911         "MSRValue": "0x2000028000 ",
1912         "Counter": "0,1,2,3",
1913         "UMask": "0x1",
1914         "EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_NON_DRAM",
1915         "MSRIndex": "0x1a6,0x1a7",
1916         "SampleAfterValue": "100003",
1917         "BriefDescription": "OTHER & SUPPLIER_NONE & SNOOP_NON_DRAM",
1918         "Offcore": "1",
1919         "CounterHTOff": "0,1,2,3"
1920     },
1921     {
1922         "EventCode": "0xB7, 0xBB",
1923         "MSRValue": "0x20003c8000 ",
1924         "Counter": "0,1,2,3",
1925         "UMask": "0x1",
1926         "EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_NON_DRAM",
1927         "MSRIndex": "0x1a6,0x1a7",
1928         "SampleAfterValue": "100003",
1929         "BriefDescription": "Counts any other requests that hit in the L3 and the target was non-DRAM system address.",
1930         "Offcore": "1",
1931         "CounterHTOff": "0,1,2,3"
1932     },
1933     {
1934         "EventCode": "0xB7, 0xBB",
1935         "MSRValue": "0x0084008000 ",
1936         "Counter": "0,1,2,3",
1937         "UMask": "0x1",
1938         "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
1939         "MSRIndex": "0x1a6,0x1a7",
1940         "SampleAfterValue": "100003",
1941         "BriefDescription": "OTHER & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
1942         "Offcore": "1",
1943         "CounterHTOff": "0,1,2,3"
1944     },
1945     {
1946         "EventCode": "0xB7, 0xBB",
1947         "MSRValue": "0x0104008000 ",
1948         "Counter": "0,1,2,3",
1949         "UMask": "0x1",
1950         "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
1951         "MSRIndex": "0x1a6,0x1a7",
1952         "SampleAfterValue": "100003",
1953         "BriefDescription": "OTHER & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
1954         "Offcore": "1",
1955         "CounterHTOff": "0,1,2,3"
1956     },
1957     {
1958         "EventCode": "0xB7, 0xBB",
1959         "MSRValue": "0x0204008000 ",
1960         "Counter": "0,1,2,3",
1961         "UMask": "0x1",
1962         "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
1963         "MSRIndex": "0x1a6,0x1a7",
1964         "SampleAfterValue": "100003",
1965         "BriefDescription": "OTHER & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
1966         "Offcore": "1",
1967         "CounterHTOff": "0,1,2,3"
1968     },
1969     {
1970         "EventCode": "0xB7, 0xBB",
1971         "MSRValue": "0x0404008000 ",
1972         "Counter": "0,1,2,3",
1973         "UMask": "0x1",
1974         "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
1975         "MSRIndex": "0x1a6,0x1a7",
1976         "SampleAfterValue": "100003",
1977         "BriefDescription": "OTHER & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
1978         "Offcore": "1",
1979         "CounterHTOff": "0,1,2,3"
1980     },
1981     {
1982         "EventCode": "0xB7, 0xBB",
1983         "MSRValue": "0x1004008000 ",
1984         "Counter": "0,1,2,3",
1985         "UMask": "0x1",
1986         "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
1987         "MSRIndex": "0x1a6,0x1a7",
1988         "SampleAfterValue": "100003",
1989         "BriefDescription": "OTHER & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
1990         "Offcore": "1",
1991         "CounterHTOff": "0,1,2,3"
1992     },
1993     {
1994         "EventCode": "0xB7, 0xBB",
1995         "MSRValue": "0x2004008000 ",
1996         "Counter": "0,1,2,3",
1997         "UMask": "0x1",
1998         "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
1999         "MSRIndex": "0x1a6,0x1a7",
2000         "SampleAfterValue": "100003",
2001         "BriefDescription": "OTHER & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
2002         "Offcore": "1",
2003         "CounterHTOff": "0,1,2,3"
2004     },
2005     {
2006         "EventCode": "0xB7, 0xBB",
2007         "MSRValue": "0x3f84008000 ",
2008         "Counter": "0,1,2,3",
2009         "UMask": "0x1",
2010         "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
2011         "MSRIndex": "0x1a6,0x1a7",
2012         "SampleAfterValue": "100003",
2013         "BriefDescription": "OTHER & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
2014         "Offcore": "1",
2015         "CounterHTOff": "0,1,2,3"
2016     },
2017     {
2018         "EventCode": "0xB7, 0xBB",
2019         "MSRValue": "0x00bc008000 ",
2020         "Counter": "0,1,2,3",
2021         "UMask": "0x1",
2022         "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_NONE",
2023         "MSRIndex": "0x1a6,0x1a7",
2024         "SampleAfterValue": "100003",
2025         "BriefDescription": "Counts any other requests that miss the L3 with no details on snoop-related information.",
2026         "Offcore": "1",
2027         "CounterHTOff": "0,1,2,3"
2028     },
2029     {
2030         "EventCode": "0xB7, 0xBB",
2031         "MSRValue": "0x013c008000 ",
2032         "Counter": "0,1,2,3",
2033         "UMask": "0x1",
2034         "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_NOT_NEEDED",
2035         "MSRIndex": "0x1a6,0x1a7",
2036         "SampleAfterValue": "100003",
2037         "BriefDescription": "OTHER & L3_MISS & SNOOP_NOT_NEEDED",
2038         "Offcore": "1",
2039         "CounterHTOff": "0,1,2,3"
2040     },
2041     {
2042         "EventCode": "0xB7, 0xBB",
2043         "MSRValue": "0x023c008000 ",
2044         "Counter": "0,1,2,3",
2045         "UMask": "0x1",
2046         "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_MISS",
2047         "MSRIndex": "0x1a6,0x1a7",
2048         "SampleAfterValue": "100003",
2049         "BriefDescription": "Counts any other requests that miss the L3 with a snoop miss response.",
2050         "Offcore": "1",
2051         "CounterHTOff": "0,1,2,3"
2052     },
2053     {
2054         "EventCode": "0xB7, 0xBB",
2055         "MSRValue": "0x043c008000 ",
2056         "Counter": "0,1,2,3",
2057         "UMask": "0x1",
2058         "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_HIT_NO_FWD",
2059         "MSRIndex": "0x1a6,0x1a7",
2060         "SampleAfterValue": "100003",
2061         "BriefDescription": "OTHER & L3_MISS & SNOOP_HIT_NO_FWD",
2062         "Offcore": "1",
2063         "CounterHTOff": "0,1,2,3"
2064     },
2065     {
2066         "EventCode": "0xB7, 0xBB",
2067         "MSRValue": "0x2000020090 ",
2068         "Counter": "0,1,2,3",
2069         "UMask": "0x1",
2070         "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_NON_DRAM",
2071         "MSRIndex": "0x1a6,0x1a7",
2072         "SampleAfterValue": "100003",
2073         "BriefDescription": "ALL_PF_DATA_RD & SUPPLIER_NONE & SNOOP_NON_DRAM",
2074         "Offcore": "1",
2075         "CounterHTOff": "0,1,2,3"
2076     },
2077     {
2078         "EventCode": "0xB7, 0xBB",
2079         "MSRValue": "0x20003c0090 ",
2080         "Counter": "0,1,2,3",
2081         "UMask": "0x1",
2082         "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT.SNOOP_NON_DRAM",
2083         "MSRIndex": "0x1a6,0x1a7",
2084         "SampleAfterValue": "100003",
2085         "BriefDescription": "Counts all prefetch data reads that hit in the L3 and the target was non-DRAM system address.",
2086         "Offcore": "1",
2087         "CounterHTOff": "0,1,2,3"
2088     },
2089     {
2090         "EventCode": "0xB7, 0xBB",
2091         "MSRValue": "0x0084000090 ",
2092         "Counter": "0,1,2,3",
2093         "UMask": "0x1",
2094         "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
2095         "MSRIndex": "0x1a6,0x1a7",
2096         "SampleAfterValue": "100003",
2097         "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
2098         "Offcore": "1",
2099         "CounterHTOff": "0,1,2,3"
2100     },
2101     {
2102         "EventCode": "0xB7, 0xBB",
2103         "MSRValue": "0x0104000090 ",
2104         "Counter": "0,1,2,3",
2105         "UMask": "0x1",
2106         "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
2107         "MSRIndex": "0x1a6,0x1a7",
2108         "SampleAfterValue": "100003",
2109         "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
2110         "Offcore": "1",
2111         "CounterHTOff": "0,1,2,3"
2112     },
2113     {
2114         "EventCode": "0xB7, 0xBB",
2115         "MSRValue": "0x0204000090 ",
2116         "Counter": "0,1,2,3",
2117         "UMask": "0x1",
2118         "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
2119         "MSRIndex": "0x1a6,0x1a7",
2120         "SampleAfterValue": "100003",
2121         "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
2122         "Offcore": "1",
2123         "CounterHTOff": "0,1,2,3"
2124     },
2125     {
2126         "EventCode": "0xB7, 0xBB",
2127         "MSRValue": "0x0404000090 ",
2128         "Counter": "0,1,2,3",
2129         "UMask": "0x1",
2130         "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
2131         "MSRIndex": "0x1a6,0x1a7",
2132         "SampleAfterValue": "100003",
2133         "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
2134         "Offcore": "1",
2135         "CounterHTOff": "0,1,2,3"
2136     },
2137     {
2138         "EventCode": "0xB7, 0xBB",
2139         "MSRValue": "0x1004000090 ",
2140         "Counter": "0,1,2,3",
2141         "UMask": "0x1",
2142         "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
2143         "MSRIndex": "0x1a6,0x1a7",
2144         "SampleAfterValue": "100003",
2145         "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
2146         "Offcore": "1",
2147         "CounterHTOff": "0,1,2,3"
2148     },
2149     {
2150         "EventCode": "0xB7, 0xBB",
2151         "MSRValue": "0x2004000090 ",
2152         "Counter": "0,1,2,3",
2153         "UMask": "0x1",
2154         "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
2155         "MSRIndex": "0x1a6,0x1a7",
2156         "SampleAfterValue": "100003",
2157         "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
2158         "Offcore": "1",
2159         "CounterHTOff": "0,1,2,3"
2160     },
2161     {
2162         "EventCode": "0xB7, 0xBB",
2163         "MSRValue": "0x3f84000090 ",
2164         "Counter": "0,1,2,3",
2165         "UMask": "0x1",
2166         "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
2167         "MSRIndex": "0x1a6,0x1a7",
2168         "SampleAfterValue": "100003",
2169         "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
2170         "Offcore": "1",
2171         "CounterHTOff": "0,1,2,3"
2172     },
2173     {
2174         "EventCode": "0xB7, 0xBB",
2175         "MSRValue": "0x00bc000090 ",
2176         "Counter": "0,1,2,3",
2177         "UMask": "0x1",
2178         "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE",
2179         "MSRIndex": "0x1a6,0x1a7",
2180         "SampleAfterValue": "100003",
2181         "BriefDescription": "Counts all prefetch data reads that miss the L3 with no details on snoop-related information.",
2182         "Offcore": "1",
2183         "CounterHTOff": "0,1,2,3"
2184     },
2185     {
2186         "EventCode": "0xB7, 0xBB",
2187         "MSRValue": "0x013c000090 ",
2188         "Counter": "0,1,2,3",
2189         "UMask": "0x1",
2190         "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.SNOOP_NOT_NEEDED",
2191         "MSRIndex": "0x1a6,0x1a7",
2192         "SampleAfterValue": "100003",
2193         "BriefDescription": "ALL_PF_DATA_RD & L3_MISS & SNOOP_NOT_NEEDED",
2194         "Offcore": "1",
2195         "CounterHTOff": "0,1,2,3"
2196     },
2197     {
2198         "EventCode": "0xB7, 0xBB",
2199         "MSRValue": "0x023c000090 ",
2200         "Counter": "0,1,2,3",
2201         "UMask": "0x1",
2202         "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS",
2203         "MSRIndex": "0x1a6,0x1a7",
2204         "SampleAfterValue": "100003",
2205         "BriefDescription": "Counts all prefetch data reads that miss the L3 with a snoop miss response.",
2206         "Offcore": "1",
2207         "CounterHTOff": "0,1,2,3"
2208     },
2209     {
2210         "EventCode": "0xB7, 0xBB",
2211         "MSRValue": "0x043c000090 ",
2212         "Counter": "0,1,2,3",
2213         "UMask": "0x1",
2214         "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.SNOOP_HIT_NO_FWD",
2215         "MSRIndex": "0x1a6,0x1a7",
2216         "SampleAfterValue": "100003",
2217         "BriefDescription": "ALL_PF_DATA_RD & L3_MISS & SNOOP_HIT_NO_FWD",
2218         "Offcore": "1",
2219         "CounterHTOff": "0,1,2,3"
2220     },
2221     {
2222         "EventCode": "0xB7, 0xBB",
2223         "MSRValue": "0x2000020120 ",
2224         "Counter": "0,1,2,3",
2225         "UMask": "0x1",
2226         "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_NON_DRAM",
2227         "MSRIndex": "0x1a6,0x1a7",
2228         "SampleAfterValue": "100003",
2229         "BriefDescription": "ALL_PF_RFO & SUPPLIER_NONE & SNOOP_NON_DRAM",
2230         "Offcore": "1",
2231         "CounterHTOff": "0,1,2,3"
2232     },
2233     {
2234         "EventCode": "0xB7, 0xBB",
2235         "MSRValue": "0x20003c0120 ",
2236         "Counter": "0,1,2,3",
2237         "UMask": "0x1",
2238         "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT.SNOOP_NON_DRAM",
2239         "MSRIndex": "0x1a6,0x1a7",
2240         "SampleAfterValue": "100003",
2241         "BriefDescription": "Counts prefetch RFOs that hit in the L3 and the target was non-DRAM system address.",
2242         "Offcore": "1",
2243         "CounterHTOff": "0,1,2,3"
2244     },
2245     {
2246         "EventCode": "0xB7, 0xBB",
2247         "MSRValue": "0x0084000120 ",
2248         "Counter": "0,1,2,3",
2249         "UMask": "0x1",
2250         "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
2251         "MSRIndex": "0x1a6,0x1a7",
2252         "SampleAfterValue": "100003",
2253         "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
2254         "Offcore": "1",
2255         "CounterHTOff": "0,1,2,3"
2256     },
2257     {
2258         "EventCode": "0xB7, 0xBB",
2259         "MSRValue": "0x0104000120 ",
2260         "Counter": "0,1,2,3",
2261         "UMask": "0x1",
2262         "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
2263         "MSRIndex": "0x1a6,0x1a7",
2264         "SampleAfterValue": "100003",
2265         "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
2266         "Offcore": "1",
2267         "CounterHTOff": "0,1,2,3"
2268     },
2269     {
2270         "EventCode": "0xB7, 0xBB",
2271         "MSRValue": "0x0204000120 ",
2272         "Counter": "0,1,2,3",
2273         "UMask": "0x1",
2274         "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
2275         "MSRIndex": "0x1a6,0x1a7",
2276         "SampleAfterValue": "100003",
2277         "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
2278         "Offcore": "1",
2279         "CounterHTOff": "0,1,2,3"
2280     },
2281     {
2282         "EventCode": "0xB7, 0xBB",
2283         "MSRValue": "0x0404000120 ",
2284         "Counter": "0,1,2,3",
2285         "UMask": "0x1",
2286         "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
2287         "MSRIndex": "0x1a6,0x1a7",
2288         "SampleAfterValue": "100003",
2289         "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
2290         "Offcore": "1",
2291         "CounterHTOff": "0,1,2,3"
2292     },
2293     {
2294         "EventCode": "0xB7, 0xBB",
2295         "MSRValue": "0x1004000120 ",
2296         "Counter": "0,1,2,3",
2297         "UMask": "0x1",
2298         "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
2299         "MSRIndex": "0x1a6,0x1a7",
2300         "SampleAfterValue": "100003",
2301         "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
2302         "Offcore": "1",
2303         "CounterHTOff": "0,1,2,3"
2304     },
2305     {
2306         "EventCode": "0xB7, 0xBB",
2307         "MSRValue": "0x2004000120 ",
2308         "Counter": "0,1,2,3",
2309         "UMask": "0x1",
2310         "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
2311         "MSRIndex": "0x1a6,0x1a7",
2312         "SampleAfterValue": "100003",
2313         "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
2314         "Offcore": "1",
2315         "CounterHTOff": "0,1,2,3"
2316     },
2317     {
2318         "EventCode": "0xB7, 0xBB",
2319         "MSRValue": "0x3f84000120 ",
2320         "Counter": "0,1,2,3",
2321         "UMask": "0x1",
2322         "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
2323         "MSRIndex": "0x1a6,0x1a7",
2324         "SampleAfterValue": "100003",
2325         "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
2326         "Offcore": "1",
2327         "CounterHTOff": "0,1,2,3"
2328     },
2329     {
2330         "EventCode": "0xB7, 0xBB",
2331         "MSRValue": "0x00bc000120 ",
2332         "Counter": "0,1,2,3",
2333         "UMask": "0x1",
2334         "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.SNOOP_NONE",
2335         "MSRIndex": "0x1a6,0x1a7",
2336         "SampleAfterValue": "100003",
2337         "BriefDescription": "Counts prefetch RFOs that miss the L3 with no details on snoop-related information.",
2338         "Offcore": "1",
2339         "CounterHTOff": "0,1,2,3"
2340     },
2341     {
2342         "EventCode": "0xB7, 0xBB",
2343         "MSRValue": "0x013c000120 ",
2344         "Counter": "0,1,2,3",
2345         "UMask": "0x1",
2346         "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.SNOOP_NOT_NEEDED",
2347         "MSRIndex": "0x1a6,0x1a7",
2348         "SampleAfterValue": "100003",
2349         "BriefDescription": "ALL_PF_RFO & L3_MISS & SNOOP_NOT_NEEDED",
2350         "Offcore": "1",
2351         "CounterHTOff": "0,1,2,3"
2352     },
2353     {
2354         "EventCode": "0xB7, 0xBB",
2355         "MSRValue": "0x023c000120 ",
2356         "Counter": "0,1,2,3",
2357         "UMask": "0x1",
2358         "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.SNOOP_MISS",
2359         "MSRIndex": "0x1a6,0x1a7",
2360         "SampleAfterValue": "100003",
2361         "BriefDescription": "Counts prefetch RFOs that miss the L3 with a snoop miss response.",
2362         "Offcore": "1",
2363         "CounterHTOff": "0,1,2,3"
2364     },
2365     {
2366         "EventCode": "0xB7, 0xBB",
2367         "MSRValue": "0x043c000120 ",
2368         "Counter": "0,1,2,3",
2369         "UMask": "0x1",
2370         "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.SNOOP_HIT_NO_FWD",
2371         "MSRIndex": "0x1a6,0x1a7",
2372         "SampleAfterValue": "100003",
2373         "BriefDescription": "ALL_PF_RFO & L3_MISS & SNOOP_HIT_NO_FWD",
2374         "Offcore": "1",
2375         "CounterHTOff": "0,1,2,3"
2376     },
2377     {
2378         "EventCode": "0xB7, 0xBB",
2379         "MSRValue": "0x2000020240 ",
2380         "Counter": "0,1,2,3",
2381         "UMask": "0x1",
2382         "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.SUPPLIER_NONE.SNOOP_NON_DRAM",
2383         "MSRIndex": "0x1a6,0x1a7",
2384         "SampleAfterValue": "100003",
2385         "BriefDescription": "ALL_PF_CODE_RD & SUPPLIER_NONE & SNOOP_NON_DRAM",
2386         "Offcore": "1",
2387         "CounterHTOff": "0,1,2,3"
2388     },
2389     {
2390         "EventCode": "0xB7, 0xBB",
2391         "MSRValue": "0x20003c0240 ",
2392         "Counter": "0,1,2,3",
2393         "UMask": "0x1",
2394         "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.L3_HIT.SNOOP_NON_DRAM",
2395         "MSRIndex": "0x1a6,0x1a7",
2396         "SampleAfterValue": "100003",
2397         "BriefDescription": "Counts all prefetch code reads that hit in the L3 and the target was non-DRAM system address.",
2398         "Offcore": "1",
2399         "CounterHTOff": "0,1,2,3"
2400     },
2401     {
2402         "EventCode": "0xB7, 0xBB",
2403         "MSRValue": "0x0084000240 ",
2404         "Counter": "0,1,2,3",
2405         "UMask": "0x1",
2406         "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
2407         "MSRIndex": "0x1a6,0x1a7",
2408         "SampleAfterValue": "100003",
2409         "BriefDescription": "ALL_PF_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
2410         "Offcore": "1",
2411         "CounterHTOff": "0,1,2,3"
2412     },
2413     {
2414         "EventCode": "0xB7, 0xBB",
2415         "MSRValue": "0x0104000240 ",
2416         "Counter": "0,1,2,3",
2417         "UMask": "0x1",
2418         "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
2419         "MSRIndex": "0x1a6,0x1a7",
2420         "SampleAfterValue": "100003",
2421         "BriefDescription": "ALL_PF_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
2422         "Offcore": "1",
2423         "CounterHTOff": "0,1,2,3"
2424     },
2425     {
2426         "EventCode": "0xB7, 0xBB",
2427         "MSRValue": "0x0204000240 ",
2428         "Counter": "0,1,2,3",
2429         "UMask": "0x1",
2430         "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
2431         "MSRIndex": "0x1a6,0x1a7",
2432         "SampleAfterValue": "100003",
2433         "BriefDescription": "ALL_PF_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
2434         "Offcore": "1",
2435         "CounterHTOff": "0,1,2,3"
2436     },
2437     {
2438         "EventCode": "0xB7, 0xBB",
2439         "MSRValue": "0x0404000240 ",
2440         "Counter": "0,1,2,3",
2441         "UMask": "0x1",
2442         "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
2443         "MSRIndex": "0x1a6,0x1a7",
2444         "SampleAfterValue": "100003",
2445         "BriefDescription": "ALL_PF_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
2446         "Offcore": "1",
2447         "CounterHTOff": "0,1,2,3"
2448     },
2449     {
2450         "EventCode": "0xB7, 0xBB",
2451         "MSRValue": "0x1004000240 ",
2452         "Counter": "0,1,2,3",
2453         "UMask": "0x1",
2454         "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
2455         "MSRIndex": "0x1a6,0x1a7",
2456         "SampleAfterValue": "100003",
2457         "BriefDescription": "ALL_PF_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
2458         "Offcore": "1",
2459         "CounterHTOff": "0,1,2,3"
2460     },
2461     {
2462         "EventCode": "0xB7, 0xBB",
2463         "MSRValue": "0x2004000240 ",
2464         "Counter": "0,1,2,3",
2465         "UMask": "0x1",
2466         "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
2467         "MSRIndex": "0x1a6,0x1a7",
2468         "SampleAfterValue": "100003",
2469         "BriefDescription": "ALL_PF_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
2470         "Offcore": "1",
2471         "CounterHTOff": "0,1,2,3"
2472     },
2473     {
2474         "EventCode": "0xB7, 0xBB",
2475         "MSRValue": "0x3f84000240 ",
2476         "Counter": "0,1,2,3",
2477         "UMask": "0x1",
2478         "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
2479         "MSRIndex": "0x1a6,0x1a7",
2480         "SampleAfterValue": "100003",
2481         "BriefDescription": "ALL_PF_CODE_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
2482         "Offcore": "1",
2483         "CounterHTOff": "0,1,2,3"
2484     },
2485     {
2486         "EventCode": "0xB7, 0xBB",
2487         "MSRValue": "0x00bc000240 ",
2488         "Counter": "0,1,2,3",
2489         "UMask": "0x1",
2490         "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.L3_MISS.SNOOP_NONE",
2491         "MSRIndex": "0x1a6,0x1a7",
2492         "SampleAfterValue": "100003",
2493         "BriefDescription": "Counts all prefetch code reads that miss the L3 with no details on snoop-related information.",
2494         "Offcore": "1",
2495         "CounterHTOff": "0,1,2,3"
2496     },
2497     {
2498         "EventCode": "0xB7, 0xBB",
2499         "MSRValue": "0x013c000240 ",
2500         "Counter": "0,1,2,3",
2501         "UMask": "0x1",
2502         "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.L3_MISS.SNOOP_NOT_NEEDED",
2503         "MSRIndex": "0x1a6,0x1a7",
2504         "SampleAfterValue": "100003",
2505         "BriefDescription": "ALL_PF_CODE_RD & L3_MISS & SNOOP_NOT_NEEDED",
2506         "Offcore": "1",
2507         "CounterHTOff": "0,1,2,3"
2508     },
2509     {
2510         "EventCode": "0xB7, 0xBB",
2511         "MSRValue": "0x023c000240 ",
2512         "Counter": "0,1,2,3",
2513         "UMask": "0x1",
2514         "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.L3_MISS.SNOOP_MISS",
2515         "MSRIndex": "0x1a6,0x1a7",
2516         "SampleAfterValue": "100003",
2517         "BriefDescription": "Counts all prefetch code reads that miss the L3 with a snoop miss response.",
2518         "Offcore": "1",
2519         "CounterHTOff": "0,1,2,3"
2520     },
2521     {
2522         "EventCode": "0xB7, 0xBB",
2523         "MSRValue": "0x043c000240 ",
2524         "Counter": "0,1,2,3",
2525         "UMask": "0x1",
2526         "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.L3_MISS.SNOOP_HIT_NO_FWD",
2527         "MSRIndex": "0x1a6,0x1a7",
2528         "SampleAfterValue": "100003",
2529         "BriefDescription": "ALL_PF_CODE_RD & L3_MISS & SNOOP_HIT_NO_FWD",
2530         "Offcore": "1",
2531         "CounterHTOff": "0,1,2,3"
2532     },
2533     {
2534         "EventCode": "0xB7, 0xBB",
2535         "MSRValue": "0x2000020091 ",
2536         "Counter": "0,1,2,3",
2537         "UMask": "0x1",
2538         "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_NON_DRAM",
2539         "MSRIndex": "0x1a6,0x1a7",
2540         "SampleAfterValue": "100003",
2541         "BriefDescription": "ALL_DATA_RD & SUPPLIER_NONE & SNOOP_NON_DRAM",
2542         "Offcore": "1",
2543         "CounterHTOff": "0,1,2,3"
2544     },
2545     {
2546         "EventCode": "0xB7, 0xBB",
2547         "MSRValue": "0x20003c0091 ",
2548         "Counter": "0,1,2,3",
2549         "UMask": "0x1",
2550         "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT.SNOOP_NON_DRAM",
2551         "MSRIndex": "0x1a6,0x1a7",
2552         "SampleAfterValue": "100003",
2553         "BriefDescription": "Counts all demand & prefetch data reads that hit in the L3 and the target was non-DRAM system address.",
2554         "Offcore": "1",
2555         "CounterHTOff": "0,1,2,3"
2556     },
2557     {
2558         "EventCode": "0xB7, 0xBB",
2559         "MSRValue": "0x0084000091 ",
2560         "Counter": "0,1,2,3",
2561         "UMask": "0x1",
2562         "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
2563         "MSRIndex": "0x1a6,0x1a7",
2564         "SampleAfterValue": "100003",
2565         "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
2566         "Offcore": "1",
2567         "CounterHTOff": "0,1,2,3"
2568     },
2569     {
2570         "EventCode": "0xB7, 0xBB",
2571         "MSRValue": "0x0104000091 ",
2572         "Counter": "0,1,2,3",
2573         "UMask": "0x1",
2574         "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
2575         "MSRIndex": "0x1a6,0x1a7",
2576         "SampleAfterValue": "100003",
2577         "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
2578         "Offcore": "1",
2579         "CounterHTOff": "0,1,2,3"
2580     },
2581     {
2582         "EventCode": "0xB7, 0xBB",
2583         "MSRValue": "0x0204000091 ",
2584         "Counter": "0,1,2,3",
2585         "UMask": "0x1",
2586         "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
2587         "MSRIndex": "0x1a6,0x1a7",
2588         "SampleAfterValue": "100003",
2589         "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
2590         "Offcore": "1",
2591         "CounterHTOff": "0,1,2,3"
2592     },
2593     {
2594         "EventCode": "0xB7, 0xBB",
2595         "MSRValue": "0x0404000091 ",
2596         "Counter": "0,1,2,3",
2597         "UMask": "0x1",
2598         "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
2599         "MSRIndex": "0x1a6,0x1a7",
2600         "SampleAfterValue": "100003",
2601         "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
2602         "Offcore": "1",
2603         "CounterHTOff": "0,1,2,3"
2604     },
2605     {
2606         "EventCode": "0xB7, 0xBB",
2607         "MSRValue": "0x1004000091 ",
2608         "Counter": "0,1,2,3",
2609         "UMask": "0x1",
2610         "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
2611         "MSRIndex": "0x1a6,0x1a7",
2612         "SampleAfterValue": "100003",
2613         "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
2614         "Offcore": "1",
2615         "CounterHTOff": "0,1,2,3"
2616     },
2617     {
2618         "EventCode": "0xB7, 0xBB",
2619         "MSRValue": "0x2004000091 ",
2620         "Counter": "0,1,2,3",
2621         "UMask": "0x1",
2622         "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
2623         "MSRIndex": "0x1a6,0x1a7",
2624         "SampleAfterValue": "100003",
2625         "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
2626         "Offcore": "1",
2627         "CounterHTOff": "0,1,2,3"
2628     },
2629     {
2630         "EventCode": "0xB7, 0xBB",
2631         "MSRValue": "0x3f84000091 ",
2632         "Counter": "0,1,2,3",
2633         "UMask": "0x1",
2634         "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
2635         "MSRIndex": "0x1a6,0x1a7",
2636         "SampleAfterValue": "100003",
2637         "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
2638         "Offcore": "1",
2639         "CounterHTOff": "0,1,2,3"
2640     },
2641     {
2642         "EventCode": "0xB7, 0xBB",
2643         "MSRValue": "0x00bc000091 ",
2644         "Counter": "0,1,2,3",
2645         "UMask": "0x1",
2646         "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.SNOOP_NONE",
2647         "MSRIndex": "0x1a6,0x1a7",
2648         "SampleAfterValue": "100003",
2649         "BriefDescription": "Counts all demand & prefetch data reads that miss the L3 with no details on snoop-related information.",
2650         "Offcore": "1",
2651         "CounterHTOff": "0,1,2,3"
2652     },
2653     {
2654         "EventCode": "0xB7, 0xBB",
2655         "MSRValue": "0x013c000091 ",
2656         "Counter": "0,1,2,3",
2657         "UMask": "0x1",
2658         "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.SNOOP_NOT_NEEDED",
2659         "MSRIndex": "0x1a6,0x1a7",
2660         "SampleAfterValue": "100003",
2661         "BriefDescription": "ALL_DATA_RD & L3_MISS & SNOOP_NOT_NEEDED",
2662         "Offcore": "1",
2663         "CounterHTOff": "0,1,2,3"
2664     },
2665     {
2666         "EventCode": "0xB7, 0xBB",
2667         "MSRValue": "0x023c000091 ",
2668         "Counter": "0,1,2,3",
2669         "UMask": "0x1",
2670         "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.SNOOP_MISS",
2671         "MSRIndex": "0x1a6,0x1a7",
2672         "SampleAfterValue": "100003",
2673         "BriefDescription": "Counts all demand & prefetch data reads that miss the L3 with a snoop miss response.",
2674         "Offcore": "1",
2675         "CounterHTOff": "0,1,2,3"
2676     },
2677     {
2678         "EventCode": "0xB7, 0xBB",
2679         "MSRValue": "0x043c000091 ",
2680         "Counter": "0,1,2,3",
2681         "UMask": "0x1",
2682         "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.SNOOP_HIT_NO_FWD",
2683         "MSRIndex": "0x1a6,0x1a7",
2684         "SampleAfterValue": "100003",
2685         "BriefDescription": "ALL_DATA_RD & L3_MISS & SNOOP_HIT_NO_FWD",
2686         "Offcore": "1",
2687         "CounterHTOff": "0,1,2,3"
2688     },
2689     {
2690         "EventCode": "0xB7, 0xBB",
2691         "MSRValue": "0x2000020122 ",
2692         "Counter": "0,1,2,3",
2693         "UMask": "0x1",
2694         "EventName": "OFFCORE_RESPONSE.ALL_RFO.SUPPLIER_NONE.SNOOP_NON_DRAM",
2695         "MSRIndex": "0x1a6,0x1a7",
2696         "SampleAfterValue": "100003",
2697         "BriefDescription": "ALL_RFO & SUPPLIER_NONE & SNOOP_NON_DRAM",
2698         "Offcore": "1",
2699         "CounterHTOff": "0,1,2,3"
2700     },
2701     {
2702         "EventCode": "0xB7, 0xBB",
2703         "MSRValue": "0x20003c0122 ",
2704         "Counter": "0,1,2,3",
2705         "UMask": "0x1",
2706         "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT.SNOOP_NON_DRAM",
2707         "MSRIndex": "0x1a6,0x1a7",
2708         "SampleAfterValue": "100003",
2709         "BriefDescription": "Counts all demand & prefetch RFOs that hit in the L3 and the target was non-DRAM system address.",
2710         "Offcore": "1",
2711         "CounterHTOff": "0,1,2,3"
2712     },
2713     {
2714         "EventCode": "0xB7, 0xBB",
2715         "MSRValue": "0x0084000122 ",
2716         "Counter": "0,1,2,3",
2717         "UMask": "0x1",
2718         "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
2719         "MSRIndex": "0x1a6,0x1a7",
2720         "SampleAfterValue": "100003",
2721         "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NONE",
2722         "Offcore": "1",
2723         "CounterHTOff": "0,1,2,3"
2724     },
2725     {
2726         "EventCode": "0xB7, 0xBB",
2727         "MSRValue": "0x0104000122 ",
2728         "Counter": "0,1,2,3",
2729         "UMask": "0x1",
2730         "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NOT_NEEDED",
2731         "MSRIndex": "0x1a6,0x1a7",
2732         "SampleAfterValue": "100003",
2733         "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NOT_NEEDED",
2734         "Offcore": "1",
2735         "CounterHTOff": "0,1,2,3"
2736     },
2737     {
2738         "EventCode": "0xB7, 0xBB",
2739         "MSRValue": "0x0204000122 ",
2740         "Counter": "0,1,2,3",
2741         "UMask": "0x1",
2742         "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
2743         "MSRIndex": "0x1a6,0x1a7",
2744         "SampleAfterValue": "100003",
2745         "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & SNOOP_MISS",
2746         "Offcore": "1",
2747         "CounterHTOff": "0,1,2,3"
2748     },
2749     {
2750         "EventCode": "0xB7, 0xBB",
2751         "MSRValue": "0x0404000122 ",
2752         "Counter": "0,1,2,3",
2753         "UMask": "0x1",
2754         "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_HIT_NO_FWD",
2755         "MSRIndex": "0x1a6,0x1a7",
2756         "SampleAfterValue": "100003",
2757         "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & SNOOP_HIT_NO_FWD",
2758         "Offcore": "1",
2759         "CounterHTOff": "0,1,2,3"
2760     },
2761     {
2762         "EventCode": "0xB7, 0xBB",
2763         "MSRValue": "0x1004000122 ",
2764         "Counter": "0,1,2,3",
2765         "UMask": "0x1",
2766         "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_HITM",
2767         "MSRIndex": "0x1a6,0x1a7",
2768         "SampleAfterValue": "100003",
2769         "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & SNOOP_HITM",
2770         "Offcore": "1",
2771         "CounterHTOff": "0,1,2,3"
2772     },
2773     {
2774         "EventCode": "0xB7, 0xBB",
2775         "MSRValue": "0x2004000122 ",
2776         "Counter": "0,1,2,3",
2777         "UMask": "0x1",
2778         "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NON_DRAM",
2779         "MSRIndex": "0x1a6,0x1a7",
2780         "SampleAfterValue": "100003",
2781         "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NON_DRAM",
2782         "Offcore": "1",
2783         "CounterHTOff": "0,1,2,3"
2784     },
2785     {
2786         "EventCode": "0xB7, 0xBB",
2787         "MSRValue": "0x3f84000122 ",
2788         "Counter": "0,1,2,3",
2789         "UMask": "0x1",
2790         "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
2791         "MSRIndex": "0x1a6,0x1a7",
2792         "SampleAfterValue": "100003",
2793         "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & ANY_SNOOP",
2794         "Offcore": "1",
2795         "CounterHTOff": "0,1,2,3"
2796     },
2797     {
2798         "EventCode": "0xB7, 0xBB",
2799         "MSRValue": "0x00bc000122 ",
2800         "Counter": "0,1,2,3",
2801         "UMask": "0x1",
2802         "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.SNOOP_NONE",
2803         "MSRIndex": "0x1a6,0x1a7",
2804         "SampleAfterValue": "100003",
2805         "BriefDescription": "Counts all demand & prefetch RFOs that miss the L3 with no details on snoop-related information.",
2806         "Offcore": "1",
2807         "CounterHTOff": "0,1,2,3"
2808     },
2809     {
2810         "EventCode": "0xB7, 0xBB",
2811         "MSRValue": "0x013c000122 ",
2812         "Counter": "0,1,2,3",
2813         "UMask": "0x1",
2814         "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.SNOOP_NOT_NEEDED",
2815         "MSRIndex": "0x1a6,0x1a7",
2816         "SampleAfterValue": "100003",
2817         "BriefDescription": "ALL_RFO & L3_MISS & SNOOP_NOT_NEEDED",
2818         "Offcore": "1",
2819         "CounterHTOff": "0,1,2,3"
2820     },
2821     {
2822         "EventCode": "0xB7, 0xBB",
2823         "MSRValue": "0x023c000122 ",
2824         "Counter": "0,1,2,3",
2825         "UMask": "0x1",
2826         "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.SNOOP_MISS",
2827         "MSRIndex": "0x1a6,0x1a7",
2828         "SampleAfterValue": "100003",
2829         "BriefDescription": "Counts all demand & prefetch RFOs that miss the L3 with a snoop miss response.",
2830         "Offcore": "1",
2831         "CounterHTOff": "0,1,2,3"
2832     },
2833     {
2834         "EventCode": "0xB7, 0xBB",
2835         "MSRValue": "0x043c000122 ",
2836         "Counter": "0,1,2,3",
2837         "UMask": "0x1",
2838         "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.SNOOP_HIT_NO_FWD",
2839         "MSRIndex": "0x1a6,0x1a7",
2840         "SampleAfterValue": "100003",
2841         "BriefDescription": "ALL_RFO & L3_MISS & SNOOP_HIT_NO_FWD",
2842         "Offcore": "1",
2843         "CounterHTOff": "0,1,2,3"
2844     }
2845 ]