carl9170 firmware: support write one byte at a time command

This command is necessary to write into the serial eeprom.

Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>

diff --git a/carlfw/src/fw.c b/carlfw/src/fw.c
index c3519856d923dd7692aa076a0ff960bbadcda011..7ba152e7bea8004b911bf704c17d5c274da0d576 100644 (file)
--- a/carlfw/src/fw.c
+++ b/carlfw/src/fw.c
@@ -39,6 +39,7 @@ const struct carl9170_firmware_descriptor __in_section(fwdsc) __visible carl9170
                                        BIT(CARL9170FW_HW_COUNTERS) |
                                        BIT(CARL9170FW_RX_BA_FILTER) |
                                        BIT(CARL9170FW_USB_INIT_FIRMWARE) |
+                                       BIT(CARL9170FW_HAS_WREGB_CMD) |
 #ifdef CONFIG_CARL9170FW_USB_UP_STREAM
                                        BIT(CARL9170FW_USB_UP_STREAM) |
 #endif /* CONFIG_CARL9170FW_USB_UP_STREAM */

diff --git a/carlfw/src/hostif.c b/carlfw/src/hostif.c
index 7ff1d9b243ba43d88d621019ece3634d66a5387a..73e89c7137ad237b5712a1f751f49c8421d70fbc 100644 (file)
--- a/carlfw/src/hostif.c
+++ b/carlfw/src/hostif.c
@@ -234,6 +234,12 @@ void handle_cmd(struct carl9170_rsp *resp)
                memset(&fw.tally, 0, sizeof(struct carl9170_tally_rsp));
                break;
 
+       case CARL9170_CMD_WREGB:
+               resp->hdr.len = 0;
+               for (i = 0; i < MIN(cmd->wregb.count, cmd->hdr.len - 8); i++)
+                       setb(cmd->wregb.addr + i, cmd->wregb.val[i]);
+               break;
+
        case CARL9170_CMD_BCN_CTRL:
                resp->hdr.len = 0;
 

diff --git a/include/shared/fwcmd.h b/include/shared/fwcmd.h
index 9111d4ffc1b3851309af860a7b2e3e8175a2fb3e..ea1d80f9a50efb3a8d4c59113c6782479b90d8aa 100644 (file)
--- a/include/shared/fwcmd.h
+++ b/include/shared/fwcmd.h
@@ -56,6 +56,7 @@ enum carl9170_cmd_oids {
        CARL9170_CMD_RX_FILTER          = 0x07,
        CARL9170_CMD_WOL                = 0x08,
        CARL9170_CMD_TALLY              = 0x09,
+       CARL9170_CMD_WREGB              = 0x0a,
 
        /* CAM */
        CARL9170_CMD_EKEY               = 0x10,
@@ -123,6 +124,12 @@ struct carl9170_write_reg {
        } regs[0] __packed;
 } __packed;
 
+struct carl9170_write_reg_byte {
+       __le32  addr;
+       __le32  count;
+       u8      val[0];
+} __packed;
+
 #define        CARL9170FW_PHY_HT_ENABLE                0x4
 #define        CARL9170FW_PHY_HT_DYN2040               0x8
 #define        CARL9170FW_PHY_HT_EXT_CHAN_OFF          0x3
@@ -226,6 +233,7 @@ struct carl9170_cmd {
                struct carl9170_u32_list        echo;
                struct carl9170_reg_list        rreg;
                struct carl9170_write_reg       wreg;
+               struct carl9170_write_reg_byte  wregb;
                struct carl9170_rf_init         rf_init;
                struct carl9170_psm             psm;
                struct carl9170_wol_cmd         wol;

diff --git a/include/shared/fwdesc.h b/include/shared/fwdesc.h
index 66848d47c88e993c2c04d328699e94249c5bad61..a88d07b3628b59b15892ee189c3d4d4dd708bb56 100644 (file)
--- a/include/shared/fwdesc.h
+++ b/include/shared/fwdesc.h
@@ -81,6 +81,9 @@ enum carl9170fw_feature_list {
        /* Firmware will pass BA when BARs are queued */
        CARL9170FW_RX_BA_FILTER,
 
+       /* Firmware has support to write a byte at a time  */
+       CARL9170FW_HAS_WREGB_CMD,
+
        /* KEEP LAST */
        __CARL9170FW_FEATURE_NUM
 };

diff --git a/tools/src/fwinfo.c b/tools/src/fwinfo.c
index 0d5cd0947922d92243c61645a3b0ecb7f88827ed..229f0e5335d4bf8525d8fa635fda04ec6ed31b54 100644 (file)
--- a/tools/src/fwinfo.c
+++ b/tools/src/fwinfo.c
@@ -69,6 +69,7 @@ static const struct feature_list known_otus_features_v1[] = {
        CHECK_FOR_FEATURE(CARL9170FW_FIXED_5GHZ_PSM),
        CHECK_FOR_FEATURE(CARL9170FW_HW_COUNTERS),
        CHECK_FOR_FEATURE(CARL9170FW_RX_BA_FILTER),
+       CHECK_FOR_FEATURE(CARL9170FW_HAS_WREGB_CMD),
 };
 
 static void check_feature_list(const struct carl9170fw_desc_head *head,